MAXIM MAX6650, MAX6651 Technical data

General Description

The MAX6650/MAX6651 fan controllers use an
SMBus™/I2C-compatible interface to regulate and monitor
the speed of 5VDC/12VDC brushless fans with built-in
tachometers. They automatically force the fan’s tachome­ter frequency (fan speed) to match a preprogrammed
value in the Fan-Speed Register by using an external
MOSFET or bipolar transistor to linearly regulate the volt­age across the fan. The MAX6650 regulates the speed of
a single fan by monitoring its tachometer output. The
MAX6651 also regulates the speed of a single fan, but it
contains additional tachometer inputs to monitor up to four
fans and control them as a single unit when they are used
in parallel.

The MAX6650/MAX6651 provide general-purpose
input/output (GPIO) pins that serve as digital inputs,
digital outputs, or various hardware interfaces. Capable
of sinking 10mA, these open-drain inputs/outputs can
drive an LED. To add additional hardware control, con­figure GPIO1 to fully turn on the fan in case of software
failure. To generate an interrupt when a fault condition
is detected, configure GPIO0 to behave as an active­low alert output. Synchronize multiple devices by set­ting GPIO2 (MAX6651 only) as an internal clock output
or an external clock input.

The MAX6650 is available in a space-saving 10-pin
µMAX

®

package, and the MAX6651 is available in a

small 16-pin QSOP package.

________________________Applications

RAID Desktop Computers

Servers Networking

Workstations Telecommunications

____________________________Features

♦ Closed/Open-Loop Fan-Speed Control for

5V/12V Fans

♦ 2-Wire SMBus/I2C-Compatible Interface
♦ Monitors Tachometer Output

Single Tachometer (MAX6650)
Up to Four Tachometers (MAX6651)

♦ Programmable Alert Output
♦ GPIOs
♦ Hardware Full-On Override
♦ Synchronize Multiple Fans
♦ Four Selectable Slave Addresses
♦ 3V to 5.5V Supply Voltage
♦ Small Packages

10-Pin µMAX (MAX6650)
16-Pin QSOP (MAX6651)

MAX6650/MAX6651

Fan-Speed Regulators and Monitors

with SMBus/I2C-Compatible Interface

________________________________________________________________

Maxim Integrated Products

1

19-1784; Rev 4; 7/10

Ordering Information

SMBus is a trademark of Intel Corp.
µMAX is a registered trademark of Maxim Integrated Products, Inc.

+

Denotes a lead(Pb)-free/RoHS-compliant package.

Typical Operating Circuit

Pin Configurations appear at end of data sheet.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART TEMP RANGE PIN-PACKAGE

MAX6650EUB -40°C to +85°C 10 µMAX

MAX6650EUB+ -40°C to +85°C 10 µMAX
MAX6651EEE -40°C to +85°C 16 QSOP
MAX6651EEE+ -40°C to +85°C 16 QSOP

V

FAN

10kΩ

5V OR 12V

FAN

C

COMP

10μF

V

CC

3V TO 5.5V

2

C

SMBus/I

INTERFACE

LED

V

SCL

SDA

ALERT

GPIO0 OUT

FULL ON

GPIO1

CC

MAX6650

TACH0

FB

ADD

GND

MAX6650/MAX6651

Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND..............................................................-0.3V to +6V

FB, TACH_ ..........................................................-0.3V to +13.2V

All Other Pins..............................................-0.3V to (V

CC

+ 0.3V)

Output Voltages..........................................-0.3V to (V

CC

+ 0.3V)

Maximum Current

Into V

CC

, GND, V

OUT

...................................................100mA

Into All Other Pins ..........................................................50mA

Continuous Power Dissipation (T

A

= +70°C)

10-Pin µMAX (derate 5.6mW/°C above +70°C) ..........444mW

16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature .....................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Soldering Temperature (reflow)

Lead(Pb)-free..............................................................+260°C

Containing lead(Pb) ....................................................+240°C

Input Low Voltage

Input Hysteresis V

HYS

200 mV

Tachometer Threshold V

TACH_

VFB+ 1.0 VFB+3

V

12V fan, 0 < VFB< 9V

PARAMETER SYMBOL MIN TYP MAX UNITS

Output Source Current I

SOURCE

50 mA

Output Sink Current I

SINK

10 mA

Output Voltage Range V

OUT

0.3 VCC- 0.3 V

VFB+ 0.5 VFB+1.5

Tachometer Input Impedance R

TACH_

70 100 150 kΩ

Supply Voltage V

CC

3.0 5.5 V

Supply Current I

CC

10 mA

DAC Differential Nonlinearity 5 LSB

Useful DAC Resolution 8 bits

Feedback Input Impedance R

FB

70 100 150 kΩ

Output Sink Current I

GPIO_

10 mA

CONDITIONS

Guaranteed monotonicity on FB (Note 1)

V

OUT

= VCC- 1.8V

Measured at FB (Note 1)

V

OUT

= 0.5V

I

OUT

= ±100µA

5V fan, 0 < VFB< 4.5V

0 < VFB < 9V

0 < V

TACH

< 9V

V

GPIO_

= 0.4V

Full-on mode, I

OUT

= 0

V

0.8V

IL(GPIO_)

Input High Voltage

V

2V

CC

≤ 3.6V

V

IH(GPIO_)

3V

CC

> 3.6V

Pullup Resistor R

GPIO_

100 kΩ

TACHOMETER INPUTS (TACH_)

FEEDBACK (FB)

GENERAL-PURPOSE INPUTS/OUTPUTS (GPIO_) (Note 2)

POWER SUPPLY (VCC)

OUTPUT (OUT)

MAX6650/MAX6651

ELECTRICAL CHARACTERISTICS (continued)

(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)

TIMING CHARACTERISTICS

(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)

Fan-Speed Regulators and Monitors

with SMBus/I2C-Compatible Interface

_______________________________________________________________________________________ 3

Selects slave address 1001 011 (Table 1)

Selects slave address 1001 000 (Table 1)

Selects slave address 0011 111 (Table 1)

Minimum resistance to GND, selects slave
address 0011 011 (Table 1)

V

ADD

= 0.5V

CONDITIONS

VVCC- 0.05VV

IH(ADD)

ADD Input High Voltage

V0.1V

IL(ADD)

ADD Input Low Voltage

SMBus/I2C INTERFACE (SDA, SCL)

kΩ9.5 10.5R

ADD

ADD External Pulldown Resistor
to GND

kΩ5R

OPEN

Open Resistance

µA40 80I

ADD

ADD Pullup Current

UNITSMIN TYP MAXSYMBOLPARAMETER

V

SDA

= 0.6V mA6I

SDA

Data Output Sink Current

VCC≤ 3.6V

V

2

V0.8V

IL

Input Low Voltage

0 < VIN< V

CC

µA±1Input Leakage Current

VCC> 3.6V 3

V

IH

Input High Voltage

mV200V

HYS

Input Hysteresis

ADDRESS SELECT (ADD)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

µs500Minimum pulse durationGlitch Rejection

kHz254f

CLK

Clock Frequency

kHz0 400f

SCL

SCL Clock Frequency

µs1.3t

BUF

Bus Free Time Between Stop
and Start Condition

Hold-Time Start Condition t

HD:STA

0.6 µs

µs1.3t

LOW

Low Period of the SCL Clock

High Period of the SCL Clock t

HIGH

0.6 µs

µs0 900(Note 3)t

HD:DAT

Data Hold Time

Data Setup Time t

SU:DAT

100 ns

ns20 + 0.1CB(pF) 300(Note 4)t

R

Rise-Time SDA/SCL Signal
(Receiving)

Fall-Time SDA/SCL Signal
(Receiving)

t

F

(Note 4) 20 + 0.1CB(pF) 300 ns

ns20 + 0.1CB(pF) 250I

SINK

< 6mA (Note 4) t

F

Fall-Time SDA Signal
(Transmitting)

%-10 +10VCC= 5Vf

CLK

Clock Frequency Uncertainty

TACHOMETERS

GPIO2 (Note 2)

SMBus/I2C INTERFACE (Figures 3, 4)

MAX6650/MAX6651

Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface

4 _______________________________________________________________________________________

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

240

245

255

250

260

265

3.0 4.03.5 4.5 5.0 5.5

INTERNAL OSCILLATOR FREQUENCY

vs. SUPPLY VOLTAGE

MAX6650/51-01

SUPPLY VOLTAGE (V)

FREQUENCY (kHz)

200

220

260

240

280

300

INTERNAL OSCILLATOR FREQUENCY

vs. TEMPERATURE

MAX6650/51-02

TEMPERATURE (°C)

FREQUENCY (kHz)

-50

050

100

VCC = 5.5V

VCC = 3.0V

2.0

2.1

2.3

2.2

2.4

2.5

FEEDBACK VOLTAGE

vs. TEMPERATURE

MAX6650/51-03

TEMPERATURE (°C)

FEEDBACK VOLTAGE (V)

-50

050

100

1.9

1.8

VCC = 5.5V,

V

FAN

= 5.5V, V

FAN

= 12.0V

V

FAN

= 12.0V, V

FAN

= 5.5V

V

CC

= 3.0V

1.80

1.85

1.90

1.95

2.00

2.05

2.10

2.15

2.20

3.0 3.5 4.0 4.5 5.0 5.5

FEEDBACK VOLTAGE vs. SUPPLY

VOLTAGE (DAC SET TO 35)

MAX6650/51-04

SUPPLY VOLTAGE (V)

FEEDBACK VOLTAGE (V)

V

FAN

= 5.5V

V

FAN

= 12.0V

2.0

2.4

2.2

2.8

2.6

3.0

3.2

3.6

3.4

3.8

3.0 3.4 3.8 4.2 4.63.2 3.6 4.0 4.4 4.8 5.0

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX6650/51-05

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

1.5

2.0

3.0

2.5

3.5

4.0

-40 0-20 20 40 60 80 100

SUPPLY CURRENT vs. TEMPERATURE

MAX6650/51-06

TEMPERATURE (°C)

SUPPLY CURRENT (mA)

VCC = 5.5V

VCC = 3V

TIMING CHARACTERISTICS (continued)

(VCC= 3.0V to 5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C and VCC= 5V.)

Note 1: For proper measurement of V

FB

, connect OUT and FB as shown in the

Typical Operating Circuit

.

Note 2: GPIO2, GPIO3, and GPIO4 only in the MAX6651.
Note 3: Note that the transition must internally provide at least a hold time to bridge the undefined region (300ns max) of SCL’s

falling edge.

Note 4: C

B

is the total capacitance of one bus line in pF. Tested with CB= 400pF. Rise and fall times are measured between 0.3 x

V

CC

and 0.7 x VCC.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

µs

ns050

0.6

t

SPIKE

t

SU:STO

Setup Time for Stop Condition

Pulse Width of Spike Suppressed

PIN

MAX6650/MAX6651

Fan-Speed Regulators and Monitors

with SMBus/I2C-Compatible Interface

_______________________________________________________________________________________ 5

Detailed Description

The MAX6650/MAX6651 use an SMBus/I2C-Compatible
interface to regulate and monitor the speed of
5VDC/12VDC brush-less fans with built-in open-collec­tor/drain tachometers. Regulating fan speed propor­tionally with temperature saves power, increases fan
life, and reduces acoustic noise. Since fan speed is
proportional to the voltage across the fan, the
MAX6650/MAX6651 control the speed by regulating the
voltage on the low side of the fan with an external MOS­FET or bipolar transistor.

The MAX6650/MAX6651 each contain two internal con­trol loops. The first loop controls the voltage across the
fan. The internal digital-to-analog converter (DAC) sets
the reference voltage for an internal amplifier (Figure 1),
which then drives the gate of an external N-channel
MOSFET (or the base of a bipolar transistor) to regulate
the voltage on the low side of the fan. As the reference
voltage provided by the DAC changes, the feedback
amplifier automatically adjusts the feedback voltage,
which changes the voltage across the fan.

The second control loop consists of the internal digital
logic that controls the fan’s speed. The MAX6650/
MAX6651 control fan speed by forcing the tachometer
frequency to equal a reference frequency set by the
Fan-Speed Register, the prescaler, and the internal
oscillator (see the

Fan-Speed Register

section). When
the tachometer frequency is too high, the value of the
DAC’s input register is increased by the regulator.
Once the DAC voltage increases, the analog control
loop forces the feedback voltage to rise, which reduces
the voltage across the fan. Since fan speed is propor­tional to the voltage across the fan, the fan slows down.

2-Wire SMBus/I2C-Compatible

Digital Interface

From a software perspective, the MAX6650/MAX6651
appear as a set of byte-wide registers that contain
speed control, tachometer count, alarm conditions, or
configuration bits. These devices use a standard
SMBus/I2C-compatible 2-wire serial interface to access
the internal registers.

Pin Description

FUNCTIONNAME

PIN

MAX6650 MAX6651

Tachometer Input. Used to close the loop around the tachometer.TACH011

— 2, 3, 16

TACH2, TACH3,

TACH1

Tachometer Inputs. Used to monitor tachometers only.

GroundGND42

3 5 SDA 2-Wire Serial-Data Input/Output (open drain)

2-Wire Serial Clock InputSCL64

5 8 ADD Slave Address Select Input (Table 1)

General-Purpose Input/Output (open drain). Configurable to act either as an out­put or as an input (FULL ON or general purpose).

General-Purpose Input/Output (open drain). Configurable to act as a general
input/output line or an active-low ALERT output.

General-Purpose Input/Output (open drain). Configurable to act as a general
input/output line, an internal clock output, or an external clock input.

Output. Drives the external MOSFET or bipolar transistor.

+3.0V to +5.5V Power Supply

Feedback Input. Closes the loop around the external MOSFET or bipolar tran­sistor.

FB

V

CC

OUT

GPIO2

GPIO0

GPIO196

7 10

11—

138

9 14

1510

— 7, 12 GPIO4, GPIO3 General-Purpose Input/Output (open drain)

MAX6650/MAX6651

Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface

6 _______________________________________________________________________________________

The MAX6650/MAX6651 employ three standard SMBus
protocols: write byte, read byte, and receive byte
(Figure 2). The shorter protocol (receive) allows quicker
transfers, provided that the correct data register was
previously selected by a write or read byte instruction.
Use caution with the shorter protocol in multimaster
systems, since a second master could overwrite the
command byte without informing the first master.

Slave Addresses

The device address can be set to one of four different
values. Accomplish this by pin-strapping ADD so that
more than one MAX6650/MAX6651 can reside on the
same bus without address conflicts (Table 1).

Figure 1. Block Diagram

Table 1. Slave Address Decoding (ADD)

BINARY

V

CC

1001 011

No connection (high-Z) 0011 011

10kΩ resistor to GND 0011 111

ADDRESS

ADD

1001 000GND

V

CC

V

3V TO 5.5V

SMBus/I

INTERFACE

2

C

CC

SCL

SDA

SMBus/I2C
INTERFACE

FAN SPEED

CONFIGURE

ALARM ENABLE

ALARM STATUS

TACH COUNT

COUNT TIME

GPIO DEF

GPIO STATUS

DAC

MAX6650
MAX6651

TACHOMETER

COUNT

CONTROL

LOGIC

10kΩ

V

90kΩ

OFFSET

90kΩ

10kΩ

TACH0

OUT

V

= 5V OR 12V

FAN

FAN

FB

8-BIT

DAC

10kΩ

ADD

GND

ADDRESS

DECODE

GPIO0

V

REF

(FIGURE 5)

GPIO1

GPIO

BLOCKS

ALERT

FULL ON

MAX6650/MAX6651

Slave Address Command byte: Selects

which register you are
writing to.

Data byte: Data goes into
the register set by the
command byte (to set
thresholds, configuration
masks, and sampling rate).

Figure 2a. SMBus Protocol: Write Byte Format

Slave Address Command byte: Selects

which register you are
reading from.

Slave Address.
Repeated due to
change in data-flow
direction

Data byte: Reads from
the register set by the
command byte.

Figure 2b. SMBus Protocol: Read Byte Format

Data byte: Reads data
from the register com­manded by the last
read-byte or write-byte
transmission; also
used for SMBus alert
response return address.

Figure 2c. SMBus Protocol: Receive Byte Format

S = Start condition Shaded = Slave transmission WR = Write = 0
P = Stop condition ACK = Acknowledged = 0 RD = Read =1

A = Not acknowledged = 1

Fan-Speed Regulators and Monitors

with SMBus/I2C-Compatible Interface

_______________________________________________________________________________________ 7

COMMANDS

8 bits

PACKDATA

8 bits

WR

0

ACKADDRESS

7 bits

ACK

COMMANDS

8 bits

WR

0

ACKADDRESS

7 bits

ACK

S P

A

DATA

8 bits

RD

1

ADDRESS

7 bits

ACK

S P

A

DATA

8 bits

RD

1

ADDRESS

7 bits

ACK

Slave Address

MAX6650/MAX6651

Fan-Speed Regulators and Monitors
with SMBus/I2C-Compatible Interface

8 _______________________________________________________________________________________

Figure 3. SMBus Write Timing Diagram

Figure 4. SMBus Read Timing Diagram

Command-Byte Functions

The 8-bit Command-Byte Register (Table 2) is the mas­ter index that points to the various other registers within
MAX6650/MAX6651. The register’s power-on reset
(POR) state is 0000 0000, so that a receive-byte trans­mission (a protocol that lacks the command byte)
occurring immediately after POR returns the current
speed setting.

Fan-Speed Register

In closed-loop mode, the MAX6650/MAX6651 use the
Fan-Speed Register to set the period of the tachometer
signal that controls the fan speed. The Fan-Speed
Register is ignored in all other modes of operation. The
MAX6650/MAX6651 regulate the fan speed by forcing
the tachometer period (t

TACH

) equal to the scaled reg-

ister value. One revolution of the fan generates two

tachometer pulses, so the required Fan-Speed Register
value (K

TACH

) may be calculated as:

t

TACH

= 1 / (2 x Fan Speed)

K

TACH

= [t

TACH

x K

SCALE

x (f

CLK

/ 128)] - 1

where the fan speed is in rotations per second (RPS),
t

TACH

is the period of the tachometer signal, f

CLK

is the
internal oscillator frequency (254kHz ±10%), and
K

SCALE

is the prescaler value (see

Configuration-Byte

Register

). Since the fan speed is inversely proportional
to the tachometer period, the Fan-Speed Register value
(K

TACH

) does not linearly control the fan speed (Table

3). Select the prescaler value so the fan’s full speed is
achieved with a register value of approximately 64
(0100 0000) to optimize speed range and resolution.
The MAX6651 may be controlled by an external oscilla-

AB CDEFG HIJ

t

LOWtHIGH

SMBCLK

SMBDATA

t

t

HD:STA

SU:STA

A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW

t

SU:DAT

F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
I = SLAVE PULLS SMBDATA LINE LOW

SMBCLK

SMBDATA

AB CDEFG H

t

t

HIGH

LOW

t

HD:DAT

K

J = ACKNOWLEDGE CLOCKED INTO MASTER
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION, DATA EXECUTED BY SLAVE
M = NEW START CONDITION

I

t

SU:STO

J

L

t

BUF

K

M

t

SU:STAtHD:STA

A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE

t

SU:DAT

E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER

I = ACKNOWLEDGE CLOCK PULSE
J = STOP CONDITION
K = NEW START CONDITION

t

t

SU:STO

BUF