Maxim MAX6618AUB+, MAX6618 Datasheet

General Description
The MAX6618 PECI-to-I2C translator provides an effi­cient, low-cost solution for PECI-to-SMBus
TM
/I2C proto­col conversion. The PECI-compliant host reads temperature data directly from up to four PECI-enabled CPUs.
The I2C interface provides an independent serial com­munication channel to communicate synchronously with peripheral devices in a multiple master or multiple slave system. This interface allows a maximum serial-data rate of 400kbps.
The MAX6618 is designed to operate from a +3.0V to +3.6V supply voltage and ambient temperature range of -20°C to +120°C.
Applications
Servers
Workstations
Desktop Computers
Features
400kbps I2C-Compatible, 2-Wire Serial Interface
+3V to +3.6V Supply Voltage
PECI-Compliant Port
PECI-to-I
2
C Translation
Programmable Temperature Offsets
-20°C to +120°C Operating Temperature Range
V
REF
Input Refers Logic Levels to the PECI
Supply Voltage
Automatic I
2
C Bus Lockup Timeout Reset
Lead-Free, 10-Pin µMAX
®
Package
MAX6618
PECI-to-I2C Translator
________________________________________________________________
Maxim Integrated Products
1
Typical Application Circuit
19-0730; Rev 0; 1/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
Ordering Information
T
= Tape and reel package.
+
Denotes a lead-free package.
SMBus is a trademark of Intel Corp.
µMAX is a registered trademark of Maxim Integrated Products.
PART TEMP RANGE PIN-PACKAGE
MAX6618AUB+ -20°C to +120°C 10 µMAX
MAX6618AUB+T -20°C to +120°C 10 µMAX
SDA
SCL
I2C
MASTER
SDA
SCL
AD2
AD1
AD0
GND
MAX6621
+3.3V
V
CPU
V
V
CC
V
REF
PECI
TT
CPU
INTERNAL
TEMP
SENSOR
MAX6618
PECI-to-I2C Translator
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(
Typical Application Circuit
, VCC= +3V to +3.6V, V
REF
= +0.95V to +1.26V, TA= -20°C to +120°C, unless otherwise noted. Typical
values are at V
CC
= +3.3V, V
REF
= +1.0V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages with respect to GND.) V
CC
..........................................................................-0.3V to +4V
AD0, AD1, AD2,..........................................-0.3V to (V
CC
+ 0.3V)
SCL, SDA .................................................................-0.3V to +6V
V
REF
.........................................................................-0.3V to +4V
PECI .........................................................-0.3V to (V
REF
+ 0.3V)
DC Current through SDA ...................................................10mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin µMAX (derate 5.6mW/°C over T
A
= +70°C)......444mW
Operating Temperature Range .........................-20°C to +120°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SUPPLY
Operating Supply Voltage V
Operating Supply Current I
Power-On-Reset Voltage V
INPUT SCL, INPUT/OUTPUT SDA
Low-Level Input Voltage V
High-Level Input Voltage V
Low-Level Output Voltage V
Leakage Current I
Input Capacitance C
ADDRESS INPUT A0
Low-Level Input Voltage V
High-Level Input Voltage V
Leakage Current I
Input Capacitance C
PECI
Supply Voltage to PECI Cell V
Input Voltage Range V
Low-Level Input Voltage Threshold
High-Level Input Voltage Threshold
CC
CC
POR
REF
V
V
SCL = 400kHz 4 7 mA
IL
IH
IOL = 6mA 0.4 V
OL
L
I
IL
IH
L
I
IN
IL
IH
x V
x V
0.275
x V
0.550
x V
3.0 3.6 V
2.60 2.95 V
0.3
x V
CC
0.7
CC
5.5 V
-1 +1 µA
10 pF
0.3
x V
CC
0.7
CC
V
CC
+ 0.3
-2 +2 µA
10 pF
0.95 1.26 V
V
-0.3
REF
+ 0.3
0.500
REF
x V
REF
0.725
REF
x V
REF
V
V
V
V
V
V
MAX6618
PECI-to-I2C Translator
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(
Typical Application Circuit
, VCC= +3V to +3.6V, V
REF
= +0.95V to +1.26V, TA= -20°C to +120°C, unless otherwise noted. Typical
values are at V
CC
= +3.3V, V
REF
= +1.0V, TA= +25°C.) (Note 1)
TIMING CHARACTERISTICS
(
Typical Application Circuit
, VCC= +3V to +3.6V, V
REF
= +0.95V to +1.26V, TA= -20°C to +120°C, unless otherwise noted. Typical
values are at V
CC
= +3.3V, V
REF
= +1.0V, TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Hysteresis V
Low-Level Sinking Current I
High-Level Sourcing Current I
Input Capacitance C
Signal-Noise Immunity Above 300MHz
H
IL
IH
(Note 2) 10 pF
I
V
(Note 2)
N
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I2C INTERFACE
Serial-Clock Frequency f
Bus Free Time Between a STOP and a START Condition
Hold Time, (Repeated) START Condition
Repeated START Condition Setup Time
STOP Condition Setup Time t
Data Hold Time t
Data Setup Time t
SCL Clock-Low Period t
SCL Clock-High Period t
Rise Time of Both SDA and SCL Signals, Receiving
Fall Time of Both SDA and SCL Signals, Receiving
Fall Time of SDA Transmitting t
Pulse Width of Spike Suppressed
Capacitive Load for Each Bus Line
PECI INTERFACE
Bit Time (Note 7) t
SCL
t
BUF
t
HD, STA
t
SU, STA
SU, STO
HD, DAT
SU, DAT
LOW
HIGH
t
F.TX
t
C
BIT
(Note 3) 0.9 µs
(Notes 4, 5)
R
t
(Notes 4, 5)
F
(Notes 4, 5)
(Notes 2, 6) 50 160 ns
SP
(Notes 2, 4) 400 pF
b
Overall time evident on PECI 0.495 500
Driven by MAX6618 0.495 250
0.1
x V
REF
0.5 1.0 mA
-6 mA
0.1
x V
REF
400 kHz
1.3 µs
0.6 µs
0.6 µs
0.6 µs
120 ns
1.3 µs
0.6 µs
20
+ 0.1C
20
+ 0.1C
20
+ 0.1C
b
b
b
300 ns
300 ns
250 ns
V
V
P-P
µs
MAX6618
PECI-to-I2C Translator
4 _______________________________________________________________________________________
Note 1: All parameters are tested at TA= +25°C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design; not production tested. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V
IL
of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 4: C
b
= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VCCand 0.7 x VCC.
Note 5: I
SINK
6mA. Cb= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 x VCCand 0.7 x VCC.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. Note 7: The MAX6618 must drive a more restrictive time to allow for quantized sampling errors by a client yet still attain the mini-
mum time less than 500µs. t
BIT
limits apply equally to t
BIT-A
and t
BIT-M
.
Note 8: The minimum and maximum bit times are relative to t
BIT
defined in the timing negotiation pulse.
Note 9: Extended trace lengths can appear as additional nodes. Note 10: The client may deassert its low idle drive prior to the falling edge of the first bit of the message by using the rising edge to
detect a message start. However, the time delay must be sufficient to qualify the rising edge as a true message rather than a noise spike.
Note 11: The message stop is defined by two consecutive periods when the bus has no rising edge. Tolerance around this time is
based on the t
BIT-M
error budget.
Note 12: t
SETUP
is not additive with t
STOP
. Rather, these times may overlap.
TIMING CHARACTERISTICS (continued)
(
Typical Application Circuit
, VCC= +3V to +3.6V, V
REF
= +0.95V to +1.26V, TA= -20°C to +120°C, unless otherwise noted. Typical
values are at V
CC
= +3.3V, V
REF
= +1.0V, TA= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Bit Time Jitter t
Between adjacent bits in an PECI message
BIT, jitter
header or data bytes after timing has been negotiated
1%
Change in Bit Time t
High-Level Time for Logic-High t
High-Level Time for Logic-Low t
Client Asserts PECI High During Logic-High
Rise Time t
Fall Time t
Hold Time t
Stop Time t
Maximum Dwell Time of the PECI Client
Minimum PECI Low Time Preceding a Message
BIT, drift
H1
H0
t
SU
HOLD
STOP
t
RESET
t
SETUP
Across a PECI address or PECI message bits as driven by MAX6618
2%
(Note 8) 0.6 0.75 0.8 x t
0.2 0.3 0.4 x t
0 0.2 x t
Measured from V
R
V
REF(nom)
Measured from VOH to VNMAX,
F
V
REF(nom)
-5% (Note 9)
+5% (Note 9)
OL
to V
MAX,
P
Time for client to maintain a low idle drive after MAX6618 begins a message (Note 10)
A constant low level driven by MAX6618 (Notes 8, 11)
2x t
From the end of a ResetDevice command to the next message to which the reset client must be able to respond
If the prior t the maximum t t
SETUP
is not known by MAX6618,
BIT
must be assumed and
BIT
= 1ms in this case (Note 12)
2x t
30 +
5/Node
30/Node ns
0.5 x t
0.4 ms
BIT
BIT
BIT-M
ns
BIT-1
BIT-M
BIT-X
MAX6618
Pin Description
PECI-to-I2C Translator
_______________________________________________________________________________________ 5
Block Diagram
PIN NAME FUNCTION
1 PECI Platform Environment Control Interface (PECI) Serial-Bus Input/Output
2 AGND Analog Ground
3 AD0 I2C Bus Device Address Selection Input AO
4 SDA I2C Bus Data Input/Output
5 SCL I2C Bus Clock Input/Output
6VCCPower Supply. Bypass to GND with a 0.1µF capacitor.
7 GND Power-Supply Ground
8 AD2 I2C Bus Device Address Selection Input A2
9 AD1 I2C Bus Device Address Selection Input A1
10 V
REF
PECI Input Supply Voltage. Bypass V
to AGND with a 0.1µF capacitor.
REF
MAX6618
SDA
2
I
PORT
C
SCL
A2
A1
PECI
PECI
TRANSLATION
ENGINE
PECI
PORT
A0
V
REF
MAX6618
PECI-to-I2C Translator
6 _______________________________________________________________________________________
Configuration
The MAX6618 has four configuration registers (Table 1). CONFIG0 is the main configuration register that enables the PECI sockets, I2C bus timeout, PEC, alert activation, and polling delay. CONFIG1 sets the number of retries,
CONFIG2 sets the temperature offset, and CONFIG3 controls the temperature averaging. You can write to the configuration registers to set the configuration or read from the configuration registers to get the current settings.
Detailed Description
The MAX6618 obtains temperature data from an inter­nal temperature sensor in PECI-compliant hosts. Up to four PECI hosts can be connected to the PECI I/O inter­face. The MAX6618 handles all the PECI transmissions
and uses a 2-wire, I
2
C-compatible serial interface to
communicate with the PECI host.
Registers and Commands
The following is an overview of the I2C/SMBus regis­ters/commands supported by the MAX6618.
Table 1. Configuration Registers
ADDRESS DESCRIPTION TRANSACTION TYPE
00h Read socket 0, domain 0 temperature register ReadWord
01h Read socket 0, domain 1 temperature register ReadWord
02h Read socket 1, domain 0 temperature register ReadWord
03h Read socket 1, domain 1 temperature register ReadWord
04h Read socket 2, domain 0 temperature register ReadWord
05h Read socket 2, domain 1 temperature register ReadWord
06h Read socket 3, domain 0 temperature register ReadWord
07h Read socket 3, domain 1 temperature register ReadWord
08h Read maximum temperature for all enabled sockets/domains register ReadWord
09h Read firmware version register ReadWord
0Ah Read maximum temperature address ReadWord
0Bh Read socket and domain that caused alert ReadWord
0Ch Read/write CONFIG0 register ReadWord/WriteWord
0Dh Read/write CONFIG1 register ReadWord/WriteWord
0Eh Read/write CONFIG2 register ReadWord/WriteWord
0Fh Read/write CONFIG3 register ReadWord/WriteWord
10h Read/write alert temperature for socket 0 ReadWord/WriteWord
11h Read/write alert temperature for socket 1 ReadWord/WriteWord
12h Read/write alert temperature for socket 2 ReadWord/WriteWord
13h Read/write alert temperature for socket 3 ReadWord/WriteWord
14h Request polling SendByte
15h Clear alert SendByte
COMMAND BYTE REGISTER DESCRIPTION TYPE RESULT
0Ch CONFIG0 register ReadWord/WriteWord See the CONFIG0 section.
0Dh CONFIG1 register ReadWord/WriteWord See the CONFIG1 section.
0Eh CONFIG2 register ReadWord/WriteWord See the CONFIG2 section.
0Fh CONFIG3 register ReadWord/WriteWord See the CONFIG3 section.
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