
General Description
The MAX6340/MAX6421–MAX6426 low-power microprocessor supervisor circuits monitor system voltages
from 1.6V to 5V. These devices perform a single function:
they assert a reset signal whenever the VCCsupply voltage falls below its reset threshold. The reset output
remains asserted for the reset timeout period after V
CC
rises above the reset threshold. The reset timeout is externally set by a capacitor to provide more flexibility.
The MAX6421/MAX6424 have an active-low, pushpull reset output. The MAX6422 has an active-high,
push-pull reset output and the MAX6340/MAX6423/
MAX6425/MAX6426 have an active-low, open-drain
reset output. The MAX6421/MAX6422/MAX6423 are
offered in 4-pin SC70 or SOT143 packages. The
MAX6340/MAX6424/MAX6425/MAX6426 are available
in 5-pin SOT23-5 packages.
Applications
Portable Equipment
Battery-Powered Computers/Controllers
Automotive
Medical Equipment
Intelligent Instruments
Embedded Controllers
Critical µP Monitoring
Set-Top Boxes
Computers
Features
♦ Monitor System Voltages from 1.6V to 5V
♦ Capacitor-Adjustable Reset Timeout Period
♦ Low Quiescent Current (1.6µA typ)
♦ Three RESET Output Options
Push-Pull RESET
Push-Pull RESET
Open-Drain RESET
♦ Guaranteed Reset Valid to V
CC
= 1V
♦ Immune to Short V
CC
Transients
♦ Small 4-Pin SC70, 4-Pin SOT143, and 5-Pin SOT23
Packages
♦ MAX6340 Pin Compatible with LP3470
♦ MAX6424/MAX6425 Pin Compatible with
NCP300–NCP303, MC33464/MC33465,
S807/S808/S809, and RN5VD
♦ MAX6426 Pin Compatible with PST92XX
MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
GND
( ) ARE FOR THE MAX6422
V
CC
14
SRT
MAX6421X
MAX6422X
MAX6423X
SC70
TOP VIEW
2
3
RESET
(RESET)
Pin Configurations
19-2440; Rev 2; 10/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Typical Operating Circuit appears at end of data sheet.
Selector Guide appears at end of data sheet.
Note: The MAX6340/MAX6421–MAX6426 are available with fac-
tory-trimmed reset thresholds from 1.575V to 5.0V in approximately 0.1V increments. Insert the desired nominal reset
threshold suffix (from Table 1) into the blanks. There are 50 standard versions with a required order increment of 2500 pieces.
Sample stock is generally held on standard versions only (see
Standard Versions Table). Required order increment is 10,000
pieces for nonstandard versions. Contact factory for availability.
All devices are available in tape-and-reel only.
Pin Configurations continued at end of data sheet.
查询MAX6340供应商
PART TEMP RANGE PIN-PACKAGE
MAX6340UK_ _-T -40°C to +125°C 5 SOT23-5
MAX6421XS_ _-T -40°C to +125°C 4 SC70-4
MAX6421US_ _-T -40°C to +125°C 4 SOT143-4
MAX6422XS_ _-T -40°C to +125°C 4 SC70-4
MAX6422US_ _-T -40°C to +125°C 4 SOT143-4
MAX6423XS_ _-T -40°C to +125°C 4 SC70-4
MAX6423US_ _-T -40°C to +125°C 4 SOT143-4
MAX6424UK_ _-T -40°C to +125°C 5 SOT23-5
MAX6425UK_ _-T -40°C to +125°C 5 SOT23-5
MAX6426UK_ _-T -40°C to +125°C 5 SOT23-5

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC= 1V to 5.5V, TA= T
MIN
to T
MAX
, unless otherwise specified. Typical values are at VCC= 5V and TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages Referenced to GND
VCC........................................................................-0.3V to +6.0V
SRT, RESET, RESET (push-pull).................-0.3V to (V
CC
+ 0.3V)
RESET (open drain)...............................................-0.3V to +6.0V
Input Current (all pins)......................................................±20mA
Output Current (RESET, RESET) ......................................±20mA
Continuous Power Dissipation (T
A
= +70°C)
4-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
4-Pin SOT143 (derate 4mW/°C above +70°C).............320mW
5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Devices production tested at +25°C. Overtemperature limits are guaranteed by design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage Range V
VCC Reset Threshold Accuracy V
Hysteresis V
VCC to Reset Delay t
Reset Timeout Period t
V
Ramp Current I
SRT
V
Ramp Threshold V
SRT
RAMP Threshold Hysteresis V
RESET Output Voltage High,
Push-Pull
RESET Output Leakage Current,
Open-Drain
RESET Output Voltage High V
RESET Output Voltage Low V
CC
VCC ≤ 5.0V 2.5 4.2
CC
VCC ≤ 3.3V 1.9 3.4Supply Current I
VCC ≤ 2.0V 1.6 2.5
TH
HYST
RD
RP
RAMP
TH-RAMPVCC
TA = +25°CV
TA = -40°C to +125°CV
VCC falling at 1mV/µs 80 µs
C
= 1500pF 3.00 4.375 5.75
SRT
C
= 0 0.275
SRT
V
= 0 to 0.65V; VCC = 1.6V to 5V 240 nA
SRT
= 1.6V to 5V (V
falling threshold 33 mV
RAMP
VCC ≥ 1.0V, I
OL
VCC ≥ 2.7V, I
VCC ≥ 4.5V, I
VCC ≥ 1.8V, I
V
OH
VCC ≥ 2.25V, I
VCC ≥ 4.5V, I
I
LKG
VCC > VTH, reset not asserted 1.0 µA
VCC ≥ 1.0V, I
OH
VCC ≥ 1.8V, I
VCC ≥ 2.7V, I
VCC ≥ 4.5V, I
VCC ≥ 1.8V, I
OL
VCC ≥ 2.7V, I
VCC ≥ 4.5V, I
1.0 5.5 V
- 1.5% VTH + 1.5%
TH
- 2.5% VTH + 2.5%
TH
4 x V
TH
rising) 0.65 V
RAMP
= 50µA 0.3
SINK
= 1.2mA 0.3RESET Output Voltage Low V
SINK
= 3.2mA 0.4
SINK
= 200µA 0.8 x V
SOURCE
= 500µA 0.8 x V
SOURCE
= 800µA 0.8 x V
SOURCE
= 1µA 0.8 x V
SOURCE
= 150µA 0.8 x V
SOURCE
= 500µA 0.8 x V
SOURCE
= 800µA 0.8 x V
SOURCE
= 500µA 0.3
SINK
= 1.2mA 0.3
SINK
= 3.2mA 0.4
SINK
CC
CC
CC
CC
CC
CC
CC
µA
V
mV
ms
V
V
V
V

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
_______________________________________________________________________________________ 3
Typical Operating Characteristics
(VCC= 5V, C
SRT
= 1500pF, TA = +25°C, unless otherwise noted.)
4.0
3.5
3.0
2.5
2.0
1.5
SUPPLY CURRENT (µA)
1.0
0.5
0
021 3456
600
550
500
450
400
350
300
RESET TIMEOUT PERIOD (µs)
250
200
-50 0 25-25
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
10,000
TA = +125°C
TA = +25°C
TA = -40°C
SUPPLY VOLTAGE (V)
1000
MAX6421/26 toc01
100
10
RESET TIMEOUT PERIOD (ms)
1
0.1
0.001 0.10.01 1 10
RESET TIMEOUT PERIOD
vs. TEMPERATURE
50
TEMPERATURE (°C)
C
= 0
SRT
75 100 125
MAX6421/26 toc04
vs. RESET THRESHOLD OVERDRIVE
175
150
125
100
75
50
TRANSIENT DURATION (µs)
25
0
0 400200 600 800 1000
RESET TIMEOUT PERIOD vs. C
C
(nF)
SRT
MAXIMUM TRANSIENT DURATION
RESET OCCURS
ABOVE THE CURVE
RESET THRESHOLD OVERDRIVE (mV)
SRT
100
VTH = 2.95V
4.30
MAX6421/26 toc02
4.25
4.20
4.15
RESET TIMEOUT PERIOD (ms)
MAX6421/26 toc05
4.10
160
150
140
130
120
110
TO RESET DELAY (µs)
CC
V
100
90
80
1000
RESET TIMEOUT PERIOD
vs. TEMPERATURE
C
= 1500pF
SRT
-50 0-25 25 50 75 100 125
TEMPERATURE (°C)
VCC TO RESET DELAY
vs. TEMPERATURE (V
VCC FALLING AT 1mVµs
-50 0 25-25
TEMPERATURE (°C)
CC
50
FALLING)
75 100 125
MAX6421/26 toc03
MAX6421/26 toc06
1V/div
1V/div
POWER-UP/POWER-DOWN
CHARACTERISTIC
V
CC
RESET
400µs/div
VTH = 1.6V
MAX6421/26 toc07
NORMALIZED RESET THRESHOLD
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
1.006
1.004
1.002
1.000
0.998
0.996
0.994
-50 25 50-25 0 75 100 125
TEMPERATURE (°C)
MAX6421/26 toc08

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
4 _______________________________________________________________________________________
Detailed Description
Reset Output
The reset output is typically connected to the reset input
of a µP. A µP’s reset input starts or restarts the µP in a
known state. The MAX6340/MAX6421–MAX6426 µP
supervisory circuits provide the reset logic to prevent
code-execution errors during power-up, power-down,
and brownout conditions (see Typical Operating
Characteristics).
RESET changes from high to low whenever VCCdrops
below the threshold voltage. Once VCCexceeds the
threshold voltage, RESET remains low for the capacitoradjustable reset timeout period.
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESET output. All device outputs
are guaranteed valid for VCC> 1V.
The MAX6340/MAX6423/MAX6425/MAX6426 are opendrain RESET outputs. Connect an external pullup resis-
tor to any supply from 0 to 5.5V. Select a resistor value
large enough to register a logic low when RESET is
asserted and small enough to register a logic high
while supplying all input current and leakage paths
connected to the RESET line. A 10kΩ to 100kΩ pullup
is sufficient in most applications.
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (tRP) by connecting a capacitor (C
SRT
) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
Pin Description
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESET
Output Allows Use with Multiple Supplies
PIN
MAX6421
MAX6340
SOT23 SOT143 SC70 SOT23 SOT23
1 3 3 5 1 SRT
2 1 2 3 2, 3 GND Ground
3 —— 4 — N.C. Not Internally Connected. Can be connected to GND.
42125VCCSupply Voltage and Reset Threshold Monitor Input
514RESET
—
MAX6422
MAX6423
44
MAX6424
MAX6425
——RESET
MAX6426
NAME FUNCTION
Set Reset Timeout Input. Connect a capacitor between SRT
and ground to set the timeout period. Determine the period as
follows: t
and C
SRT
RESET changes from high to low whenever V
the selected reset threshold voltage. RESET remains low for
the reset timeout period after V
threshold.
RESET changes from low to high whenever V
the selected reset threshold voltage. RESET remains high for
the reset timeout period after V
threshold.
C
SRT
= 2.73 ✕ 106 ✕ C
RP
in farads.
RESET
SRT
TIMEOUT
+ 275µs with tRP in seconds
SRT
exceeds the reset
CC
exceeds the reset
CC
3.3V
V
CC
LASER-TRIMMED
RESISTORS
V
REF
MAX6340
MAX6423
MAX6425
MAX6426
RESET
N
GND
CC
CC
drops below
drops below
5.0V
10kΩ
5V
SYSTEM

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
_______________________________________________________________________________________ 5
C
SRT
= (tRP- 275µs) / (2.73 ✕ 106)
where tRPis in seconds and C
SRT
is in farads.
The reset delay time is set by a current/capacitor-controlled ramp compared to an internal 0.65V reference.
An internal 240nA ramp current source charges the
external capacitor. The charge to the capacitor is
cleared when a reset condition is detected. Once the
reset condition is removed, the voltage on the capacitor
ramps according to the formula: dV/dt = I/C. The C
SRT
capacitor must ramp to 0.65V to deassert the reset.
C
SRT
must be a low-leakage (<10nA) type capacitor;
ceramic is recommended.
Operating as a Voltage Detector
The MAX6340/MAX6421–MAX6426 can be operated in a
voltage detector mode by floating the SRT pin. The reset
delay times for VCCrising above or falling below the
threshold are not significantly different. The reset output is
deasserted smoothly without false pulses.
Applications Information
Interfacing to Other Voltages for Logic
Compatibility
The open-drain outputs of the MAX6340/MAX6423/
MAX6425/MAX6426 can be used to interface to µPs with
other logic levels. As shown in Figure 1, the open-drain
output can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various µPs.
Wired-OR Reset
To allow auxiliary circuitry to hold the system in reset,
an external open-drain logic signal can be connected
to the open-drain RESET of the MAX6340/MAX6423/
MAX6425/MAX6426, as shown in Figure 2. This configuration can reset the µP, but does not provide the reset
timeout when the external logic signal is released.
Negative-Going VCCTransients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The graph Maximum Transient
Duration vs. Reset Threshold Overdrive in the Typical
Operating Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negativegoing pulse applied to VCC, starting above the actual
reset threshold (VTH) and ending below it by the magnitude indicated (reset-threshold overdrive). As the magnitude of the transient decreases (farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, a V
CC
transient that goes 100mV
below the reset threshold and lasts 50µs or less does
not cause a reset pulse to be issued.
Ensuring a Valid RESET or
RESET
Down to VCC= 0
When VCCfalls below 1V, RESET/RESET current-sinking (sourcing) capabilities decline drastically. In the
case of the MAX6421/MAX6424, high-impedance
CMOS-logic inputs connected to RESET can drift to
undetermined voltages. This presents no problems in
most applications, since most µPs and other circuitry
do not operate with VCCbelow 1V.
In those applications where RESET must be valid down
to zero, adding a pulldown resistor between RESET
and ground sinks any stray leakage currents, holding
RESET low (Figure 3). The value of the pulldown resistor is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. For
applications using the MAX6422, a 100kΩ pullup resis-
Figure 2. Wired-OR Reset Circuit
V
CC
V
DD
10kΩ
MAX6340
MAX6423
MAX6425
MAX6426
RESET
N
GND
OPEN-DRAIN
LOGIC
N
µP
RESET

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
6 _______________________________________________________________________________________
tor between RESET and VCCholds RESET high when
VCCfalls below 1V (Figure 4). Open-drain RESET ver-
sions are not recommended for applications requiring
valid logic for VCCdown to zero.
Layout Consideration
SRT is a precise current source. When developing the
layout for the application, be careful to minimize board
capacitance and leakage currents around this pin.
Traces connected to SRT should be kept as short as
possible. Traces carrying high-speed digital signals
and traces with large voltage potentials should be routed as far from SRT as possible. Leakage current and
stray capacitance (e.g., a scope probe) at this pin
could cause errors in the reset timeout period. When
evaluating these parts, use clean prototype boards to
ensure accurate reset periods.
Figure 3. Ensuring
RESET
Valid to VCC= 0
Figure 4. Ensuring RESET Valid to VCC= 0
Table 1. Reset Threshold Voltage Suffix
V
CC
V
CC
MAX6421
MAX6424
RESET
GND
MAX6422
GND
V
CC
RESET
100kΩ
V
CC
100kΩ
SUFFIX MIN TYP MAX
16 1.536 1.575 1.614
17 1.623 1.665 1.707
18 1.755 1.800 1.845
19 1.853 1.900 1.948
20 1.950 2.000 2.050
21 2.048 2.100 2.153
22 2.133 2.188 2.243
23 2.313 2.313 2.371
24 2.340 2.400 2.460
25 2.438 2.500 2.563
26 2.559 2.625 2.691
27 2.633 2.700 2.768
28 2.730 2.800 2.870
29 2.852 2.925 2.998
30 2.925 3.000 3.075
31 2.998 3.075 3.152
32 3.120 3.200 3.280
33 3.218 3.300 3.383
34 3.315 3.400 3.485
35 3.413 3.500 3.558
36 3.510 3.600 3.690
37 3.608 3.700 3.793
38 3.705 3.800 3.895
39 3.803 3.900 3.998
40 3.900 4.000 4.100
41 3.998 4.100 4.203
42 4.095 4.200 4.305
43 4.193 4.300 4.408
44 4.266 4.375 4.484
45 4.388 4.500 4.613
46 4.509 4.625 4.741
47 4.583 4.700 4.818
48 4.680 4.800 4.920
49 4.778 4.900 5.023
50 4.875 5.000 5.125

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
_______________________________________________________________________________________ 7
Standard Versions Table
*Sample stock is generally held on all standard versions. Contact
factory for availability of nonstandard versions.
Typical Operating Circuit
PART* OUTPUT STAGE TOP MARK
MAX6340UK16-T Open-Drain RESET AEBE
MAX6340UK22-T Open-Drain RESET AEBG
MAX6340UK26-T Open-Drain RESET AEBI
MAX6340UK29-T Open-Drain RESET AEBJ
MAX6340UK46-T Open-Drain RESET AEBM
MAX6421US16-T Push-Pull RESET KADA
MAX6421XS16-T Push-Pull RESET ACU
MAX6421US22-T Push-Pull RESET KADE
MAX6421XS22-T Push-Pull RESET ACY
MAX6421US26-T Push-Pull RESET KADG
MAX6421XS26-T Push-Pull RESET ADA
MAX6421US29-T Push-Pull RESET KADH
MAX6421XS29-T Push-Pull RESET ADB
MAX6421US46-T Push-Pull RESET KADK
MAX6421XS46-T Push-Pull RESET ADE
MAX6422US16-T Push-Pull RESET KABD
MAX6422XS16-T Push-Pull RESET ACV
MAX6422US22-T Push-Pull RESET KADM
MAX6422XS22-T Push-Pull RESET ADG
MAX6422US26-T Push-Pull RESET KADO
MAX6422XS26-T Push-Pull RESET ADI
MAX6422US29-T Push-Pull RESET KADP
MAX6422XS29-T Push-Pull RESET ADJ
MAX6422US46-T Push-Pull RESET KADS
MAX6422XS46-T Push-Pull RESET ADM
PART* OUTPUT STAGE TOP MARK
MAX6423US16-T Open-Drain RESET KADC
MAX6423XS16-T Open-Drain RESET ADUF
MAX6423US22-T Open-Drain RESET KADU
MAX6423XS22-T Open-Drain RESET ADUK
MAX6423US26-T Open-Drain RESET KADW
MAX6423XS26-T Open-Drain RESET ADUM
MAX6423US29-T Open-Drain RESET KADX
MAX6423XS29-T Open-Drain RESET ADUN
MAX6423US46-T Open-Drain RESET KAEA
MAX6423XS46-T Open-Drain RESET ADUQ
MAX6424UK16-T Push-Pull RESET ADUF
MAX6424UK22-T Push-Pull RESET ADUK
MAX6424UK26-T Push-Pull RESET ADUM
MAX6424UK29-T Push-Pull RESET ADUN
MAX6424UK46-T Push-Pull RESET ADUQ
MAX6425UK16-T Open-Drain RESET ADUG
MAX6425UK22-T Open-Drain RESET ADUS
MAX6425UK26-T Open-Drain RESET ADUU
MAX6425UK29-T Open-Drain RESET ADUV
MAX6425UK46-T Open-Drain RESET ADUY
MAX6426UK16-T Open-Drain RESET ADUH
MAX6426UK22-T Open-Drain RESET ADVA
MAX6426UK26-T Open-Drain RESET ADVC
MAX6426UK29-T Open-Drain RESET ADVD
MAX6426UK46-T Open-Drain RESET ADVG
LASER-TRIMMED
RESISTORS
V
REF
RESET
SRT
C
SRT
TIMEOUT
GND
V
CC
V
CC
MAX6421
MAX6424
RESET
µP
RESET

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
8 _______________________________________________________________________________________
Pin Configurations (continued)
Chip Information
TRANSISTOR COUNT: 295
PROCESS: BiCMOS
TOP VIEW
RESET
15SRT
RESET
1 5 SRT
GND
N.C.
GND
V
CC
MAX6340
2
34
SOT23
14
MAX6421U
MAX6422U
MAX6423U
2
SOT143
3
V
CC
RESET
(RESET)
SRT
V
CC
GND
SRT
GND
GND RESET
MAX6424
2
MAX6425
34
SOT23
15V
MAX6426
2
34
SOT23
N.C.
CC
PART PUSH-PULL RESET PUSH-PULL RESET OPEN-DRAIN RESET PIN-PACKAGE
MAX6340 ——✔ 5 SOT23
MAX6421 ✔ ——4 SOT143/SC70
MAX6422 — ✔ — 4 SOT143/SC70
MAX6423 ——✔ 4 SOT143/SC70
MAX6424 ✔ ——5 SOT23
MAX6425 ——✔ 5 SOT23

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
_______________________________________________________________________________________ 9
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SC70, 4L.EPS

MAX6340/MAX6421–MAX6426
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SOT5L.EPS