The MAX562 is designed specifically for notebook and
palmtop computers that need to transfer data quickly.
It runs at data rates up to 230kbps, and has a guaranteed 4V/µs slew rate. This device meets the new
EIA/TIA-562 standard that guarantees compatibility with
RS-232 interfaces.
The MAX562 has low-power shutdown and keep-awake
modes. In keep-awake mode, the transmitters are disabled but all receivers are active, allowing unidirectional communication. In shutdown mode, the entire chip is
disabled and all outputs are in a high-impedance state.
The MAX562 is available in a standard 28-pin SO package, and in a smaller footprint shrink small-outline
package (SSOP).
________________________Applications
Palmtop, Notebook, and Subnotebook
Computers
Peripherals
Battery-Powered Equipment
__________Typical Operating Circuit
0.33µF0.33µF
+2.7V TO
+5.25V
INPUT
CMOS
INPUTS
CMOS
OUTPUTS
0.33µF
R1
R2
R3
R4
R5
0.33µF
T1
IN
T2
IN
T3
IN
OUT
OUT
OUT
OUT
OUT
EN
2
C1AC1B
C1A+ C1A-C1B+ C1B-
1
V
CC
DOUBLER/TRIPLER
25
C2+
C2
24
C2-
11
12
13
6
7
8
9
10
14
VOLTAGE
VOLTAGE
INVERTER
T1
T2
T3
R1
R2
R3
R4
R5
GND
27
MAX562
453
28
V+
C30.68µF
26
V-
5k
5k
5k
5k
5k
18
17
16
23
22
21
20
19
15
C40.33µF
T1
OUT
T2
OUT
T3
OUT
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
SHDN
EIA/TIA
-562
OUTPUTS
EIA/TIA
-562
INPUTS
____________________________Features
♦ 230kbps Data Rate, LapLink™ Compatible
♦ Operates from a 2.7V to 5.25V Supply
♦ Designed for EIA/TIA-562 and EIA/TIA-232 Applications
♦ Guaranteed 4.0V/µs Slew Rate
♦ 3 Drivers, 5 Receivers
♦ Flow Through Pinout
♦ Low-Power Shutdown and Keep-Awake Modes
♦ Low-Cost, Surface-Mount External Capacitors
______________Ordering Information
PARTTEMP. RANGEPIN-PACKAGE
MAX562CWI0°C to +70°C28 SO
MAX562CAI0°C to +70°C28 SSOP
MAX562C/D0°C to +70°CDice*
MAX562EWI-40°C to +85°C28 SO
MAX562EAI-40°C to +85°C28 SSOP
* Contact factory for dice specifications.
__________________Pin Configuration
TOP VIEW
V+
28
GND
27
V-
26
C2+
25
C2-
24
R1
23
IN
22
R2
IN
21
R3
IN
20
R4
IN
19
R5
IN
18
T1
OUT
T2
17
OUT
T3
16
OUT
15
SHDN
C1A+
C1B+
C1BC1A-
R1
R2
R3
R4
R5
1
V
CC
2
3
4
5
OUT
OUT
OUT
OUT
OUT
T1
T2
T3
EN
MAX562
6
7
8
9
10
IN
11
12
IN
13
IN
14
SO/SSOP
MAX562
™ LapLink is a registered trademark of Traveling Software, Inc.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
........................................ -0.3V to (VCC+ 0.3V)
Complete 230kbps, 2.7V to 5.25V
Serial Interface for Notebook Computers
+3V
SHDN
0V
V
MAX562
A. TIMING DIAGRAM
B. TEST CIRCUIT
OH
TRANSMITTER
OUTPUTS
V
OL
1 OR 0T
X
OUTPUT DISABLE TIME (tDT)
+3V
0V
-3V
3k
50pF
Figure 3. Transmitter-Output Disable Timing
_______________Detailed Description
The MAX562 has three sections: the charge-pump voltage
converter, the drivers (transmitters), and the receivers.
Charge-Pump Voltage Converter
The charge-pump voltage converter is used to produce a
positive and a negative supply to drive the transmitters. The
positive voltage (V+) is generated by a regulated charge
pump working as either a doubler or a tripler (depending on
the VCClevel) and using capacitors C1A, C1B and C3 (see
Typical Operating Circuit
from V+ using a simple charge-pump inverter that employs
capacitors C2 and C4.
These charge-pump converters are regulated to give output
voltages of +5.8V and -5.2V. Having regulated supplies
generated on-chip makes the MAX562's performance insensitive to variations in V
ing changes, and operating temperature changes.
SHDN
When
is low, the charge pumps are disabled, V+ is
internally connected to VCC, and V- is internally connected to
GND.
). The negative voltage (V-) derives
from 2.7V to 5.25V, transmitter load-
CC
EN
R_
IN
A. TEST CIRCUIT
EN INPUT
RECEIVER
OUTPUTS
B. ENABLE TIMING
EN INPUT
RECEIVER
OUTPUTS
C. DISABLE TIMING
V
V
R_
1k
OUT
R_
+3V
0V
OH
OL
150pF
0V
OUTPUT ENABLE TIME (t
V
OH
V
OL
+3V
OUTPUT DISABLE TIME (tDR)
V
VOL +0.5V
OH
-0.5V
-1V,
V
OH
+1.6V
V
OL
EN
EN
)
ER
Figure 4. Receiver-Output Enable and Disable Timing
EIA/TIA-562 Drivers
The driver output voltage is guaranteed to meet the ±3.7V
EIA/TIA-562 specification over the full range of operating
temperatures and voltages, when each transmitter is
loaded with up to 3kΩ and operated up to 230kbps (see
Typical Operating Characteristics
). The typical driver output voltage swing exceeds ±4V with a 3kΩ load on all
transmitter outputs. The open-circuit output voltage swing
is typically from (V+ - 0.7V) to (V- + 0.7V). Output swing is
not significantly dependent on VCCsince the charge
pumps are regulated.
Input thresholds are CMOS and TTL compatible. Connect
unused inputs to V
SHDN
When
is low, the driver outputs are off and their leak-
or to GND.
CC
age currents are less than 10µA, even if the transmitter
outputs are back-driven between -7V and +15V. Taking
SHDN
low does not disable the receivers.
SHDN
When
and EN are both low, the entire chip is
disabled and all outputs are high impedance. Power
consumption is lowest in this condition. Exiting shutdown
takes about 100µs, but depends on VCC. Figure 5 shows
the MAX562 transmitter outputs when
transmitter outputs are shown going to opposite EIA/TIA562 levels (one transmitter input is high, the other is low).
Each transmitter is loaded with 3kΩ in parallel with
2500pF. The transmitter outputs are well behaved, with
no ringing or undesirable transients as they come out of
shutdown.
Each transmitter is designed to drive a single receiver.
Transmitters can be paralleled to drive multiple
receivers.
All 5 receivers are identical and accept EIA/TIA-562 or
EIA/TIA-232 signals. The CMOS receiver outputs swing
between VCCand GND. They are inverting, maintaining
compatibility with the driver outputs.
SHDN
VCC = +2.2V VCC = +2.7VVCC = +5.0VVCC = +3.3V
0
TIME (µs)
Driving Multiple Receivers
EIA/TIA-562 Receivers
200300100
SHDN
rises. Two
The guaranteed 0.8V and 2.4V receiver input thresholds are significantly tighter than the ±3.0V thresholds
required by the EIA/TIA-562 specification. This allows
the receiver inputs to respond to TTL/CMOS logic levels as well as EIA/TIA-562/232 levels. Also, the
MAX562's guaranteed 0.8V lower threshold ensures
that receivers shorted to ground will have a logic 1 output. The 5kΩ input resistance to ground ensures that a
receiver with its input left open will also have a logic 1
output.
The receiver inputs have approximately 0.3V hysteresis
SHDN
when
is high. This provides clean output transitions, even with slowly moving input signals with moderate noise and ringing.
The receivers are active when EN is high. When EN is
low, the receiver outputs are high impedance. This
allows wire-OR connection of two EIA/TIA-562 ports (or
ports of different types) at the UART.
The receivers are always active,when EN is high, irrespective of
SHDN
's state. When
SHDN
is high, the
receivers have hysteresis and experience the shortest
propagation delays (typically 100ns falling, 250ns rising). When
SHDN
is low, the receivers have longer
propagation delays (typically 3µs falling, 2µs rising)
and have no hysteresis. The receiver outputs are not
valid for 50µs after
SHDN
goes low.
Shutdown and Enable Control
SHDN
and EN determine the operation of the MAX562
as shown in Table 1.
__________Applications Information
Capacitor Selection
The capacitor type is not critical for proper MAX562
operation. Any low cost ceramic capacitor (e.g., Z5U,
Y5V) is acceptable for operating at room temperature,
Table 2. Summary of EIA/TIA-232E/V.28 and EIA/TIA-562 Specifications
PARAMETERCONDITION
Driver Output Voltage
0 Level
1 Level-5.0V to -15.0V-3.7V to -13.2V
MAX562
3kΩ to 7kΩ load
EIA/TIA-232E/V.28
SPECIFICATION
5.0V to 15.0V3.7V to 13.2V
Maximum Output LevelNo load±25V±13.2V
= 2500pFUp to 20kbpsUp to 20kbps
C
Signal Rate (3kΩ ≤ R
≤ 7kΩ)
L
and X7R ceramic capacitors are recommended for
L
= 1000pFNot definedUp to 64kbps
C
L
___________________Chip Topography
operation over the full temperature range.
Larger capacitors may be used for C2 and C4 (see
Typical Operating Circuit
) to reduce ripple on the trans-
mitter output voltages.
C1B+
C1A+
32128 27 2625
V
CC
GNDV-C2+
V+
Power-Supply Decoupling
In applications that are sensitive to power-supply noise,
decouple VCCto ground with a capacitor similar in
value to that of the C1A and C1B charge-pump capacitors. Connect the bypass capacitor as close as possible to the VCCand GND pins.
C1B-
C1A-
4
5
V+ and V- as Power Supplies
A small amount of power can be drawn from V+ and V-.
Excessive loads will cause V+ and V- to fall out of
regulation. When V+ or V- are loaded, check for good
regulation over the intended operating temperature
range.
R1
R2
R3
R4
R5
OUT
OUT
OUT
OUT
OUT
6
7
8
9
10
EIA/TIA-562
SPECIFICATION
24
23
22
21
20
19
C2-
0.164"
(4.166mm)
R1
IN
R2
IN
R3
IN
R4
IN
R5
IN
11 12 13 14 15161718
T2
EN
IN
T1
T3
IN
IN
T3
SHDN
0.135"
(3.429mm)
OUT
T1
OUT
T2
OUT
Substrate connected to V+
Transistor count: 1892
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
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