________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Low-Cost Stereo Audio DAC
MAX5556
General Description
The MAX5556 stereo audio sigma-delta digital-to-analog
converter (DAC) offers a simple and complete stereo
digital-to-analog solution for media servers, set-top
boxes, video-game hardware, automotive rear-seat
entertainment, and other general consumer audio applications. This DAC features built-in digital interpolation/filtering, sigma-delta digital-to-analog conversion, and
analog output filtering. Control logic and mute circuitry
minimize audible pops and clicks during power-up,
power-down, clock changes, or when invalid clock conditions occur.
The MAX5556 receives input data over a 3-wire
I2S-compatible interface with left-justified audio data.
Data can be clocked by either an external or internal
serial clock. The internal serial clock frequency is programmable by selection of a master clock (MCLK) and
sample clock (LRCLK) ratio. Sampling rates from 2kHz
to 50kHz are supported.
The MAX5556 operates from a single +4.75V to +5.5V
analog supply with total harmonic distortion plus noise
below -87dB. This device is available in an 8-pin SO
package and is specified over the -40°C to +85°C
industrial temperature range.
Applications
Digital Video Recorders and Media Servers
Set-Top Boxes
Video-Game Hardware
Automotive Rear-Seat Entertainment
Features
o Simple and Complete Stereo Audio DAC
Solutions, No Controls to Set
o Sigma-Delta Stereo DACs with Built-In
Interpolation and Analog Output Filters
o I2S-Compatible Digital Audio Interface
o Clickless/Popless Operation
o 3.5V
P-P
Output Voltage Swing
o -87dB THD+N
o +87dB Dynamic Range
o Sample Frequencies (fS) from 2kHz to 50kHz
o Master Clock (MCLK) up to 25MHz
o Automatic Detection of Clock Ratio (MCLK/
LRCLK)
Ordering Information
Typical Operating Circuit
+Denotes a lead(Pb)-free/RoHS-compliant package. For leaded version, contact factory.
/V denotes an automotive-qualified part.
PART
MAX5556ESA+
MAX5556ESA/V+
TEMP
RANGE
-40°C to
+85°C
-40°C to
+85°C
PIN-
PACKAGE
8 SO
8 SO
DATA FORMAT
Left-justified I
data
Left-justified I
data
2
S
2
S
+5V
TOP VIEW
V
AUDIO
DECOMPRESSION
CLOCK
SDATA
SCLK
LRCLK
MCLK
SERIAL
INTERFACE
GND
DD
OUTL
OUTR
FILTER
FILTER
DAC
MAX5556
DAC
LINE-LEVEL
BUFFER
LINE-LEVEL
BUFFER
LEFT
OUTPUT
RIGHT
OUTPUT
SDATA
SCLK
LRCLK
+
1
2
MAX5556
3
4
87OUTL
V
DD
GND
6
OUTRMCLK
5
SO
Low-Cost Stereo Audio DAC
MAX5556
2 _______________________________________________________________________________________
VDDto GND...........................................................-0.3V to +6.0V
OUTL, OUTR, SDATA to GND................... -0.3V to (V
DD
+ 0.3V)
Current Any Pin (excluding V
DD
and GND)......................±10mA
OUTL, OUTR Shorted to GND....................................Continuous
SCLK, LRCLK, MCLK to GND ...............................-0.3V to +6.0V
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)...............471mW
Package Thermal Resistance (θ
JA
) ...............................170°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK(fS
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, TA= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
POWER SUPPLY
Supply Voltage V
Supply Current I
Power Dissipation
DYNAMIC PERFORMANCE (Note 2)
Dynamic Range, 16-Bit
Dynamic Range, 18-Bit to 24-Bit
Total Harmonic Distortion Plus
Noise, 16-Bit
Total Harmonic Distortion Plus
Noise, 18-Bit to 24-Bit
Interchannel Isolation 1kHz full-scale output (crosstalk) 94 dB
COMBINED DIGITAL AND INTEGRATED ANALOG FILTER FREQUENCY RESPONSE (Note 3)
Passband
Frequency Response/Passband
Ripple
Stopband 0.5465 f
Stopband Attenuation 52 dB
Group Delay
Passband Group-Delay Variation ∆t
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DD
DD
THD+N
THD+N
t
gd
gd
Up to 48ksps 13 15
Static digital 6 8.5
Up to 48ksps 65 82.5
Static digital 30 44
Unweighted 84 86
A-weighted 86 90
Unweighted 87
A-weighted 91
0dBFS -86 -81
-20dBFS -67
-60dBFS -26 -24
0dBFS -87
-20dBFS -68
-60dBFS -27
-0.5dB corner 0.46
-3dB corner 0.49
-6dB corner 0.50
10Hz to 20kHz (fS = 48kHz) -0.025 +0.08
10Hz to 20kHz (fS = 44.1kHz) -0.025 +0.08
10Hz to 16kHz (f
20Hz to 20kHz ±0.4/f
= 32kHz) -6.000 +0.073
S
20/f
S
S
4.75 5.0 5.50 V
mA
mW
dB
dB
dB
dB
f
S
dB
S
s
s
Low-Cost Stereo Audio DAC
MAX5556
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK(fS
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, TA= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, TA= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC CHARACTERISTICS
Interchannel Gain Mismatch 0.1 0.4 dB
Gain Error -5 +5 %
Gain Drift 100 ppm/°C
ANALOG OUTPUTS
Full-Scale Output Voltage
DC Quiescent Output Voltage V
Minimum Load Resistance R
Maximum Load Capacitance C
Power-Supply Rejection Ratio PSRR
POP AND CLICK SUPPRESSION
Mute Attenuation 100 dB
Power-Up Until Bias Established Figure 11 360 ms
Valid Clock to Normal Operation Soft-start ramp time, Figure 12 (Note 5) 20 ms
DIGITAL AUDIO INTERFACE (SCLK, SDATA, MCLK, LRCLK)
Input-Voltage High V
Input-Voltage Low V
Input Leakage Current I
Input Capacitance 8pF
TIMING CHARACTERISTICS
Input Sample Rate f
MCLK Pulse-Width High t
EXTERNAL SCLK MODE
LRCLK Duty Cycle (Note 6) 25 75 %
SCLK Pulse-Width Low t
SCLK Pulse-Width High t
SCLK Period t
LRCLK Edge to SCLK Rising
LRCLK Edge to SCLK Rising
SDATA Valid to SCLK Rising
SCLK Rising to SDATA Hold Time t
V
OU T R
MCLKL
MCLKH
SCLKL
SCLKH
t
t
, V
OU T L
Q
L
L
IH
IL
IN
S
SCLK
SLRS
SLRH
t
SDS
SDH
3.25 3.5 3.75 V
Input code = 0 2.4 V
3kΩ
100 pF
V
RIPPLE
= 100mV
, frequency = 1kHz
P-P
66 dB
2.0 V
0.8 V
-10 +10 µA
2 50 kHz
MCLK/LRCLK = 512 10
MCLK/LRCLK = 384 20MCLK Pulse-Width Low t
MCLK/LRCLK = 256 20
MCLK/LRCLK = 512 10
MCLK/LRCLK = 384 20
MCLK/LRCLK = 256 20
20 ns
20 ns
1/(128
x f
)
S
20 ns
20 ns
20 ns
20 ns
P-P
ns
ns
ns
Low-Cost Stereo Audio DAC
MAX5556
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +4.75V to +5.5V, V
GND
= 0V, R
OUT
_ = 10kΩ, C
OUT
_ = 10pF, 0dBFS sine-wave signal at 997Hz, f
LRCLK(fS
) = 48kHz, f
MCLK
= 12.288MHz, measurement bandwidth 10Hz to 20kHz, TA= -40°C to +85°C, outputs are unloaded, unless otherwise noted. Typical
values at V
DD
= +5V, TA= +25°C.) (Note 1)
Note 1: 100% production tested at T
A
= +85°C. Limits to -40°C are guaranteed by design.
Note 2: 0.5 LSB of triangular PDF dither added to data.
Note 3: Guaranteed by design, not production tested.
Note 4: PSRR test block diagram shown in Figure 1 denotes the test setup used to measure PSRR.
Note 5: Volume ramping interval starts from establishment of a valid MCLK to LRCLK ratio. Total time is proportional to the sample
rate (f
S
). 20ms based on 48ksps operation.
Note 6: In external SCLK mode, LRCLK duty cycles are not limited, provided all data formatting requirements are met. See Figure 4.
Note 7: The LRCLK duty cycle must be 50% ±1/2 MCLK period in internal SCLK mode.
Note 8: The SCLK/LRCLK ratio can be set to 32, 48, or 64, depending on the MCLK/LRCLK ratio selected. See Figure 4.
Figure 1. PSRR Test Block Diagram
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
INTERNAL SCLK MODE
LRCLK Duty Cycle (Note 7) 50 %
Internal SCLK Period t
LRCLK Edge to Internal SCLK
SDATA Valid to Internal SCLK
Rising Setup Time
ISCLK
t
ISCLKR
t
ISDS
t
ISDH
(Note 8) 1/f
t
MCLK period = t
MCLK
MCLK
SCLK
t
MCLK
+ 10
t
ISCLK
/2 ns
ns
ns
V
DD
LOUT, ROUT
SPECTRUM
ANALYZER
AUDIO SIGNAL
GENERATOR
AT 1kHz)
(100mV
P-P
DC POWER SUPPLY
(5VDC)
Z
G
SCLK
LRCLK
MCLK
ACTIVE CLOCKS
+
-
SD ATA
MAX5556
GND
Low-Cost Stereo Audio DAC
MAX5556
_______________________________________________________________________________________ 5
(VDD= +5V, V
GND
= 0V, R
OUT_
= 10kΩ, C
OUT_
= 10pF, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics
-0.25
-0.15
-0.20
-0.05
-0.10
0.05
0
0.10
0.20
0.15
0.25
0 0.1 0.2 0.3 0.4 0.5
PASSBAND RIPPLE
MAX5556 toc04
FREQUENCY (NORMALIZED TO fS)
AMPLITUDE (dB)
-100
-110
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-130
-120
-140
0 2 4 6 8 101214161820
FREQUENCY (kHz)
AMPLITUDE (dBr)
0dBFS FFT
MAX5556 toc05
16,000-SAMPLE FFT USING 1kHz INPUT
-100
-110
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-130
-120
-140
0 2 4 6 8 101214161820
FREQUENCY (kHz)
AMPLITUDE (dBr)
-60dBFS FFT
MAX5556 toc06
16,000-SAMPLE FFT USING 1kHz INPUT
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
0 0.2 0.3 0.40.1 0.5 0.6 0.7 0.90.8 1.0
STOPBAND REJECTION
MAX5556 toc01
FREQUENCY (NORMALIZED TO fS)
AMPLITUDE (dB)
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
0.40 0.44 0.48 0.52 0.56 0.60
TRANSITION BAND
MAX5556 toc02
FREQUENCY (NORMALIZED TO fS)
AMPLITUDE (dB)
-10
-7
-8
-9
-6
-5
-4
-3
-2
-1
0
0.40 0.440.42 0.46 0.48 0.50 0.52
TRANSITION BAND DETAIL
MAX5556 toc03
FREQUENCY (NORMALIZED TO fS)
AMPLITUDE (dB)
-100
-110
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-130
-120
-140
0 2 4 6 8 101214161820
FREQUENCY (kHz)
AMPLITUDE (dBr)
IDLE-CHANNEL NOISE FFT
MAX5556 toc07
16,000-SAMPLE FFT WITH NO INPUT
-100
-110
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-130
-120
-140
0 2 4 6 8 101214161820
FREQUENCY (kHz)
AMPLITUDE (dBr)
TWIN-TONE IMD FFT
MAX5556 toc08
16,000-SAMPLE FFT
WITH 13kHz AND
14kHz INPUT SIGNALS
-110
-100
-80
-90
-70
-60
-60 -40-50 -30 -20 -10 0
THD+N vs. AMPLITUDE
MAX5556 toc09
AMPLITUDE (dBFS)
THD+N (dBr)
UNWEIGHTED
A-WEIGHTED
INPUT = 1kHz 18-BIT SIGNAL
INTEGRATION BANDWIDTH = 20Hz TO 20kHz
Low-Cost Stereo Audio DAC
MAX5556
6 _______________________________________________________________________________________
(VDD= +5V, V
GND
= 0V, R
OUT_
= 10kΩ, C
OUT_
= 10pF, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
-110
-100
-90
-80
-70
-60
0810462 1214161820
UNWEIGHTED THD+N
vs. FREQUENCY
MAX5556 toc10
FREQUENCY (kHz)
THD+N (dBr)
INPUT = 1kHz 18-BIT SIGNAL,
INTEGRATION BANDWIDTH = 20Hz TO 20kHz
0
20
10
40
30
60
50
70
02010 30 40 50
POWER DISSIPATION
vs. SAMPLE FREQUENCY
MAX5556 toc11
SAMPLE FREQUENCY (kHz)
POWER DISSIPATION (mW)
VDD = +5V
INPUT = 1kHz, 0dBFS SIGNAL
5
8
7
6
9
10
11
12
13
14
15
4.75 5.054.90 5.20 5.35 5.50
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5556 toc12
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
INPUT = 1kHz, 0dBFS SIGNAL
NORMAL OPERATION
STATIC DIGITAL INPUT
MUTE OPERATION
5
7
6
10
9
8
11
12
14
13
15
0 1.0 1.50.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE (V
DIG
)
MAX5556 toc13
DIGITAL INPUT VOLTAGE (V
DIG
) (V)
SUPPLY CURRENT (mA)
V
IH
V
DIG
< V
IH
MUTE
ENGAGED
VDD = +5.5V
DC OUTPUT
V
DIG
< V
IH
NORMAL OPERATION
5ms/div
CLOCK-LOSS MUTE RECOVERY
V
OUT
1V/div
2.4V
MAX5556 toc14
CLOCK
RESTORED
LOSS
OF CLOCK
100ms/div
POWER-UP RESPONSE
V
OUT
1V/div
0V
MAX5556 toc15