Maxim MAX537BEWE, MAX537BEPE, MAX537BCPE, MAX537BC-D, MAX537AMDE Datasheet

_______________General Description

The MAX536/MAX537 combine four 12-bit, voltage-output
digital-to-analog converters (DACs) and four precision
output amplifiers in a space-saving 16-pin package.
Offset, gain, and linearity are factory calibrated to provide
the MAX536’s ±1LSB total unadjusted error. The MAX537
operates with ±5V supplies, while the MAX536 uses -5V
and +12V to +15V supplies.

Each DAC has a double-buffered input, organized as
an input register followed by a DAC register. A 16-bit
serial word is used to load data into each input/DAC
register. The serial interface is compatible with either
SPI/QSPI™ or Microwire™, and allows the input and
DAC registers to be updated independently or simulta­neously with a single software command. The DAC reg­isters can be simultaneously updated with a hardware
LDAC pin. All logic inputs are TTL/CMOS compatible.

________________________Applications

Industrial Process Controls
Automatic Test Equipment
Digital Offset and Gain Adjustment
Motion Control Devices
Remote Industrial Controls
Microprocessor-Controlled Systems

____________________________Features

♦ Four 12-Bit DACs with Output Buffers
♦ Simultaneous or Independent Control of Four

DACs via a 3-Wire Serial Interface

♦ Power-On Reset
♦ SPI/QSPI and Microwire Compatible
♦ ±1LSB Total Unadjusted Error (MAX536)
♦ Full 12-Bit Performance without Adjustments
♦ ±5V Supply Operation (MAX537)
♦ Double-Buffered Digital Inputs
♦ Buffered Voltage Output
♦ 16-Pin DIP/SO Packages

______________Ordering Information

Ordering Information continued at end of data sheet.

* Contact factory for dice specifications.
** Contact factory for availability and processing to MIL-STD-883.

MAX536/MAX537

Calibrated, Quad, 12-Bit

Voltage-Output DACs with Serial Interface

________________________________________________________________

Maxim Integrated Products

1

16
15
14
13
12
11
10

9

1
2
3
4
5
6
7
8

OUTC
OUTD
V

DD

TP

AGND

V

SS

OUTA

OUTB

TOP VIEW

MAX536
MAX537

REFCD
SDO
SCK

CS

SDI

LDAC

DGND

REFAB

DIP/SO

__________________Pin Configuration

MAX536/MAX537

DAC A

DAC

REG A

INPUT
REG A

DAC B

DAC

REG B

INPUT
REG B

DAC C

DAC

REG C

INPUT
REG C

DAC D

DAC

REG D

INPUT
REG D

DECODE

CONTROL

OUTA

OUTB

OUTC

OUTD

16-BIT

SHIFT

REGISTER

SR

CONTROL

CS

SDI

SCK

SDO LDAC

AGND

DGND

VSSTP

V

DD

REFAB

REFCD

________________Functional Diagram

SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.

PART TEMP. RANGE PIN-PACKAGE

MAX536ACPE

0°C to +70°C 16 Plastic DIP
MAX536BCPE 0°C to +70°C 16 Plastic DIP
MAX536ACWE 0°C to +70°C 16 Wide SO

MAX536AEPE -40°C to +85°C 16 Plastic DIP

MAX536BCWE 0°C to +70°C 16 Wide SO

±1⁄

2

±1

±1⁄

2

±1

±1⁄

2

INL

(LSB)

19-0230; Rev 2a; 1/97

MAX536BEPE -40°C to +85°C 16 Plastic DIP ±1
MAX536AEWE -40°C to +85°C 16 Wide SO ±1⁄

2

MAX536BEWE -40°C to +85°C 16 Wide SO ±1
MAX536AMDE -55°C to +125°C 16 Ceramic SB** ±1⁄

2

MAX536BMDE -55°C to +125°C 16 Ceramic SB** ±1

MAX536BC/D 0°C to +70°C Dice* ±1

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone].
For small orders, phone [phone] ext. 3468.

TA= T

MIN

to T

MAX

MAX536/MAX537

Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface

2 _______________________________________________________________________________________

VDDto AGND or DGND

MAX536..................................................................-0.3V, +17V

MAX537....................................................................-0.3V, +7V

V

SS

to AGND or DGND ...............................................-7V, +0.3V

SDI, SCK, CS, LDAC, TP, SDO

to AGND or DGND.....................................-0.3V, (VDD+ 0.3V)

REFAB, REFCD to AGND or DGND .............-0.3V, (VDD+ 0.3V)

OUT_ to AGND or DGND.............................................VDD, V

SS

Maximum Current into Any Pin............................................50mA

Continuous Power Dissipation (T

A

= +70°C)

Plastic DIP (derate 10.53mW/°C above +70°C) .................842mW

Wide SO (derate 9.52mW/°C above +70°C).................762mW

Ceramic SB (derate 10.53mW/°C above +70°C)

..................842mW

Operating Temperature Ranges

MAX53_AC_E/BC_E.............................................0°C to +70°C

MAX53_AE_E/BE_E ..........................................-40°C to +85°C

MAX53_AMDE/BMDE.....................................-55°C to +125°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+300°C

ELECTRICAL CHARACTERISTICS—MAX536

(VDD= +15V, VSS= -5V, REFAB/REFCD = 10V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ABSOLUTE MAXIMUM RATINGS

MAX536B

MAX536A

MAX536B

MAX536A

MAX536BM

MAX536AM

MAX536AC
MAX536BC
MAX536AE
MAX536BE

LSB/V±0.03 ±0.30PSRR

LSB/V±0.02 ±0.125PSRR

±2.0

LSB

-0.1 ±1.0

Gain Error

LSB±1DNLDifferential Nonlinearity

±2.0

±1.0

±1

LSB

±0.15 ±0.50

INLIntegral Nonlinearity

±4.0

±3.0

±2.0
±3.0
±2.5
±3.5

UNITSMIN TYP MAXSYMBOLPARAMETER

T

A

= +25°C, -5.5V < VSS< -4.5V

T

A

= +25°C, 10.8V < VDD< 16.5V

RL= 5kΩ

Guaranteed monotonic

CONDITIONS

TUE

Total Unadjusted Error
(Note 1)

LSB

Bits12NResolution

VDDPower-Supply
Rejection Ratio

VSSPower-Supply
Rejection Ratio

TA= +25°C

MAX536_M

MAX536_C/E -0.6 ±1.5

RL= ∞

MAX536B

MAX536A

TA= +25°C

MAX536BM

MAX536AM

MAX536AC
MAX536BC
MAX536AE
MAX536BE

±5.0

Offset Error mV

±2.5

±10.0

±7.5

±5.0
±7.5
±6.1
±8.5

TA= T

MIN

to T

MAX

STATIC PERFORMANCE—ANALOG SECTION

MAX536B

MAX536/MAX537

Calibrated, Quad, 12-Bit

Voltage-Output DACs with Serial Interface

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS—MAX536 (continued)

(VDD= +15V, VSS= -5V, REFAB/REFCD = 10V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

PARAMETER

SYMBOL CONDITIONS MIN TYP MAX UNITS

Total Unadjusted Error

MAX536A ±1.0

LSB

MAX536B ±2.0

Gain Error ±0.1 ±1.0 LSB
Offset Error

MAX536A ±1.2 ±2.5

mV

±1.2 ±5.0

Integral Nonlinearity INL ±0.2 ±1.0 LSB

Reference Input Range REF 0.0 V

DD

– 4 V

Reference Input Resistance RREF Code dependent, minimum at code 555 hex 5

kΩ

Reference Feedthrough Input code = all 0s

-100
dB

-82

Input High Voltage V

IH

2.4 V

Input Low Voltage V

IL

0.8 V

Input Leakage Current VIN= 0V or V

DD

1.0

µA

Input Capacitance (Note 2) 10 pF

Output Low Voltage V

OL

SDO sinking 5mA 0.18 0.40 V

Output Leakage Current SDO = 0V to V

DD

±10

µA

Voltage-Output Slew Rate 5

V/µs

TUE

MATCHING PERFORMANCE (TA= +25°C)

REFERENCE INPUT

V

REF

= 10Vp-p

at 400Hz
V

REF

= 10Vp-p

at 4kHz

Output Settling Time To ±1⁄2LSB of full scale 3

µs

Digital Feedthrough 5 nV-s
Digital Crosstalk (Note 3) V

REF

= 5V 8 nV-s

Positive Supply Range V

DD

10.8 16.5 V

Negative Supply Range V

SS

-4.5 -5.5 V

DIGITAL INPUTS (SDI, SCK, CS, LDAC)

DIGITAL OUTPUT (SDO)

DYNAMIC PERFORMANCE (RL= 5kΩ, CL= 100pF)

POWER SUPPLIES

I

DD

TA= +25°C 8 18

mA

TA= T

MIN

to T

MAX

25

Negative Supply Current
(Note 4)

I

SS

TA= +25°C -6 -16
TA= T

MIN

to T

MAX

-23

mA

Positive Supply Current
(Note 4)

MULTIPLYING-MODE PERFORMANCE

Reference 3dB Bandwidth kHz700V

REF

= 2Vp-p

Total Harmonic Distortion
Plus Noise

THD + N V

REF

= 2.0Vp-p at 50kHz 0.012 %

MAX536/MAX537

Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS—MAX536 (continued)

(VDD= +15V, VSS= -5V, REFAB/REFCD = 10V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

PARAMETER

SYMBOL CONDITIONS MIN TYP MAX UNITS

t

POR

20

µs

SCK Clock Period t

CP

100 ns

SCK Pulse Width High t

CH

30 ns

SCK Pulse Width Low t

CL

30 ns

t

CSS

20 ns

t

CSH

10 ns

SDI Setup Time t

DS

40 26 ns

SDI Hold Time t

DH

0 ns

t

DO1

1kΩ pull-up on SDO
to V

DD,

C

LOAD

=

50pF

SDO high 78 105

ns

SDO low 50 80

SCK Fall to SDO Valid
Propagation Delay (Note 7)

t

DO2

1kΩ pull-up on SDO
to V

DD,

C

L

OAD

=

50pF

SDO high 81 110

ns

SDO low 53 85

t

DV

27 45 ns

t

TR

40 60 ns

SCK Rise to CS Fall Delay

t

CS0

Continuous SCK, SCK edge ignored 20 ns

t

CS1

SCK edge ignored 20 ns

LDAC Pulse Width Low

t

LDAC

30 ns

CS Pulse Width High

t

CSW

40 ns

Internal Power-On Reset
Pulse Width (Note 2)

CS Fall to SCK Rise
Setup Time

SCK Rise to CS Rise
Hold Time

SCK Rise to SDO Valid
Propagation Delay (Note 6)

CS Fall to SDO Enable
(Note 8)

CS Rise to SDO Disable
(Note 9)

CS Rise to SCK Rise
Hold Time

Note 1: TUE is specified with no resistive load.
Note 2: Guaranteed by design.
Note 3: Crosstalk is defined as the glitch energy at any DAC output in response to a full-scale step change on any other DAC

.

Note 4: Digital inputs at 2.4V; with digital inputs at CMOS levels, I

DD decreases slightly.

Note 5: All input signals are specified with t

R

= tF≤ 5ns. Logic input swing is 0V to 5V.

Note 6: Serial data clocked out of SDO on SCK’s falling edge. (SDO is an open-drain output for the MAX536. The MAX537’s SDO

pin has an internal active pull-up.)

Note 7: Serial data clocked out of SDO on SCK’s rising edge.
Note 8: SDO changes from High-Z state to 90% of final value.
Note 9: SDO rises 10% toward High-Z state.

TIMING CHARACTERISTICS (Note 5)

MAX536/MAX537

Calibrated, Quad, 12-Bit

Voltage-Output DACs with Serial Interface

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS—MAX537

(VDD= +5V, VSS= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

PARAMETER

SYMBOL CONDITIONS MIN TYP MAX UNITS

Resolution N 12 Bits
Integral Nonlinearity INL

MAX537A ±0.15 ±0.50

LSB

MAX537B ±1

Differential Nonlinearity DNL Guaranteed monotonic ±1 LSB

MAX537A ±3.0
MAX537B ±6.0
MAX537AC ±6.0
MAX537BC ±9.0
MAX537AE ±7.0
MAX537BE ±11.0
MAX537AM ±9.0
MAX537BM ±15.0

Gain Error

RL= ∞

-0.3 ±1.5
LSB

RL= 5kΩ

-0.8 ±3.0

PSRR

TA= +25°C, 4.5V ≤ VDD≤ 5.5V

±0.01 ±0.5 LSB/V

PSRR

TA= +25°C, -5.5V ≤ VSS≤ -4.5V

±0.02 ±0.7 LSB/V

Gain Error ±0.1 ±1.25 LSB

Integral Nonlinearity INL ±0.35 ±1.0 LSB

Reference Input Range REF 0.0 VDD- 2.2 V

Offset Error

TA= T

MIN

to T

MAX

mV

VDDPower-Supply
Rejection Ratio

VSSPower-Supply
Rejection Ratio

Offset Error

MAX537A ±0.3 ±3.0

mV

MAX537B ±0.3 ±6.0

Reference Input Resistance RREF Code dependent, minimum at code 555 hex 5

kΩ

Reference 3dB Bandwidth V

REF

= 2Vp-p 700 kHz

Reference Feedthrough Input code = all 0s

-100
dB

MATCHING PERFORMANCE (TA= +25°C)

REFERENCE INPUT

V

REF

= 10Vp-p at 4kHz -82

THD + N V

REF

= 850mVp-p at 100kHz 0.024 %

Input High Voltage V

IH

2.4 V

Input Low Voltage V

IL

0.8 V

Input Leakage Current VIN= 0V or V

DD

1.0

µA

Input Capacitance (Note 2) 10 pF

MULTIPLYING-MODE PERFORMANCE

V

REF

= 10V

p-p

at 400Hz

Total Harmonic Distortion
Plus Noise

DIGITAL INPUTS (SDI, SCK, CS, LDAC)

STATIC PERFORMANCE—ANALOG SECTION

TA= +25°C

MAX537_M

MAX536/MAX537

Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface

6 _______________________________________________________________________________________

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Output High Voltage V

OH

SDO sourcing 2mA

V

DD

– 0.5 V

DD

– 0.25

V

Output Low Voltage V

OL

SDO sinking 2mA 0.13 0.40 V

Voltage-Output Slew Rate 5

V/µs

Output Settling Time To ±1⁄2LSB of full scale 5

µs

Digital Feedthrough 5 nV-s
Digital Crosstalk (Note 3) 5 nV-s

Positive Supply Range V

DD

4.5 5.5 V

Negative Supply Range V

SS

-4.5 -5.5 V

Positive Supply Current
(Note 4)

I

DD

TA= +25°C 5.5 12

mA

TA= T

MIN

to T

MAX

16

Negative Supply Current
(Note 4)

I

SS

TA= +25°C -4.7 -10

mA

TA= T

MIN

to T

MAX

-14

t

POR

50

µs

SCK Clock Period t

CP

100 ns

SCK Pulse Width High t

CH

MAX537_C/E 35

ns

MAX537_M 40

SCK Pulse Width Low t

CL

MAX537_C/E 35

ns

MAX537_M 40

CS Fall to SCK Rise
Setup Time

t

CSS

MAX537_C/E 40

ns

50

t

CSH

0 ns

t

DS

MAX537_C/E 40 24

SDI Hold Time t

DH

0 ns

SCK Rise to SDO Valid
Propagation Delay (Note 6)

t

DO1

C

LOAD

= 50pF

MAX537_C/E 116 200

ns

MAX537_M 230

SCK Fall to SDO Valid
Propagation Delay (Note 7)

t

DO2

C

LOAD

= 50pF

MAX537_C/E 123 210

ns

MAX537_M 250

Internal Power-On Reset
Pulse Width (Note 2)

SCK Rise to CS Rise
Hold Time

POWER SUPPLIES

DIGITAL OUTPUT (SDO)

DYNAMIC PERFORMANCE (RL= 5kΩ, CL= 100pF)

TIMING CHARACTERISTICS (Note 5)

ELECTRICAL CHARACTERISTICS—MAX537 (continued)

(VDD= +5V, VSS= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

SDI Setup Time

MAX537_M 50

ns

MAX537_M

Note 2: Guaranteed by design.
Note 3: Crosstalk is defined as the glitch energy at any DAC output in response to a full-scale step change on any other DAC

.

Note 4: Digital inputs at 2.4V; with digital inputs at CMOS levels, I

DD decreases slightly.

Note 5: All input signals are specified with t

R

= tF≤ 5ns. Logic input swing is 0V to 5V.

Note 6: Serial data clocked out of SDO on SCK’s falling edge. (SDO is an open-drain output for the MAX536. The MAX537’s SDO

pin has an internal active pull-up.)

Note 7: Serial data clocked out of SDO on SCK’s rising edge.
Note 10: When disabled, SDO is internally pulled high.

MAX536/MAX537

Calibrated, Quad, 12-Bit

Voltage-Output DACs with Serial Interface

_______________________________________________________________________________________ 7

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

CS Fall to SDO Enable

t

DV

C

LOAD

= 50pF

MAX537_C/E 75 140

ns

MAX537_M 170

CS Rise to SDO Disable
(Note 10)

t

TR

C

LOAD

= 50pF

MAX537_C/E 70 130

ns

MAX537_M 165

LDAC Pulse Width High

t

LDAC

MAX537_C/E 50

ns

MAX537_M 70

CS Pulse Width High

t

CSW

MAX537_C/E 100

ns

125

ELECTRICAL CHARACTERISTICS—MAX537 (continued)

(VDD= +5V, VSS= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, RL= 5kΩ, CL= 100pF, TA= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25°C.)

SCK Rise to CS Fall Delay

t

CS0

Continuous SCK,
SCK edge ignored

MAX537_C/E 35

ns

MAX537_M 40

CS Rise to SCK Rise
Hold Time

t

CS1

SCK edge ignored

MAX537_C/E 35

ns

MAX537_M 40

MAX536/MAX537

Calibrated, Quad, 12-Bit
Voltage-Output DACs with Serial Interface

8 _______________________________________________________________________________________

__________________________________________Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

INL ERROR (LSB)

-1.0
0

REFERENCE VOLTAGE (V)

MAX536/7-01

4 8 12 16

--0.6

-0.2

0.2

0.6

1.0

VDD = +15V

VDD = +12V

VSS = -5V

MAX536

INTEGRAL NONLINEARITY

ERROR vs. REFERENCE VOLTAGE

1k 10k 100k

MAX536

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

MAX536/7-02

FREQUENCY (Hz)

RELATIVE OUTPUT (dB)

1M 10M

-50

-40

-30

-20

-10

10

20

0

REFAB SWEPT 2Vp-p
V

OUTA

MONITORED

10 100 200

MAX536

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. REFERENCE FREQUENCY

MAX1536/7-03

FREQUENCY (kHz)

THD + NOISE (%)

0.200

0.175

0.150

0.125

0.100

0.075

0.050

0.025
0

DAC CODE = ALL 1s
REFAB = 10Vp-p

RL = 10kΩ, CL = 100pF

RL = NO LOAD, CL = 0pF

1

-5

0.1 10 1000

MAX536

FULL-SCALE ERROR vs. LOAD

-4

MAX536/7-04

LOAD (kΩ)

FULL-SCALE ERROR (LSB)

-3

-2

-1

1 100

0

MAX536

SUPPLY CURRENT vs. TEMPERATURE

SUPPLY CURRENT (mA)

-10

-60
TEMPERATURE (°C)

MAX536/7-05

-6

-2

2

6

10

-20 20

60

100

140

V

DD

= +15V

V

SS

= -5V

I

SS

I

DD

INPUT CODE = ALL 0s

500µs/div

REFAB,
5V/div
0V

OUTA,
100µV/div

MAX536

REFERENCE FEEDTHROUGH AT 400Hz

INPUT CODE = ALL 0s

MAX536

REFERENCE FEEDTHROUGH AT 4kHz

50µs/div

REFAB,
5V/div

0V

OUTA,
200µV/div

10 100 200

MAX536

TOTAL HARMONIC DISTORTION PLUS NOISE

vs. REFERENCE FREQUENCY

MAX1536/7-03b

FREQUENCY (kHz)

THD + NOISE (%)

0.200

0.175

0.150

0.125

0.100

0.075

0.050

0.025
0

DAC CODE = ALL 1s
REFAB = 5Vp-p

RL = NO LOAD, CL = 0pF

RL = 10kΩ, CL = 100pF

MAX536