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MAX5026EUT
Rev. A
RELIABILITY REPORT
FOR
MAX5026EUT
PLASTIC ENCAPSULATED DEVICES
March 12, 2003
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Written by Reviewed by
Jim Pedicord Bryan J. Preeshl
Quality Assurance Quality Assurance
Reliability Lab Manager Executive Director
Conclusion
The MAX5026 successfully meets the quality and reliability standards required of all Maxim products. In addition,
Maxim’s continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim’s quality
and reliability standards.
Table of Contents
I. ........Device Description V. ........Quality Assurance Information
II. ........Manufacturing Information VI. .......Reliability Evaluation
III. .......Packaging Information IV. .......Die Information
.....Attachments
I. Device Description
A. General
The MAX5026 constant -frequency, pulse-width modulating (PWM), low-noise boost converter is intended for lowvoltage systems that often need a locally generated high voltage. This device is capable of generat ing low-noise, high
output voltages required for varactor diode biasing in TV tuners, set -top boxes, and PCI cable modems. The
MAX5026 operates from as low as 3V and switches at 500kHz.
The constant -frequency, current-mode PWM architecture provides for low output noise that is easy to filter. A 40V
lateral DMOS device is used as the internal power switch, making the devices ideal for boost converters up to 36V.
The MAX5026 adjustable version requires the use of external feedback resistors to set the output voltage.
B. Absolute Maximum Ratings
Item Rating
VCC to GND -0.3V to +12V
PGND to GND -0.1V to +0.1V
FB to GND -0.3V to (V CC + 0.3V)
SHDN to GND -0.3V to (V CC + 0.3V)
LX to GND -0.3V to +45V
Peak LX Current 600mA
Operating Temperature Range -40°C to +85°C
Junction Temperat ure +150°C
Storage Temperature Range -65°C to +165°C
Lead Temperature (soldering 10s) +300°C
Continuous Power Dissipation (TA = +70C)
6-PIN SOT23 696mW
Derates above +70°C
6-PIN SOT23 7.1mW/°C
II. Manufacturing Information
A. Description/Function: 500kHz, 36V Output, SOT23, PWM Step-Up DC-DC Converters
B. Process: BCD80
C. Number of Device Transistors: 365
D. Fabrication Location: Oregon, USA
E. Assembly Location: Malaysia
F. Date of Initial Production: April, 2001
III. Packaging Information
A. Package Type: 6-Pin SOT23
B. Lead Frame: Copper
C. Lead Finish: Solder Plate
D. Die Attach: Non-Conductive Epoxy
E. Bondwire: Gold (1 mil dia.)
F. Mold Material: Epoxy with silica filler
G. Assembly Diagram: # 05-1301-0024
H. Flammability Rating: Class UL94-V0
I. Classification of Moisture Sensitivity
per JEDEC standard JESD22-112: Level 1
IV. Die Information
A. Dimensions: 60 X 41 mils
B. Passivation: Si3N4/SiO2 (Silicon nitride/ Silicon dioxide)
C. Interconnect: Aluminum/Si (Si = 1%)
D. Backside Metallization: None
E. Minimum Metal Width: 3 microns (as drawn)
F. Minimum Metal Spacing: 3 microns (as drawn)
G. Bondpad Dimensions: 5 mil. Sq.
H. Isolation Dielectric: SiO
2
I. Die Separation Method: Wafer Saw
V. Quality Assurance Information
A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager)
Bryan Preeshl (Exec utive Director)
Kenneth Huening (Vice President)
B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm
D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 135°C biased (static) life test are shown in Table 1. Using these results, the Failure
Rate (λ ) is calculated as follows:
λ = 1 = 1.83 (Chi square value for MTTF upper limit)
MTTF 192 x 4389 x 70 x 2
Temperature Acceleration factor assuming an activation energy of 0.8eV
λ = 15.51 x 10-9
λ = 15.51 F.I.T. (60% confidence level @ 25°C)
This low failure rate represents data collected from Maxim’s reliability monitor program. In addition to
routine production Burn-In, Maxim pulls a sample from every fabrication process three times per week and subjects
it to an extended Burn-In prior to shipment to ensure its reliability. The reliability control level for each lot to be
shipped as standard product is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece
sample. Maxim performs failure analysis on any lot that exceeds this reliability control level. Attached Burn-In
Schematic (Spec. # 06-5729) shows the static Burn-In circuit. Maxim also performs quarterly 1000 hour life test
monitors. This data is published in the Product Reliability Report (RR-1M).
B. Moisture Resistance Tests
Maxim pulls pressure pot samples from every assembly process three times per week. Each lot sample
must meet an LTPD = 20 or less before shipment as standard product. Additionally, the industry standard
85°C/85%RH testing is done per generic device/package family once a quarter.
C. E.S.D. and Latch-Up Testing
The NP15 die type has been found to have all pins able to withstand a transient pulse of ±2000V, per Mil-
Std-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device
withstands a current of ±250mA.
Table 1
Reliability Evaluation Test Results
MAX5026EUT
TEST ITEM TEST CONDITION FAILURE SAMPLE NUMBER OF
IDENTIFICATION PACKAGE SIZE FAILURES
Static Life Test (Note 1)
Ta = 135°C DC Parameters 70 0
Biased & functionality
Time = 192 hrs.
Moisture Testing (Note 2)
Pressure Pot Ta = 121°C DC Parameters SOT23 77 0
P = 15 psi. & functionality
RH= 100%
Time = 168hrs.
85/85 Ta = 85°C DC Parameters 77 0
RH = 85% & functionality
Biased
Time = 1000hrs.
Mechanical Stress (Note 2)
Temperature -65°C/150°C DC Parameters 77 0
Cycle 1000 Cycles & functionality
Method 1010
Note 1: Life Test Data may represent plastic DIP qualification lots.
Note 2: Generic Package/Process data
Attachment #1
Mil Std 883D
TERMINAL D
TABLE II. Pin combination to be tested. 1/ 2/
1.
2.
(Each pin individually
connected to terminal A
with the other floating)
All input and output pins All other input-output pins
Terminal A
All pins except V
PS1
3/
Terminal B
(The common combination
of all like-named pins
connected to terminal B)
All V
PS1
pins
1/ Table II is restated in narrative form in 3.4 below.
2/ No connects are not to be tested.
3/ Repeat pin combination I for each named Power supply and for ground
(e.g., where V
is VDD, VCC, VSS, VBB, GND, +VS, -VS, V
PS1
REF
, etc).
3.4 Pin combinations to be tested.
a. Each pin individually connected to terminal A with respect to the device ground pin(s) connected
to terminal B. All pins except the one being tested and the ground pin(s) shall be open.
b. Each pin individually connected to terminal A with respect to each different set of a combination
of all named power supply pins (e.g., V
SS1
, or V
SS2
or V
SS3
or V
CC1
, or V
) connected to
CC2
terminal B. All pins except the one being tested and the power supply pin or set of pins shall be
open.
c. Each input and each output individually connected to terminal A with respect to a combination of
all the other input and output pins connected to terminal B. All pins except the input or output pin
being tested and the combination of all the other input and output pins shall be open.
REGULATED
HIGH VOLTAGE
SUPPLY
Method 3015.7
Notice 8
TERMINAL C
R1
S1
R2
TERMINAL A
S2
C1
DUT
SOCKET
SHORT
TERMINAL B
R = 1.5kΩ
C = 100pf
CURRENT
PROBE
(NOTE 6)
ONCE PER SOCKET ONCE PER BOARD
10K OHMS
10K OHMS
1
PGND
2
G
3 4
FB SHNB
LX
V
6 PIN
SOT
10 OHMS
10K OHMS
6
5
0.1 uF
0.1 uF
2 mA
1 mA
3 mA
- 15 VOLTS
+ 15 VOLTS
- 20 VOLTS
DEVICES: MAX 5025/26/27/28
MAX. EXPECTED CURRENT = +15 (1 mA); -15 (2mA); -20V(3mA)
DOCUMENT I.D. 06-5729 REVISION A
DRAWN BY: CHRIS JAMBARO
NOTES:
MAXIM TITLE: BI Circuit (MAX5025/26/27/28) PAGE 2 OF 3
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