General Description
The MAX4983E/MAX4984E are high ESD-protected
analog switches that combine the low on-capacitance
and low on-resistance necessary for high-performance
switching applications. COM1 and COM2 are protected
against ±15kV ESD without latchup or damage. The
devices are ideal for USB 2.0 Hi-Speed applications at
480Mbps. The switches also handle all the requirements for USB low- and full-speed signaling.
The MAX4983E/MAX4984E double-pole/double-throw
(DPDT) switches are fully specified to operate from a
single +2.8V to +5.5V power supply and are protected
against a +5.5V short to COM1 and COM2. This feature
makes the MAX4983E/MAX4984E fully compliant with
the USB 2.0 specification of VBUS fault protection. The
devices feature low-threshold-voltage logic inputs, permitting them to be used with low I/O voltage systems.
The MAX4983E features an active-low enable input
(EN) that when driven high sets the device in shutdown
mode. The MAX4984E features an active-high enable
input (EN) that when driven low sets the device in shutdown mode. When the device is in shutdown mode, the
quiescent supply current is reduced to 0.1µA.
The MAX4983E/MAX4984E are available in a spacesaving, 10-pin, 1.4mm x 1.8mm UTQFN package, and
operate over a -40°C to +85°C temperature range.
Applications
Features
♦ USB Hi-Speed Switching
♦ ESD Protection on COM
±15kV Human Body Model
±15kV IEC 61000-4-2 Air Gap
±8kV IEC 61000-4-2 Contact
♦ Power-Supply Range: +2.8V to +5.5V
♦ Low 5Ω (typ) On-Resistance (R
ON
)
♦ -3dB Bandwidth: 950MHz (typ)
♦ Compatible with Logic I/O Down to 1.4V
♦ COM Analog Inputs Fault Protected Against
Shorts to +5.5V
♦ Low Supply Current 0.6µA (typ)
♦ Enable Input:
Active-Low (EN) MAX4983E
Active-High (EN) MAX4984E
♦ Small 10-Pin, 1.4mm x 1.8mm UTQFN
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
________________________________________________________________
Maxim Integrated Products
1
19-4035; Rev 2; 9/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
Pin Configuration
Cell Phones
PDAs
Digital Still Cameras
GPS
Notebook Computers
Video Switching
Bus Switches
Eye Diagram
Note: All devices operate over the -40°C to +85°C extended
temperature range.
+
Denotes a lead-free package.
PART PIN-PACKAGE TOP MARK
MAX4983EEVB+ 10 Ultra-Thin QFN AAA
MAX4984EEVB+ 10 Ultra-Thin QFN AAB
NO2
NC2
7 6
8
MAX4983E/
9
MAX4984E
1 2
NC1
UTQFN
NO1
5
COM2
4
GND
3
COM1
MAX4983E
MAX4984E
TOP VIEW
EN (EN)
V
USB 2.0
Hi-SPEED
TRANSMIT
TEMPLATE
(EN) FOR MAX4984E ONLY.
CC
10
CB
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC= +2.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.0V, TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
V
CC
, COM_, NO_, NC_, EN, EN, CB.................... -0.3V to +6.0V
Continuous Current into Any Terminal............................. ±30mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin UTQFN (derate 6.9mW/°C above +70°C)........ 559mW
Junction-to-Case Thermal Resistance (
θ
JC
) (Note 1)
10-Pin UTQFN ...........................................................20.1°C/W
Junction-to-Ambient Thermal Resistance (
θ
JA
) (Note 1)
10-Pin UTQFN ........................................................ 143.1°C/W
Operating Temperature Range .......................... -40°C to +85°C
Junction Temperature Range ......................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering 10s) ..................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
O p er ati ng P ow er - S up p l y Rang eV
Supply Current I
Shutdown Supply Current I
Increase in Supply Current
with V
, VEN Voltage
CB
Analog Signal Range
Fault-Protection Trip Threshold V
On-Resistance R
On-Resistance Match Between
Channels
On-Resistance Flatness R
Off-Leakage Current I
On-Leakage Current I
CC
SHDN
V
COM
V
ΔR
FLAT
COM(OFF
COM(ON
CC
, VNO,
NC
FP
ON
ON
VCB = 0V or VCC,
V
= 0V or VEN = V
EN
VCC = 3.0V 0.6 1.5
CC
VCC = 5.5V 3 6.5
Switch disabled (VEN = VCC or VEN = 0V) 0.1 µA
≤ VIL or VIH ≤ VCB ≤ VCC or 0 ≤ V
0 ≤ V
CB
≤ VIL or VIH ≤ VEN ≤ V
V
= VCC or VEN = 0V (Note 3) 0 V
EN
CC
EN
COM_ only, TA = +25°C
V
= 0V to V
COM
V
= 3.6V, VCC = 3.0V 5.5
COM
VCC = 3.0V, V
VCC = 3.0V, V
VCC = 4.5V, V
, VNC = 4.5V or 0V
V
NO
VCC = 5.5V, V
, VNC with 50µA sink current to GND
V
NO
VCC = 5.5V, V
, VNC = unconnected
V
NO
CC
= 2V (Note 4) 0.1 1 Ω
COM
= 0V to VCC (Note 5) 0.1 Ω
COM
= 0V or 4.5V,
COM
= 0V or 5.5V,
COM
= 0V or 5.5V,
COM
AC PERFORMANCE
On-Channel -3dB Bandwidth BW RL = RS = 50Ω, signal = 0dBm 950 MHz
f = 10MHz -48
f = 250MHz -20Off-Isolation V
f = 500MHz -17
ISO
VNO, VNC = 0dBm,
= RS = 50Ω
R
L
(Figure 1)
2.8 5.5 V
V
+
CC
0.6
-250 +250 nA
-250 +250 nA
2µA
CC
VCC +
0.8
V
+
C C
1
510
180 µA
µA
V
V
Ω
dB
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +2.8V to +5.5V, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +3.0V, TA= +25°C.) (Note 2)
Note 2: All devices are 100% production tested at TA= +25°C. All temperature limits are guaranteed by design.
Note 3: The switch turns off for voltages above V
FP
, protecting downstream circuits in case of a fault condition.
Note 4: ΔR
ON(MAX)
= ABS(R
ON(CH1)
- R
ON(CH2)
).
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance, as measured over specified
analog signal ranges.
Note 6: Between any two switches.
Note 7: Switch off-capacitance, switch on-capacitance, and output skew between switches are not production tested; guaranteed by
design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VNO, VNC = 0dBm,
= RS = 50Ω,
CT
R
L
Figure 1
LOGIC INPUT
Input Logic-High V
Input Logic-Low V
Input Leakage Current I
IH
IL
IN
DYNAMIC
V
or V
Turn-On Time t
Turn-Off Time t
Propagation Delay t
PLH
Fault Protection Response
Time
Fault Protection Recovery
Time
Output Skew Between
Switches
C
NO_ or NC_ Off-Capacitance
COM Off-Capacitance
(Figure 5, Note 7)
COM On-Capacitance
(Figure 5, Note 7)
Total Harmonic Distortion Plus
Noise
NO(OFF
C
C
COM(OFF
C
COM(ON
THD+N
ON
OFF
, t
PHLRL
t
FP
t
FPR
t
SK
NC(OFF
N O
V
EN
V
N O
V
E N
= RS = 50Ω, Figure 3 100 ps
V
COM
V
CC
V
COM
V
CC
S kew b etw een sw i tch 1 and 2, RL = RS = 50Ω ,
( Fi g ur e 3, N ote 7)
or
f = 1MHz (Figure 5, Note 7) 2 pF
f = 1MHz 5.5
f = 240MHz 4.8
f = 1MHz 6.5
f = 240MHz 5.5
V
COM
f = 20Hz to 20kHz
= 1.5V , RL = 300Ω , C L = 35p F,
N C
= V
to 0V or V
C C
or V
= 1.5V , RL = 300Ω , C L = 35p F,
N C
= V
to 0V or V EN = 0V to V
C C
= 0V to 5V step, RL = RS = 50Ω,
= 3.3V (Figure 4)
= 5V to 0V step, RL = RS = 50Ω,
= 3.3V (Figure 4)
= 1V
P-P
, V
BIAS
ESD PROTECTION
Human Body Model ±15
IEC 61000-4-2 Air-Gap Discharge ±15COM1, COM2
IEC 61000-4-2 Contact Discharge ±8
All Pins Human Body Model ±2
f = 10MHz -73
f = 250MHz -54Crosstalk (Note 6) V
f = 500MHz -33
= 0V to V
E N
( Fi g ur e 2)
C C
( Fi g ur e 2)
C C
= 1V, RL = RS = 50Ω,
1.4 V
0.5 V
-250 +250 nA
20 100 µs
15µs
0.5 5.0 µs
100 µs
40 ps
0.03 %
dB
pF
pF
kV
MAX4983E/MAX4984E
Hi-Speed USB 2.0 Switches
with ±15kV ESD
4 _______________________________________________________________________________________
Test Circuits/Timing Diagrams
Figure 1. Off-Isolation and Crosstalk
NETWORK
ANALYZER
0V OR V
50Ω
V
CB
CC
NC1
MAX4983E/
MAX4984E
COM1
NO1*
IN
V
OUT
50Ω
MEAS REF
50Ω 50Ω
V
OUT
V
IN
V
OUT
V
IN
50Ω
OFF-ISOLATION = 20log
CROSSTALK = 20log
SWITCH IS ENABLED.
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
MAX4983E/
MAX4984E
COM
R
L
L
)
ON
LOGIC
INPUT
NO
V
IN_
OR NC
EN (EN)
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
RL + R
OUT
= V
IN_ (
R
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
V
IH
LOGIC
INPUT
V
V
OUT
C
L
SWITCH
OUTPUT
IL
0V
50%
V
OUT
0.9 x V
0UT
t
ON
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
tR < 5ns
tF < 5ns
t
OFF
0.1 x V
OUT