Maxim MAX4960, MAX4959 Datasheet

General Description

The MAX4959/MAX4960 overvoltage protection controllers protect low-voltage systems against high-voltage faults of up to +28V. When the input voltage exceeds the overvoltage lockout (OVLO) threshold, these devices turn off an external pFET to prevent damage to the protected components. The undervoltage lockout (UVLO) threshold holds the external pFET off until the input voltage rises to the correct level. An additional safety feature latches off the pFET when an incorrect low-power adapter is plugged in.

The MAX4959/MAX4960 control an external battery switchover pFET (P2) (see Figures 4 and 6) that switches in the battery when the AC adapter is unplugged. The undervoltage and overvoltage trip levels can be adjusted with external resistors.

The input is protected against ±15kV HBM ESD when bypassed with a 1µF ceramic capacitor to ground. All devices are available in a small 10-pin (2mm x 2mm) µDFN and 10-pin µMAX packages and are specified for operation over the extended -40°C to +85°C temperature range.

Applications

Notebooks

Laptops

Camcorders

Ultra-Mobile PCs

Features

o Overvoltage Protection Up to +28V

o ± 2.5% Accurate Externally Adjustable

OVLO/UVLO Thresholds

o Battery Switchover pFET Control

o Protection Against Incorrect Power Adapter

o Low (100µA Typ) Supply Current

o 25ms Input Debounce Timer

o 25ms Blanking Time

o 10-Pin (2mm x 2mm) µDFN and 10-Pin µMAX

Packages

MAX4959/MAX4960

High-Voltage OVP with Battery Switchover

________________________________________________________________

Maxim Integrated Products

19-0874; Rev 0; 7/07

For pricing delivery, and ordering information please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

PART TEMP RANGE

PINPACKAGE

TOP

MARK

PKG

CODE

MAX4959ELB+

-40°C to +85°C

10 μDFN AAO L1022-1

MAX4959EUB+* -40°C to +85°C 10 μMAX — U10-1

MAX4960ELB+ -40°C to +85°C 10 μDFN AAP L1022-1

MAX4960EUB+* -40°C to +85°C 10 μMAX — U10-1

123

10 9 8

GATE2

GND

N.C.

GATE1

OVS

N.C.

(SOURCE1)

MAX4959 MAX4960

µDFN

TOP VIEW

UVS

GATE2

GND

N.C.

GATE1

OVS

( ) MAX4960 ONLY.

N.C.

(SOURCE1)

MAX4959 MAX4960

µMAX

UVS

Pin Configurations

Typical Operating Circuits appear at end of data sheet.

Denotes a lead-free package.

Future product—Contact factory for availability.

MAX4959/MAX4960

High-Voltage OVP with Battery Switchover

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

= +19V, TA= -40°C to +85°C, unless otherwise noted, C

VDD

= 100nF. Typical values are at TA = +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

IN, SOURCE1, GATE1, GATE2, to GND ................-0.3V to +30V

to GND..............................................................-0.3V to +6V

UVS, OVS, CB to GND .............................................-0.3V to +6V

Continuous Power Dissipation (T

= +70°C)

10-pin µDFN (derate 5.0mW/°C above +70°C) ...........403mW

10-pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Input Voltage Range V

Overvoltage Adjustable Trip Range

Overvoltage Comp Reference OV

OVS Input Leakage Current OVI

Overvoltage Trip Hysteresis OV

Undervoltage Adjustable Trip Range

Undervoltage Comp Reference UV

UVS Input Leakage Current UVI

Undervoltage Trip Hysteresis UV

Internal Undervoltage Trip Level INTUV

Internal Undervoltage Trip Hysteresis

OVLO (Note 2) 6 28 V

VIN rising edge 1.18 1.228 1.276 V

REF

LKG

HYS

UVLO (Note 2) 5 28 V

VIN falling edge 1.18 1.228 1.276 V

REF

LKG

HYS

REFVIN

INTUV

HYS

Power-On Trip Level POTL VDD > +3V, IN rising edge 0.5 0.75 1 V

Power-On Trip Hysteresis POTL

IN Supply Current I

VDD Voltage Range V

VDD Undervoltage Lockout V

VDD Undervoltage Lockout Hysteresis

Supply Current I

HYS

DDUVLOVDD

D D UV LOHY S

VDD

VIN = +19V, V V

UVS

VDD = +5V, VIN = 0V 10 µA

GATE_

GATE1 Open-Drain MOS R Resistance

GATE2 Open-Drain MOS R Resistance

VCB = 0V, VIN = 19V, V V

UVS

VCB = 3V, I

falling edge 4.1 4.4 4.7 V

> UV

falling edge 1.55 2.40 V

> UV

428V

-100 +100 nA

10 %

REF

OVS

< OV

REF

and

100 300 µA

2.7 5.5 V

50 mV

< OV

, I

REF

GATE_

OVS

= 0.5mA (MAX4959)

GATE_

= 0.5mA 1 kΩ

REF

and

1kΩ

MAX4959/MAX4960

ELECTRICAL CHARACTERISTICS (continued)

= +19V, TA= -40°C to +85°C, unless otherwise noted, C

VDD

= 100nF. Typical values are at TA = +25°C.) (Note 1)

Note 1: Operation is tested at TA= +25°C and guaranteed by design for µDFN package. Operation over specified temperature range

is tested for µMAX package.

Note 2: Do not exceed absolute maximum rating; the ratio between the externally set OVLO and UVLO threshold must not exceed 4,

[OVLO/UVLO]

MAX

≤ 4.

Note 3: Assertion delay starts from switching of CB pin to reaching of 80% of GATE1/GATE2 transition. This delay is measured without

external capacitive load.

High-Voltage OVP with Battery Switchover

_______________________________________________________________________________________ 3

Typical Operating Characteristics

OVLO

= 22.2V and V

UVLO

= 10.1V, R1 = 887kΩ, R2 = 66.5kΩ, R3 = 54.9kΩ, all resistors 1%, OV

REF

= UV

REF

= 1.228V.)

GATE1 Leakage Current G1I

GATE2 Leakage Current G2I

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

LKGV OV S

LKGVCB

> OV

= 0V -1 +1 µA

Logic-Level High V

Logic-Level Low V

CB Pulldown Resistor R

CBPD

TIMING

> VIN > V

Debounce Time t

GATE1 Assertion Delay from CB Pin

GATE2 Assertion Delay from CB Pin

Blanking Time t

DEB

GATE

BLANK

OVP

GATE1 to go low

CB = +3V to 0 rise time = fall time = 5ns (Note 3)

CB = 0 to +3V rise time = fall time = 5ns (Note 3)

MAX4960

SOURCE1/GATE1 Resistance R

GATE1/Ground Resistance R

(MAX4960) 140 200 260 kΩ

GATE1 Asserted (MAX4960) 140 200 260 kΩ

, V

R E F

U V S

< U V

R E F

, or V

= + 5V -1 +1 µA

C B

1.5 V

123MΩ

for greater than t

UVP

DEB

for

10 25 40 ms

0.4 V

50 ns

POWER-UP RESPONSE

GATE1

PULLUP

TIME (μs)

VOLTAGE (V)

-2

-150 150

= 1kΩ)

OVERVOLTAGE RESPONSE

GATE1

MAX4959/60 toc01

100500-50-100

VOLTAGE (V)

-150 150

PULLUP

TIME (μs)

= 5kΩ)

MAX4959/60 toc02

100500-50-100

UNDERVOLTAGE RESPONSE

(WITHIN BLANKING TIME)

= 1kΩ)

VOLTAGE (V)

GATE1

070

PULLUP

DRAIN OF P1

MAX4959/60 toc03

605010 20 30 40

TIME (μs)

MAX4959/MAX4960

High-Voltage OVP with Battery Switchover

4 _______________________________________________________________________________________

)

Typical Operating Characteristics (continued)

OVLO

= 22.2V and V

UVLO

= 10.1V, R1 = 887kΩ, R2 = 66.5kΩ, R3 = 54.9kΩ, all resistors 1%, OV

REF

= UV

REF

= 1.228V.)

LOW-POWER ADAPTER RESPONSE

= 22.3V, V

OVLO

VOLTAGE (V)

LOAD BECOMES PRESENT

-1 0 0.3

= 10.1V, pFET = IRF7726

UVLO

DRAIN OF P1

TIME (s)

MAX4959/60 toc04

GATE1

VOLTAGE (V)

0.250.20.150.1.05

SUPPLY CURRENT vs. INPUT VOLTAGE

200

MAX4959/60 toc07

LOGIC THRESHOLD (V)

252015105

(μA)

SUPP

160

120

-40

VIN (V)

BATTERY SWITCHOVER WITH ADAPTER-

PLUGGED RESPONSE

= 19V, V

-5

GATE2-PULLUP

GATE1

-150 150

GATE2

= 4.2V, R

TIME (μs)

PULLUP

100500-50-100

LOGIC-INPUT THRESHOLD vs. TEMPERATURE

1.8

1.6

1.4

1.2

0.8

0.6

0.4

0.2

TH-HI

TH-LO

-50

TEMPERATURE (°C)

= 5kΩ)

907030 50-10 10-30

MAX4959/60 toc05

MAX4959/60 toc08

OVERVOLTAGE AND UNDERVOLTAGE TRIP

DIFFERENCE vs. TEMPERATURE

= 1kΩ)

VOLTAGE (V)

-1

-2

-3

-4

-5

-50 90

PULLUP

UV TRIP DIFF

OV TRIP DIFF

TEMPERATURE (°C)

VDD SUPPLY CURRENT vs. TEMPERATURE

4.5

SUPPLY CURRENT (μA)

3.5

-50 110

TEMPERATURE (°C)

MAX4959/60 toc06

70503010-10-30

MAX4959/60 toc09

9070503010-10-30

VOLTAGE RANGE vs. INPUT VOLTAGE RANGE

(V)

1052515 20

VIN (V)

MAX4959/60 toc10

Detailed Description

The MAX4959/MAX4960 provide up to +28V overvoltage protection for low-voltage systems. When the input voltage exceeds the overvoltage trip level, the MAX4959/ MAX4960 turn off an external pFET to prevent damage to the protected components.

The MAX4959/MAX4960 feature a control bit (CB) pin that controls an external battery-switchover function that switches in the battery when the adapter is unconnected. The host system detects when the battery switchover must take place and pulls CB high to turn on P2. The load current is not interrupted during battery switchover as the body diode of P2 conducts until the CB line is driven high (see the

MAX4959 Typical Operating Circuit 1

Figure 4).

An additional safety feature latches off pFET P1 when a low-power adapter is plugged in. This protects the system from seeing repeated adapter insertions and removals when an incorrect low-power adapter is plugged in that cannot provide sufficient current.

Undervoltage Lockout (UVLO)

The MAX4959/MAX4960 have an adjustable undervoltage lockout threshold ranging from +5V to +28V. When VINis less than the V

UVLO

, the device waits for a blank-

ing time, t

BLANK

, to see if the fault still exists. If the fault

does not exist at the end of t

BLANK

, P1 remains on. If

VINis less than V

UVLO

for longer than the blanking time, the device turns P1 off and P1 does not turn on again until VIN< 0.75V. See Figure 1.

Overvoltage Lockout (OVLO)

The MAX4959/MAX4960 have an adjustable overvoltage lockout threshold ranging from +6V to +28V. When VINis greater than the V

OVLO

, the device turns P1 off

immediately. When V

drops below V

OVLO,

P1 turns on

again after the debounce time has elapsed.

Device Operation

High-Voltage Adapter (V

> V

OVLO

)

If an adapter with a voltage higher than V

OVLO

is plugged in, the MAX4959/MAX4960 is in an OVP condition, so P1 is kept off or immediately turned off. There is

MAX4959/MAX4960

High-Voltage OVP with Battery Switchover

_______________________________________________________________________________________ 5

Pin Description

MAX4959

NAME FUNCTION

1 1 GATE1

pFET Gate Drive Output Open Drain. GATE1 is actively driven low, except during fault (OVP or UVP) condition (the external PFET is turned off). When V

UVLO

< VIN < V

OVLO

GATE1 is driven low (the external PFETP1 is turned on).

2, 9 9 N.C. No Connection. Not internally connected. (Connect to ground or leave unconnected.)

—2

pFET Source Output. An internal resistor is connected between SOURCE1 and GATE1.

33IN

Voltage Input. IN is both the power-supply input and the overvoltage/undervoltage sense input. Bypass IN to GND with a 1µF ceramic capacitor to get a ±15kV protected input. A minimum 0.1µF ceramic capacitor is required for proper operation.

4 4 UVS

Undervoltage Threshold Set Input. Connect UVS to an external resistive divider from IN to GND to set the undervoltage lockout threshold. (See Typical Operating Circuits.)

5 5 OVS

Overvoltage Threshold Set Input. Connect OVS to an external resistive divider from IN to GND to set the overvoltage lockout threshold. (See Typical Operating Circuits.)

66V

Inter nal P ow er - S up p l y Outp ut. Byp ass V D D to GN D w i th a 0.1µF m i ni m um cap aci tor .

V D D p ow er s the i nter nal p ow er - on r eset ci r cui ts. ( S ee the V

D D

C ap aci tor S el ecti on secti on.)

77CB

Battery Switchover Control Input. When CB is high, GATE1 is high (P1 is off), and GATE2 is low (P2 is on). When CB is low, GATE1 is controlled by internal logic and GATE2 is high (P2 is off). GATE1 is controlled by CB only if V

ULO

< VIN < V

OVLO

8 8 GND Ground

10 10 GATE2

pFET Gate Drive Output, Open Drain. When CB is high, GATE2 is low (P2 is on). When CB is low, GATE2 is high impedance (P2 is off).

MAX4960

SOURCE1

MAX4959/MAX4960

no blanking time for OVP, but the debounce time applies once the IN voltage falls below V

OVLO

but

above V

UVLO

. When the voltage at IN is higher than

OVLO

, the CB pin does not control P1.

Correct Adapter (V

UVLO

< VIN< V

OVLO

)

In this case, when the adapter is plugged in, the device goes through a 20ms (typ) debounce time and ensures that the voltage at IN is between V

UVLO

and V

OVLO

before P1 is turned on. In this state, the CB pin controls both P1 and P2.

Low-Power Adapter or Glitch Condition

If the adapter has the correct voltage but not enough power (incorrect low-power adapter), the MAX4959/ MAX4960 protect pFET P1 from oscillation. When the adapter is first plugged in, P1 is off so the voltage is correct. When P1 is turned on after the debounce time, the low-power adapter is dragged down to below V

UVLO

. The device waits for a 10ms blanking time to make sure it is not a temporary glitch, and, if a fault still exists, it latches off P1. P1 does not turn on again until the adapter is unplugged (VIN<~0.75V) and plugged in again. This feature can work without the battery present

High-Voltage OVP with Battery Switchover

6 _______________________________________________________________________________________

Functional Diagram for the MAX4959

Functional Diagrams

VREF2 = 0.7V

VREF1 = 2V

OVS

UVS

MAX4959

GATE1

GATE2

POWER

UVLO

BANDGAP

OFF STORAGE

ANALOG SUPPLY

POWER-ON RESET AND

DIGITAL

SUPPLY

LOGIC

UVLOINT

OVLO

UVLO

N2N1

GND

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