MAXIM MAX4889B, MAX4889C Technical data

General Description

The MAX4889B/MAX4889C high-speed passive switches route PCI Express®(PCIe) data between two possible destinations in desktop or notebook PCs. The MAX4889B/MAX4889C are quad double-pole/doublethrow (4 x DPDT) switches ideal for switching four half lanes of PCIe data between two destinations. The MAX4889B/MAX4889C feature a single digital control input (SEL) to switch signal paths.

The MAX4889C is intended for use in systems (e.g., SAS) where both the input and output are capacitively coupled, and provides a 10µA (typ) source current and a 60kΩ (typ) internal biasing resistor to GND at the _OUT_ terminals.

The MAX4889B/MAX4889C are fully specified to operate from a single +3.3V (typ) power supply. Both devices are available in an industry-standard 3.5mm x

9.0mm, 42-pin TQFN package. These devices operate over the -40°C to +85°C extended temperature range.

Applications

Desktop PCs

Notebook PCs

Servers

Video Graphics Cards—SLI

(Scaled Link Interface) and CrossFire™

Features

♦ Single +3.3V Power-Supply Voltage

♦ Support PCIe Gen I, Gen II, and Gen III Data Rates

♦ Supports SAS I, SAS II, and SAS 6.0Gbps

(MAX4889C)

♦ Superior Return Loss

Better than -10dB (typ) at 5.0GHz

♦ Small 3.5mm x 9.0mm, 42-Pin TQFN Package

♦ Industry-Standard Pinouts

MAX4889B/MAX4889C

2.5/5.0/8.0Gbps PCIe Passive Switches

________________________________________________________________

Maxim Integrated Products

Ordering Information

19-4148; Rev 2; 8/10

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Denotes a lead(Pb)-free/RoHS-compliant package.

EP = Exposed pad.

EVALUATION KIT

AVAILABLE

Pin Configuration

PCI Express is a registered service mark of PCI-SIG Corporation.

SLI is a registered trademark of NVIDIA Corporation.

CrossFire is a trademark of ATI Technologies, Inc.

Typical Operating Circuit appears at end of data sheet.

PART TEMP RANGE PIN-PACKAGE

MAX4889BETO+ -40°C to +85°C 42 TQFN-EP*

MAX4889CETO+ -40°C to +85°C 42 TQFN-EP*

TOP VIEW

COUTA-

VCCGND

DOUTA+

DOUTA-

DIN-

GND

DOUTB-

DOUTB+

GND

COUTA+

GND

SEL

VCCBOUTA-

BOUTA+

VCCGND

AOUTA-

AOUTA+

GND

38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

GND

*CONNECT EXPOSED PAD TO GROUND.

*EP

1 2 3 4 5 6 7 8 9 1011121314151617

AIN-

AIN+

AOUTB-

AOUTB+

BIN+

BIN-

BOUTB+

MAX4889B MAX4889C

BOUTB-

TQFN

CIN+

CIN-

COUTB-

COUTB+

DIN+

MAX4889B/MAX4889C

2.5/5.0/8.0Gbps PCIe Passive Switches

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VCC= +3.3V ±10%, TA= T

MIN

to T

MAX,

unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise

noted.) (Note 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

(All voltages referenced to GND, unless otherwise noted.) V

...........................................................................-0.3V to +4V

SEL, _IN_, _OUTA_, _OUTB_ (Note 1) .......-0.3V to (V

+ 0.3V)

Continuous Current (AIN_ to AOUTA_/AOUTB_, BIN_ to

BOUTA_/BOUTB_, CIN_ to COUTA_/COUTB_, DIN_ to

DOUTA_/DOUTB_) .........................................................±70mA

Peak Current (AIN_ to AOUTA_/AOUTB_, BIN_ to

BOUTA_/BOUTB_, CIN_ to COUTA_/COUTB_, DIN_ to

DOUTA_/DOUTB_)

(pulsed at 1ms, 10% duty cycle)..............................±70mA

Continuous Current (SEL).................................................±10mA

Peak Current (SEL)

(pulsed at 1ms, 10% duty cycle)..................................±10mA

Continuous Power Dissipation (T

= +70°C) for multilayer board:

42-Pin TQFN (derate 35.7mW/°C above +70°C) .......2857mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Package Junction-to-Ambient Thermal Resistance

(θ

) (Note 2) ............................................................28.0°C/W

Package Junction-to-Case Thermal Resistance

(θ

) (Note 2) ..............................................................2.0°C/W

Lead Temperature (soldering, 10s) .................................+300°C

Soldering Temperature (reflow) .......................................+260°C

Note 1: Signals on SEL, _IN_, _OUTA_, _OUTB_ exceeding VCCor GND are clamped by internal diodes. Limit forward-diode current

to maximum current rating.

Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC PERFORMANCE

Analog Signal Range

On-Resistance R

On-Resistance Match Between Pairs of Same Channel

On-Resistance Match Between Channels

On-Resistance Flatness R

_OUTA_ or _OUTB_ Off-Leakage Current

_IN_ On-Leakage Current I

Output Short-Circuit Current

Output Open-Circuit Voltage

_IN_,

_OUTA_,

_OUTB_

R

FLAT (ON)

_OUTA_ (OFF)

_OUTB_ (OFF)

_IN_ (ON)

-0.3

VCC = +3.0V, I V

_OUTB_

VCC = +3.0V, I V

_OUTB_

VCC = +3.0V, I V

_OUTB_

VCC = +3.0V, I V

_OUTB_

VCC = +3.6V, V or V

_OUTB_

VCC = +3.6V, V or V

_OUTB_

= 0V, 1.2V

= 0V (Notes 4, 5)

= 0V, 1.2V (Notes 5, 6)

= 15mA, V

_IN_

= 15mA, V

_IN_

= 15mA, V

_IN_

= 15mA, V

_IN_

= 0V, 1.2V, V

_IN_

_OUTA_

= 1.2V, 0V (MAX4889B)

= 0V, 1.2V, V

= V

_IN_

or unconnected

_IN_

_OUTA_

6.4 8.4 

0.1 0.5 

0.2 

0.3 

-1 +1 μA

1.8

(MAX4889B)

All other ports are unconnected (MAX4889C)

515μA

0.2 0.6 0.9 V

FREQUENCY RANGE

(GH z)

MAXIMUM INSERTION

LOS S (d B)

0–2.5

14 25

 f

GHz

+0.6

2.5–5

6 5

 f

GHz

-1.0

5 or greater

8 5

 f

GHz

-3.0

MAX4889B/MAX4889C

2.5/5.0/8.0Gbps PCIe Passive Switches

_______________________________________________________________________________________ 3

Note 3: All units are 100% production tested at TA= +85°C. Limits over the operating temperature range are guaranteed by design

and characterization and are not production tested.

Note 4: ΔR

= R

ON (MAX)

- R

ON (MIN)

Note 5: Guaranteed by design, not production tested. Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the

specified analog signal range.

ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.3V ±10%, TA= T

MIN

to T

MAX,

unless otherwise noted. Typical values are at VCC= +3.3V, TA= +25°C, unless otherwise

noted.) (Note 3)

Table 1. Insertion Loss Mask

AC PERFORMANCE

SEL-to-Switch Turn-On Time t

SEL-to-Switch Turn-Off Time t

Propagati on Del a y tPD ZS = ZL= 50, Figure 2 50 ps

Output Skew Between Pairs t

Output Skew Between Same Pair t

Differential Return Loss (Note 5) S

Differential Insertion Loss (Note 5) S

Differential Crossta lk (Note 5) S

Differential Off-Isolation (Note 5) S

CONTROL INPUT (SEL)

Input Logic High VIH 1.4 V

Input Logic Low VIL 0.6 V

Input Logic Hysteresis V

POWER SUPPL Y

Power-Supply Range VCC 3.0 3.6 V

VCC Supply C urrent ICC V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

ZS = ZL= 50 80 ns

ON_SEL

OFF_SEL

DD21_OFF

ZS = ZL= 50, Figure 1 15 ns

ZS = ZL= 50, Figure 2 50 ps

SKEW1

ZS = ZL= 50, Figure 2 10 ps

SKEW2

0Hz < f  2.8GHz -14

DD11

DD21

DDCTK

HYST

2.8GHz < f  5.0GHz -8

f > 5.0GHz -3

See Table 1 dB

0Hz < f  2.5GHz -40

2.5GHz < f  5.0GHz -30

f > 5.0GHz -25

0Hz < f  2.5GHz -15

2.5GHz < f  5.0GHz -12

f > 5.0GHz -12

130 mV

= 0V or VCC 1 mA

SEL

MAX4889B/MAX4889C

2.5/5.0/8.0Gbps PCIe Passive Switches

4 _______________________________________________________________________________________

Test Circuits/Timing Diagrams

Figure 1. Switching Time

SOURCE

SEL

OUT

50%

90%

ON_SEL

THE FREQUENCY OF THE SIGNAL SHOULD BE ABOVE THE HIGHPASS FILTER CORNER OF THE COUPLING CAPACITORS.

MAX4889B/

MAX4889C

SEL

LOAD

OUT

50%

10%

OFF_SEL

+ 8 hidden pages