General Description
The MAX4850/MAX4850H/MAX4852/MAX4852H family
of dual SPDT (single-pole/double-throw) switches operate from a single +2V to +5.5V supply and can handle
signals greater than the supply rail. These switches feature low 3.5Ω or 3.5Ω/7Ω on-resistance with low oncapacitance, making them ideal for switching audio
and data signals.
The MAX4850/MAX4850H are configured with two
SPDT switches and feature two comparators for headphone detection or mute/send key functions. The
MAX4852 has two SPDT switches with no comparators
for low 1µA supply current.
For over-rail applications, these devices offer either the
pass-through or high-impedance option. For the
MAX4850/MAX4852, the signal (up to 5.5V) passes
through the switch without distortion even when the positive supply rail is exceeded. For the MAX4850H/
MAX4852H, the switch input becomes high impedance
when the input signal exceeds the supply rail.
The MAX4850/MAX4850H/MAX4852/MAX4852H are
available in the space-saving (3mm x 3mm), 16-pin
TQFN package and operate over the extended temperature range of -40°C to +85°C.
Applications
USB Switching
Audio-Signal Routing
Cellular Phones
Notebook Computers
PDAs and Other Handheld Devices
Features
♦ USB 2.0 Full Speed (12MB) and USB 1.1 Signal
Switching Compliant
♦ Switch Signals Greater than V
CC
♦ 0.1ns Differential Skew
♦ 3.5Ω/7Ω On-Resistance
♦ 135MHz -3dB Bandwidth
♦ +2V to +5.5V Supply Range
♦ 1.8V Logic Compatible
♦ Low Supply Current
1µA (MAX4852)
5µA (MAX4850)
10µA (MAX4850H/MAX4852H)
♦ Available in a Space-Saving (3mm x 3mm),
16-Pin TQFN Package
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
V
CC
3
MAX4850
MAX4850H
NC1
NO1
NC2
NO2
COUT2
COM1
IN1
IN2
COM2
CIN2
V
CC
3
COUT1
CIN1
MAX4852
MAX4852H
NC1
NO1
NC2
NO2
COM1
IN1
IN2
COM2
MAX4850_
MAX4852_
IN_ NO_ NC_
0 OFF ON
1 ON OFF
SWITCHES SHOWN FOR
LOGIC 0 INPUT
3.5Ω
3.5Ω
7Ω
3.5Ω
3.5Ω
7Ω
Block Diagrams/Truth Table
19-3375; Rev 0; 7/04
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
*EP = Exposed paddle.
Pin Configurations and Selector Guide appear at end of
data sheet.
ABRIDGED DATA SHEET
PART TEMP RANGE PIN-PACKAGE
MAX4850ETE -40°C to +85°C 16 TQFN-EP* ABU
MAX4850HETE -40°C to +85°C 16 TQFN-EP* ABV
MAX4852ETE -40°C to +85°C 16 TQFN-EP* ABZ
MAX4852HETE -40°C to +85°C 16 TQFN-EP* ACA
TOP
MARK
Detailed Description
The MAX4850/MAX4850H/MAX4852/MAX4852H are low
on-resistance, low-voltage, analog switches that operate
from a +2V to +5.5V single supply and are fully specified
for nominal 3.0V applications. These devices feature
over-rail signal capability that allows signals up to 5.5V
with supply voltages down to 2.0V. These devices are
configured as dual SPDT switches.
These switches have low 50pF on-channel capacitance,
which allows for 12Mbps switching of the data signals for
USB 2.0 full speed/1.1 applications. The MAX485_ _ are
designed to switch D+ and D- USB signals with a guaranteed skew of less than 1ns (see Figure 1), as measured
from 50% of the input signal to 50% of the output signal.
The MAX4850_ feature a comparator that can be used
for headphone or mute detection. The comparator
threshold is internally generated to be approximately 1/3
of VCC.
Applications Information
Digital Control Inputs
The logic inputs (IN_) accept up to +5.5V even if the
supply voltages are below this level. For example, with a
+3.3V VCCsupply, IN_ can be driven low to GND and
high to +5.5V, allowing for mixing of logic levels in a
system. Driving IN_ rail-to-rail minimizes power con-
sumption. For a +2V supply voltage, the logic thresholds
are 0.5V (low) and 1.4V (high); for a +5V supply voltage,
the logic thresholds are 0.8V (low) and 1.8V (high).
Analog Signal Levels
The on-resistance of these switches changes very little
for analog input signals across the entire supply voltage range (see Typical Operating Characteristics). The
switches are bidirectional, so NO_, NC_, and COM_
can be either inputs or outputs.
Comparator
The positive terminal of the comparator is internally set to
V
CC
/3. When the negative terminal (CIN_) is below the
threshold (VCC/3), the comparator output (COUT_) goes
high. When CIN_ rises above VCC/3, COUT_ goes low.
The comparator threshold allows for detection of headphones since headphone audio signals are typically
biased to VCC/2.
Power-Supply Sequencing
Caution: Do not exceed the absolute maximum ratings
because stresses beyond the listed ratings may cause
permanent damage to the device.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply VCCbefore applying
analog signals, especially if the analog signal is not
current-limited.
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
______________________________________________________________________________________ 11
ABRIDGED DATA SHEET
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
12 ______________________________________________________________________________________
Test Circuits/Timing Diagrams
Figure 1. Switching Time
Figure 2. Input/Output Skew Timing Diagram
ABRIDGED DATA SHEET
MAX4850_
MAX4852_
V
NO
LOGIC
INPUT
TxD+
V
CC
V
CC
NO_
IN_
GND
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
R
= V
V
OUT
NO (
RL + R
COM_
R
L
)
ON
A
R
s
tR < 20ns
V
CC
LOGIC
INPUT
INPUT
0V
V
OUT
0V
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
10%
90%
V
OUT
INPUT A
INPUT A-
SWITCH
OUTPUT
SWITCH
L
C
L
B
C
L
50%
0.9 x V
t
ON
V
+ 0.5V
CC
HIGH-Z MODE
t
HIZ
NORMAL MODE NORMAL MODE
t
ri
90%
50%
t
skew_i
50%
10%
t
fi
tF < 20ns
t
OFF
0.9 x V
0UT
t
OUT
HIZB
TxD-
|t
|
ro - tri
|t
|
fo - tfi
|t
|
skew_o
|t
|
skew_i
Rs = 39Ω
= 50pF
C
L
DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS.
DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS.
A-
R
s
B-
C
L
OUTPUT B
OUTPUT B-
10%
90%
t
ro
50%
t
fo
50%
90%
t
skew_o
10%
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
______________________________________________________________________________________ 13
MAX4850_
Figure 3. Break-Before-Make Interval
Figure 4. Charge Injection
Figure 5. On-Loss, Off-Isolation, and Crosstalk
ABRIDGED DATA SHEET
MAX4852_
V
V
CC
V
CC
N_
NC_
NO_
COM_
IN_
V
OUT
R
L
C
L
LOGIC
INPUT
V
CC
50%
0V
LOGIC
INPUT
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
MAX4850_
MAX4852_
R
GEN
NC_
OR NO_
V
GEN
GND
0V OR V
50Ω
IN_
CC
MAX4850_
MAX4852_
NC1
GND
+5V
V
GND
0.9 x V
OUT
OFF
V
CC
V
CC
COM_
V
OUT
t
BBM
ΔV
OUT
V
OUT
V
OUT
C
L
IN
OFF
ON
IN_
Q = (ΔV
ON
OUT
OFF
)(CL)
TO V
V
IL
IH
OFF
IN
LOGIC-INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
10nF
NETWORK
ANALYZER
CC
COM1
NO1*
V
IN
V
OUT
50Ω
MEAS REF
50Ω 50Ω
50Ω
OFF-ISOLATION = 20log
ON-LOSS = 20log
CROSSTALK = 20log
V
OUT
V
IN
V
OUT
V
IN
V
OUT
V
IN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF", NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON", NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
14 ______________________________________________________________________________________
Figure 6. Channel Off-/On-Capacitance
Figure 7. Comparator Switching Time
ABRIDGED DATA SHEET
V
CC
10nF
V
CC
CAPACITANCE
METER
f = 1MHz
COM_
NC_ OR
NO_
MAX4850_
MAX4852_
IN
GND
V
OR V
IL
IH
MAX4850_
V
CIN_
NO_
CIN_
V
TH
V
CC
3
= VCC/3
V
CC
V
CC
GND
COUT_
V
COUT_
COMPARATOR
INPUT (V
COMPARATOR
OUTPUT (V
CIN_
COUT_
VTH + 100mV
)
V
- 100mV
TH
V
)
OUT
50%
t
COMP
50%
0V
tR < 20ns
t
50%
F
< 20ns
50%
t
COMP
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
______________________________________________________________________________________ 15
Pin Configurations
Selector Guide
Chip Information
TRANSISTOR COUNT: 735
PROCESS: CMOS
Typical Operating Circuit
ABRIDGED DATA SHEET
TOP VIEW
N.C.
CIN1
CIN2
COM1
NC1
16
1
2
3
4
5678
NO1
THIN QFN THIN QFN
CONNECT EXPOSED PADDLE TO GROUND.
R
ON
PART
NC_/NO_
COMPARATORS
(Ω)
MAX4850 3.5/3.5 2
IN1
VCCCOUT2
15 14 13
NO2
12
COUT1
11
MAX4850
MAX4850H
GND
NC2
N.C.
COM2
10
IN2
9
OVER-RAIL
HANDLING
Input signal
passes through
the switch
N.C.
N.C.
N.C.
COM1
DATA
SOURCE
NC1
IN1
16
15 14 13
1
2
MAX4852
3
4
MAX4852H
5678
NO1
GND
NC1
OUT+
OUT-
NO1
VCCN.C.
NO2
12
N.C.
11
COM2
10
IN2
9
NC2
N.C.
MAX4850_
COM1
IN1
INPUT
SELECT
MAX4850H 3.5/3.5 2
High-impedance
switch input
Input signal
MAX4852 3.5/7 —
passes through
the switch
MAX4852H 3.5/7 —
High-impedance
switch input
MUTE
AUDIO
SOURCE
OUT+
OUT-
NC2
NO2
COUT
IN2
COM2
V
V
CC
3
CIN
CC
MUTE
BUTTON
MAX4850/MAX4850H/MAX4852/MAX4852H
Dual SPDT Analog Switches with
Over-Rail Signal Handling
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)
ABRIDGED DATA SHEET
MARKING
D/2
D
0.10 C 0.08 C
8L 3x3
PKG
MIN.
NOM. MAX.
REF. MIN.
0.70 0.75 0.80
A
b
0.25 0.30 0.35
3.00 3.10
D
2.90
2.90 3.00 3.10
E
e
0.65 BSC.
0.55 0.75
L
0.35
8
2
ND
2
NE
0
0.02
A1
A2
k
0.05
0.20 REF
-
-
0.25
0.25
E
E/2
AAAA
C
L
12L 3x3
NOM. MAX. NOM.
0.70
0.75
0.80
0.20
0.25
0.30
2.90
3.00
3.10
3.00
2.90
3.10
0.50 BSC.
0.55
0.45
0.65
12N
3
0.0230.05
0
0.20 REF
-
-
A
A2
A1
16L 3x3
MIN. MAX.
0.70
0.20
2.90
2.90
0.50 BSC.
0.30
040.02
0.20 REF
0.25
(NE - 1) X e
E2/2
MAX.
1.25
1.25
0.95
0.95
1.25
D2/2
D2
b
C
L
e
21-0136
JEDEC
PIN ID
WEED-1
0.35 x 45°
WEED-11.25
0.35 x 45°
0.35 x 45°
WEED-2
0.225 x 45°
WEED-2
0.225 x 45°
WEED-2
0.35 x 45°
WEED-2
0.35 x 45° WEED-2
0.10 M C A B
L
12x16L QFN THIN.EPS
1
I
2
(ND - 1) X e
C
L
L
PKG.
0.75
0.80
0.25
0.30
3.00
3.10
3.10
3.00
0.40
0.50
16
4
0.05
-
CODES
TQ833-1 1.250.25 0.70 0.35 x 45° WEEC1.250.700.25
T1233-1
T1233-3
T1233-4
T1633-2 0. 95
T1633F-3
T1633FH-3 0.65 0.80 0.95
T1633-4 0. 95
T1633-5 0. 95
-
e
k
L
C
L
e
EXPOSED PAD VARIATIONS
D2
MIN.
NOM.
MAX.
MIN.
1.25
0.95
1.10
0.95
1.25
1.10
0.95 1.10 0.35 x 45°1.25 WEED-10.95
1.251.10
0.95
1.25
1.10
0.65
0.95
0.95
0.80
0.65
0.65 0.80
1.10 1.25 0.95 1.10
1.25
0.95
1.10
E2
PACKAGE OUTLINE
8, 12, 16L THIN QFN, 3x3x0.8mm
E2
NOM.
1.10
1.100.95
1.10
0.80
1.10 1.25
NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF T ERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO
JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED
WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE.
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS .
9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
12. WARPAGE NOT TO EXCEED 0.10mm.
PACKAGE OUTLINE
8, 12, 16L THIN QFN, 3x3x0.8mm
21-0136
2
I
2
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