How it Works
MAXIM
Loading...
MAX4719
Technical data
11 pgs288.78 Kb0

MAXIM MAX4719 Technical data

Download
General Description
The MAX4719 low-voltage, low on-resistance (RON), dual single-pole/double throw (SPDT) analog switch operates from a single +1.8V to +5.5V supply. The MAX4719 features 20Ω RON(max) with 1.2Ω flatness and 0.4Ω matching between channels. The switch offers break-before-make switching (1ns) with tON<80ns and t
OFF
<40ns at +2.7V. The digital logic inputs are +1.8V
logic compatible with a +2.7V to +3.6V supply.
The switch is packaged in a chip-scale package (UCSP™), significantly reducing the required PC board area. The chip occupies only a 2.0mm ✕ 1.50mm area and has a 4 ✕ 3 bump array with a bump pitch of
0.5mm. The MAX4719 is also available in a 10-pin µMAX package.
Applications
Cell Phones
Battery-Operated Equipment
Audio/Video-Signal Routing
Low-Voltage Data-Acquisition Systems
Sample-and-Hold Circuits
PDAs
Features
♦ -3dB Bandwidth: >300MHz
♦ Low 15pF On-Channel Capacitance
♦ Single-Supply Operation from +1.8V to +5.5V
♦ 20Ω RON(max) Switch
0.4Ω (max) RONMatch (+3.0V Supply)
1.2Ω (max) R
ON
Flatness (+3.0V Supply)
♦ Rail-to-Rail®Signal Handling
♦ High Off-Isolation: -55dB (10MHz)
♦ Low Crosstalk: -80dB (10MHz)
♦ Low Distortion: 0.03%
♦ +1.8V CMOS-Logic Compatible
♦ <0.5nA Leakage Current at +25°C
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-2626; Rev 0; 10/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configurations/Functional Diagrams/Truth Table
UCSP is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
Note: UCSP package requires special solder temperature pro­file described in the Absolute Maximum Ratings section.
*UCSP reliability is integrally linked to the user’s assembly meth­ods, circuit board material, and environment. See the UCSP reli­ability notice in the UCSP Reliability section of this data sheet for more information.
PART TEMP RANGE
MAX4719EUB -40°C to +85°C 10 µMAX —
MAX4719EBC-T* -40°C to +85°C 12 UCSP-12 ABJ
PIN/BUMP­PACKAGE
TOP
MARK
TOP VIEW
(BUMP SIDE DOWN)
NC1
MAX4719
GND
C1
C2
C3
C4 B4 A4
V+
UCSP
A1B1
NC2
IN_
A2
IN2IN1
COM2COM1
A3
NO2NO1
0
1
SWITCHES SHOWN FOR LOGIC "0" INPUT
MAX4719
MAX4719
NO_
OFF
ON
NC_
ON
OFF
NO1
COM1
IN1
NC1
1
V+
2
3
4
5
µMAX
10
NO2
9
COM2
IN2
8
7
NC2
GND
6
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog Switch in UCSP
2 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, VIH= +1.4V, VIL= +0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = +3.0V,
T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(All Voltages Referenced to GND)
V+, IN_...................................................................-0.3V to +6.0V
COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V)
Continuous Current COM_, NO_, NC_ ...........................±100mA
Peak Current COM_, NO_, NC_
(pulsed at 1ms, 10% duty cycle)................................±200mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW
12-Bump UCSP (derate 11.4mW/°C above +70°C) ....909mW
ESD Method 3015.7 ...............................................................2kV
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering) (Note 2)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maxi-
mum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom­mended in the industry standard specification, JEDEC 020A, paragraph 7.6, table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed.
)
),
)
)
ABSOLUTE MAXIMUM RATINGS
Analog Signal Range
PARAMETER SYMBOL CONDITIONS T
V
,
COM_
V
, V
NO_
NC_
ANALOG SWITCH
On-Resistance (Note 5) R
On-Resistance Match Between Channels (Notes 5, 6)
On-Resistance Flatness (Note 7)
NO_, NC_ Off-Leakage Current (Note 8)
COM_ On-Leakage Current (Note 8)
R
FLAT(ON
I
NO_(OFF
I
NC_(OFF
I
COM_(ON
∆R
ON
ON
V+ = 2.7V, I V
V+ = 2.7V, I V
V+ = 2.7V, I V
V+ = 3.6V, V V
V+ = 3.6V, V V floating
DYNAMIC CHARACTERISTICS
Turn-On Time t
ON
V R
or V
NO_
NO_
NO_
NO_
NO_
NO_
L
NC_
or V
NC_
or V
NC_
or V
NC_
or V
NC_
, V
= 1.5V;
NC_
= 300Ω, CL = 35pF, Figure 1
COM_
= 1.5V
COM_
= 1.5V
COM_
= 1.0V, 1.5V, 2.0V
COM_
= 3.3V, 0.3V
COM_
= 0.3V, 3.3V, or
MIN TYP MAX UNITS
to
0V+V
to
to
to
to
to
-1 +1
-2 +2
= 10mA;
= 10mA;
= 10mA;
= 0.3V, 3.3V;
= 0.3V, 3.3V;
A
T
MIN
T
MAX
+25°C1420
T
MIN
T
MAX
+25°C 0.15 0.4
T
MIN
T
MAX
+25°C 0.6 1.2
T
MIN
T
MAX
+25°C -0.5 0.01 +0.5
T
MIN
T
MAX
+25°C -1 0.01 +1
T
MIN
T
MAX
+25°C4080
T
to
MIN
T
MAX
25
0.5
1.5
100
Ω
Ω
Ω
nA
nA
ns
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, VIH= +1.4V, VIL= +0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = +3.0V,
T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
)
)
Turn-Off Time t
Break-Before-Make Time Delay (Note 8)
Charge Injection Q
PARAMETER SYMBOL CONDITIONS T
V
, V
OFF
t
BBM
NO_
R
= 300Ω, CL = 35pF, Figure 1
L
V
, V
NO_
= 300Ω, CL = 35pF, Figure 2
R
L
V
= 2V, R
GEN
= 1.0nF, Figure 3
C
L
f = 10MHz; V
= 50Ω, CL = 5pF, Figure 4
R
Off-Isolation V
ISO
L
f = 1MHz; V
= 50Ω, CL = 5pF, Figure 4
R
L
f = 10MHz; V
= 50Ω, CL = 5pF, Figure 4
R
Crosstalk (Note 9) V
CT
On-Channel -3dB Bandwidth BW
Total Harmonic Distortion THD V
C
NO_, NC_ Off-Capacitance
Switch On-Capacitance C
NO_(OFF
C
NC_(OFF
ON
L
f = 1MHz; V
= 50Ω, CL = 5pF, Figure 4
R
L
Signal = 0dBm, R C
= 5pF, Figure 4
L
= 2V
COM
f = 1MHz, Figure 5 +25°C9 pF
f = 1MHz, Figure 5 +25°C20 pF
DIGITAL I/O
Input Logic High Voltage V
Input Logic Low Voltage V
Input Leakage Current I
IH
IL
IN
V+ = +3.6V, V
POWER SUPPLY
Power-Supply Range V+
Supply Current I+ V+ = +5.5V, V
= 1.5V;
NC_
= 1.5V;
NC_
GEN
NO_
NO_
NO_
NO_
, RL = 600Ω +25°C 0.03 %
P-P
IN_
IN_
A
MIN TYP MAX UNITS
+25°C2040
to
T
MIN
T
MAX
+25°C8
T
to
= 0Ω;
, V
= 1V
NC_
, V
= 1V
NC_
, V
= 1V
NC_
, V
= 1V
NC_
= 50Ω;
L
= 0V or 5.5V
= 0V or V+
P-P
P-P
MIN
T
MAX
+25°C18 pC
;
P-P
+25°C
;
;
P-P
+25°C
;
+25°C 300 MHz
T
to
MIN
T
MAX
T
to
MIN
T
MAX
T
to
MIN
T
MAX
T
to
MIN
T
MAX
T
to
MIN
T
MAX
1
1.4 V
-100 +100 nA
1.8 5.5 V
-55
-80
-80
-110
50
ns
ns
dB
dB
0.5 V
1µA
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog Switch in UCSP
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.2V to +5.5V, VIH= +2.0V, VIL= +0.8V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = +5.0V,
T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
)
),
)
)
Analog Signal Range
PARAMETER SYMBOL CONDITIONS T
V
,
COM_
V
, V
NO_
NC_
ANALOG SWITCH
On-Resistance (Note 5) R
On-Resistance Match Between Channels (Notes 5, 6)
On-Resistance Flatness (Note 7)
NO_, NC_ Off-Leakage Current (Note 8)
COM_ On-Leakage Current (Note 8)
ON
∆R
ON
R
FLAT(ON
I
NO_(OFF
I
NC_(OFF
I
COM_(ON
DYNAMIC CHARACTERISTICS
Turn-On Time t
Turn-Off Time t
Break-Before-Make Time Delay (Note 8)
ON
OFF
t
BBM
DIGITAL I/O
Input Logic High Voltage V
Input Logic Low Voltage V
Input Leakage Current I
IH
IL
IN
V+ = 4.2V, I
or V
V
NO_
V+ = 4.2V, I
or V
V
NO_
V+ = 4.2V, I V
or V
NO_
V+ = 5.5V; V
or V
V
NO_
V+ = 5.5V, V V
or V
NO_
floating
V
, V
NO_
= 300Ω, CL = 35pF, Figure 1
R
L
V
, V
NO_
R
= 300Ω, CL = 35pF, Figure 1
L
V
, V
NO_
= 300Ω, CL = 35pF, Figure 2
R
L
V+ = 5.5V, VIN_ = 0V or V+
NC_
NC_
NC_
= 10mA;
COM_
= 3.5V
NC_
= 10mA;
COM_
= 3.5V
NC_
= 10mA;
COM_
= 1.0V, 2.0V, 4.5V
NC_
= 1.0V, 4.5V;
COM_
= 4.5V, 1.0V
NC_
= 1.0V, 4.5V;
COM_
= 1.0V, 4.5V, or
NC_
= 3.0V;
= 3.0V;
= 3.0V;
MIN TYP MAX UNITS
to
0V+V
T
MIN
T
A
MAX
+25°C1220
T
to
MIN
T
MAX
+25°C 0.15 0.4
T
to
MIN
T
MAX
+25°C 0.4 1
T
to
MIN
T
MAX
+25°C -0.5 +0.01 +0.5
T
to
MIN
T
MAX
-1 +1
+25°C -1 +0.01 +1
to
T
MIN
T
MAX
-2 +2
+25°C3080
T
to
MIN
T
MAX
+25°C2040
T
to
MIN
T
MAX
+25°C8
T
to
T
T
T
MIN
T
MIN
T
MIN
T
MIN
T
MAX
to
MAX
to
MAX
to
MAX
1
2.0 V
-0.1 +0.1 µA
25
0.5
1.2
100
50
0.8 V
Ω
Ω
Ω
nA
nA
ns
ns
ns
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
_______________________________________________________________________________________ 5
Note 3: UCSP parts are 100% tested at +25°C only, and guaranteed by design over the specified temperature range. µMAX parts
are 100% tested at T
MAX
and guaranteed by design over the specified temperature range.
Note 4: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value is a maximum.
Note 5: Guaranteed by design for UCSP parts. Note 6: ∆R
ON
= R
ON(MAX)
- R
ON(MIN)
.
Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 8: Guaranteed by design. Note 9: Between any two switches.
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, VIH= +2.0V, VIL= +0.8V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V+ = +5.0V,
T
A
= +25°C, unless otherwise noted.) (Notes 3, 4)
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS T
POWER SUPPLY
Power-Supply Range V+
Supply Current I+ V+ = 5.5V, V
IN_
MIN TYP MAX UNITS
to
1.8 5.5 V
to
= 0V or V+
T
T
MIN
T
MIN
T
A
MAX
MAX
1µA
20
ON-RESISTANCE vs. V
V+ = 1.8V
18
COM
MAX4719 toc01
15
14
ON-RESISTANCE vs. V
V+ = 3V
TA = +85°C
COM
MAX4719 toc02
15
ON-RESISTANCE vs. V
V+ = 5V
14
COM
MAX4719 toc03
16
(Ω)
ON
R
14
12
10
05
V+ = 2.5V
V
COM
V+ = 4.2V
V+ = 5V
4321
(V)
13
(Ω)
ON
R
12
11
10
TA = +25°C
0 3.0
TA = -40°C
V
TA = +85°C
(V)
COM
TA = +25°C
4321
13
(Ω)
ON
R
12
TA = -40°C
2.52.01.51.00.5
V
(V)
COM
11
10
05
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog Switch in UCSP
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
LEAKAGE CURRENT vs. TEMPERATURE
700
V+ = 3V
500
300
COM OFF-LEAKAGE
LEAKAGE CURRENT (pA)
100
-100
-40 85 TEMPERATURE (°C)
SUPPLY CURRENT (nA)
800
MAX4719 toc04
COM ON-LEAKAGE
603510-15
600
400
200
LEAKAGE CURRENT (pA)
-200
SUPPLY CURRENT vs. TEMPERATURE
6
5
4
3
2
1
V+ = 5V
V+ = 3V
LEAKAGE CURRENT vs. TEMPERATURE
V+ = 5V
COM ON-LEAKAGE
COM OFF-LEAKAGE
0
-40 85 TEMPERATURE (°C)
MAX4719 toc07
603510-15
100
80
60
40
SUPPLY CURRENT (µA)
20
CHARGE INJECTION vs. V
50
MAX4719 toc05
40
30
20
CHARGE INJECTION (pC)
10
0
CL = 1nF V+ = 3V
05
V
SUPPLY CURRENT vs. LOGIC LEVEL
V+ = 5V
V+ = 3V
COM
CL = 1nF V+ = 5V
(V)
MAX4719 toc08
COM
MAX4719 toc06
4321
0
-40 85 TEMPERATURE (°C)
603510-15
0
05
LOGIC LEVEL (V)
4321
TURN-ON/OFF TIME
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
2.0
1.6
1.2
0.8
LOGIC THRESHOLD (V)
0.4
0
1.5 5.5 SUPPLY VOLTAGE (V)
100
MAX4719 toc09
V
TH+
V
TH-
5.04.54.03.53.02.52.0
80
60
(ns)
OFF
/t
ON
t
40
20
0
1.5 5.5
vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
t
ON
t
4.53.52.5
MAX4719 toc10
OFF
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
_______________________________________________________________________________________ 7
Detailed Description
The MAX4719 high-speed, low-voltage, 20Ω RON, dual SPDT analog switch operates from a single +1.8V to +5.5V supply. The switch features break-before-make switching operation and fast switching speeds (tON= 80ns (max), t
OFF
= 40ns (max)).
Applications Information
Digital Control Inputs
The MAX4719 logic inputs accept up to +5.5V regard­less of supply voltage. For example, with a +3.3V sup­ply, IN_ can be driven low to GND and high to +5.5V allowing for mixing of logic levels in a system. Driving the control logic inputs rail-to-rail minimizes power con­sumption. For a +3V supply voltage, the logic thresh­olds are 0.5V (low) and 1.4V (high); for a +5V supply voltage, the logic thresholds are 0.8V (low) and 2.0V (high).
Analog Signal Levels
The on-resistance of the MAX4719 changes very little for analog input signals across the entire supply voltage range (see the Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs.
Pin Description
TURN-ON/OFF TIME
vs. TEMPERATURE
MAX4719 toc11
TEMPERATURE (°C)
t
ON
/t
OFF
(ns)
603510-15
10
20
40
30
50
60
0
-40 85
tON, V+ = 3.0V tON, V+ = 5.0V
t
OFF
, V+ = 5.0V
t
OFF
, V+ = 3.0V
FREQUENCY RESPONSE
MAX4719 toc12
FREQUENCY (MHz)
ON-LOSS (dB)
10.01
-120
-100
-80
-60
-40
-20
0
20
-140
0.0001 100
V+ = 3V/5V
ON-LOSS
OFF-ISOLATION
CROSSTALK
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
MAX4719 toc13
FREQUENCY (Hz)
THD (%)
10k1k100
0.1
10 100k
1
0.01
V+ = 3V R
L
= 600Ω
PIN
UCSP µMAX
A1 7 NC2
A2 8 IN2
A3 9 COM2
A4 10 NO2
B1 6 GND Ground
B4 1 V+ Positive-Supply Voltage Input
C1 5 NC1
C2 4 IN1
C3 3 COM1
C4 2 NO1
NAME FUNCTION
Analog Switch 2—Normally Closed Terminal
Digital Control Input for Analog Switch 2
Analog Switch 2—Common Terminal
Analog Switch 2—Normally Open Terminal
Analog Switch 1—Normally Closed Terminal
Digital Control Input for Analog Switch 1
Analog Switch 1—Common Terminal
Analog Switch 1—Normally Open Terminal
Test Circuits/Timing Diagrams
Figure 1. Switching Time
Figure 2. Break-Before-Make Interval
MAX4719
Power-Supply Sequencing and
Overvoltage Protection
Caution: Do not exceed the absolute maximum rat­ings because stresses beyond the listed ratings may cause permanent damage to the device.
Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current-limited.
UCSP Package Considerations
For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Chip-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical relia­bility tests. UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and
usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera­tion for a UCSP package. UCSPs are attached through direct solder contact to the user’s PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be consid­ered. Information on Maxim’s qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim’s web­site at www.maxim-ic.com.
Chip Information
TRANSISTOR COUNT: 235
PROCESS: BiCMOS
20Ω, 300MHz Bandwidth, Dual SPDT Analog Switch in UCSP
8 _______________________________________________________________________________________
MAX4719
LOGIC INPUT
NO_
V
N_
OR NC_
IN_
GND
V+
V+
COM_
R
L
300Ω
C
L
35pF
V
IH
LOGIC INPUT
V
V
OUT
SWITCH OUTPUT
IL
0V
V
t
50%
OUT
ON
0.9 x V
0UT
tr < 5ns tf < 5ns
t
OFF
0.9 x V
OUT
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
R
V
= V
OUT
N_ (
RL + R
L
)
ON
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
GND
V+
V+
V
R
L
300Ω
OUT
C
L
35pF
COM_
LOGIC INPUT
V
V
IH
V
IL
OUT
50%
0.9 x V
t
BBM
MAX4719
LOGIC INPUT
V
N_
NC_
NO_
IN_
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
OUT
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
_______________________________________________________________________________________ 9
Figure 3. Charge Injection
Figure 4. On-Loss, Off-Isolation, and Crosstalk
Figure 5. Channel Off/On-Capacitance
Test Circuits/Timing Diagrams (continued)
MAX4719
R
V
GEN
0V OR V+
50Ω
GEN
NC_ OR NO_
GND
IN_
NC1
IN_
+5V
V+
MAX4719
GND
V
10nF
IL
TO V
COM1
NO1
V+
V+
COM_
IH
*
∆V
OUT
V
OUT
V
OUT
C
L
V
IN
V
OUT
MEAS REF
IN
OFF
OFF
IN
IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
NETWORK ANALYZER
50Ω
50Ω 50Ω
50Ω
ON
ON
Q = (∆V
)(CL)
OUT
CROSSTALK = 20log
OFF
OFF
OFF-ISOLATION = 20log
ON-LOSS = 20log
V
OUT
V
IN
V
OUT
V
IN
V
OUT
V
IN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
V+
10nF
V+
CAPACITANCE
METER
f = 1MHz
COM_
NC_ or NO_
MAX4719
GND
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
V
IL
IN
OR V
IH
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog Switch in UCSP
10 ______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
MAX4719
20Ω, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
0.6±0.1
e
10
ÿ 0.50±0.1
1
0.6±0.1
TOP VIEW
D2
A2
b
D1
FRONT VIEW
4X S
10
H
1
BOTTOM VIEW
E2
GAGE PLANE
A
A1
α
E1
L
L1
INCHES
DIM
MIN
-A
0.002
A1 A2 0.030 0.037 0.75 0.95
0.116
D1
0.114
D2
0.116
E1
0.114
E2
0.187
H
0.0157
L L1
0.037 REF
0.007
b e
0.0197 BSC
0.0035
c
0.0196 REF
S
α
0∞ 0∞ 6∞
c
MAX
0.043
0.006
0.120
0.118
0.120
0.118
0.199
0.0275
0.0106
0.0078
6∞
MILLIMETERS
MAX
MIN
1.10
-
0.15
0.05
3.05
2.95
3.00
2.89
3.05
2.95
2.89
3.00
4.75
5.05
0.40
0.70
0.940 REF
0.177
0.270
0.500 BSC
0.090
0.200
0.498 REF
SIDE VIEW
10LUMAX.EPS
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
REV.DOCUMENT CONTROL NO.APPROVAL
21-0061
1
I
1
Loading...
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use