General Description
The MAX4686/MAX4687/MAX4688 low on-resistance
(RON), low-voltage analog switches operate from a single +1.8V to +5.5V supply. The MAX4686/MAX4687 are
single-pole/single-throw (SPST) analog switches, and
the MAX4688 is a single-pole/double-throw (SPDT) analog switch. The MAX4686 is a normally open (NO)
switch, and the MAX4687 is a normally closed (NC)
switch. The MAX4688 has one normally open (NO)
switch and one normally closed (NC) switch.
When powered from a 3V supply these devices feature
2.5Ω (max) RON, with 0.4Ω (max) RONmatching and 1Ω
(max) flatness. The MAX4686/MAX4687/MAX4688 offer
fast switching speeds (tON= 30ns max, t
OFF
= 12ns
max). The MAX4688 offers break-before-make action.
The digital logic inputs are 1.8V logic compatible from a
+2.7V to +3.3V supply. The MAX4686/MAX4687/
MAX4688 are available in the chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 1.50mm x 1.02mm area.
The 3 x 2 array of solder bumps are spaced with a
0.5mm bump pitch.
________________________Applications
MP3 Players
Cellular Phones
Power Routing
Battery-Operated Equipment
Relay Replacement
Audio and Video Signal Routing
Communications Circuits
PCMCIA Cards
Cellular Phones
Hard Drives
Features
♦ 6-Bump, 0.5mm Pitch, UCSP
♦ R
ON
2.5Ω max (+3V Supply)
10Ω max (+1.8V Supply)
♦ 0.4Ω max RONMatch Between Channels
♦ 1Ω max RONFlatness Over Signal Range
♦ Low Leakage Currents Over Temperature
0.5nA (max) at TA= +25°C
♦ Fast Switching: tON= 30ns, t
OFF
= 12ns
♦ Guaranteed Break-Before-Make (MAX4688)
♦ +1.8V to +5.5V Single-Supply Operation
♦ Rail-to-Rail®Signal Handling
♦ Low Crosstalk: -95dB (100kHz)
♦ High Off-Isolation: -90dB (100kHz)
♦ 1.8V Logic Compatible
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
________________________________________________________________ Maxim Integrated Products 1
Pin Configurations/Functional Diagrams/Truth Table
19-2042; Rev 1; 2/03
Ordering Information
PART
TEMP
RANGE
BUMP-
TOP
MARK
MAX4686EBT-T
6 UCSP-6
AAI
MAX4687EBT-T
6 UCSP-6
AAJ
MAX4688EBT-T
6 UCSP-6
AAK
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
UCSP is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PACKAGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
TOP VIEW
IN
B1
B2
B3
SPST NO
A1
NOV+
A2
I.C.
A3
COMGND
MAX4686
V+
IN
GND
B1
B2
B3
MAX4687
SPST NC
A1
NC
A2
I.C.
A3
COM
GND
B1
V+
B2
IN
B3
MAX4688
SPDT
A1
NO
A2
COM
A3
NC
SWITCHES SHOWN FOR LOGIC "0"
MAX4686/MAX4687/MAX4688
IN
NO
OFF
0
1
ON
NC
ON
OFF
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= 0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at 3V and TA= +25°C.)
(Notes 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All Voltages Referenced to GND
V+, IN .......................................................................-0.3V to +6V
COM, NO, NC (Note1)..................................-0.3V to (V+ + 0.3V)
Continuous Current NO, NC, COM ................................±100mA
Peak Current NO, NC, COM
(pulsed at 1ms, 10% duty cycle) ...............................±200mA
Continuous Power Dissipation (TA= +70°C)
3 x 2 UCSP (derate 10.1mW/°C at +70°C) ..................808mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range ............................-65°C to +150°C
Bump Reflow Temperature .............................................+235°C
)
)
)
Note 1: Signals on NO, NC, and COM exceeding V+ are clamped by an internal diode. Limit forward-diode current to maximum cur-
rent rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.
Preheating is requied. Hand or wave soldering is not allowed.
PARAMETER SYMBOL CONDITIONS T
ANALOG SWITCH
V
, VNO,
Analog Signal Range
On-Resistance R
COM
V
NC
ON
V+ = 2.7V, VNC = 0 to V+,
= 10mA
I
COM
MIN TYP MAX U N IT S
A
T
to
MIN
T
MAX
0V+V
+25°C 1.5 2.5
T
to
MIN
T
MAX
3.5
Ω
On-Resistance Match
Between Channels
(MAX4688 only)
(Note 5)
On-Resistance Flatness
(Note 6)
NO, NC Off-Leakage
Current (Note 7)
COM Off-Leakage
Current (Note 7)
COM On-Leakage
Current (Note 7)
∆R
ON
R
FLAT(ON
I
NO(OFF)
I
NC(OFF)
I
COM_(OFF
I
COM_(ON
V+ = 2.7V, VNO or VNC = 1.5V,
= 10mA
I
COM
V+ = 2.7V, VNO or VNC = 0 to V+,
= 10mA
I
COM
,
V+ = 3.3V; V
or VNC = 3V, 0.3V
V
NO
V+ = 3.3V; V
or VNC = 3V, 0.3V
V
NO
V+ = 3.3V; V
V
or VNC = 3V, 0.3V, or floating
NO
= 0.3V or 3V;
COM
= 0.3V or 3V;
COM
= 3V or 0.3V;
COM
+25°C 0.3 0.4
T
to
MIN
T
MAX
+25°C 0.5 1
T
to
MIN
T
MAX
+25°C -0.5 ±0.01 +0.5
T
to
MIN
T
MAX
-1 1
+25°C -0.5 ±0.01 0.5
T
to
MIN
T
MAX
-1 1
+25°C -0.5 ±0.01 0.5
T
to
MIN
T
MAX
-1 1
DYNAMIC CHARACTERISTICS
+25°C2030
Turn-On Time (Note 7) t
ON
VNO or VNC = 1.5V, Figure 2
T
MIN
T
to
MAX
0.5
1
35
Ω
Ω
nA
nA
nA
ns
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
_______________________________________________________________________________________ 3
Note 3: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in
this data sheet.
Note 4: UCSP parts are 100% tested at +25°C only and guaranteed by correlation at the full hot-rated temperature.
Note 5: ∆R
ON
= R
ON(MAX
) - R
ON(MIN)
, between switches.
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Guaranteed by design.
Note 8: Off Isolation = 20log
10(VCOM
/ VNO), V
COM
= output, VNO= input to off switch.
Note 9: Between switches.
)
)
)
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= 0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at 3V and TA= +25°C.)
(Notes 3, 4)
PARAMETER SYMBOL CONDITIONS T
Turn-Off Time (Note 7) t
Break-Before-Make
(MAX4688 only) (Note 7)
OFF
t
BBM
Charge Injection Q
On-Channel -3dB
Bandwidth
BW
Off-Isolation (Note 8) V
Crosstalk (MAX4688
only) (Note 9)
Total Harmonic
Distortion
NO, NC OffCapacitance
COM Off-Capacitance C
Switch On-Capacitance C
V
THD R
C
NO(OFF
C
NC(OFF
COM(OFF
(ON)
ISO
CR
VNO or VNC = 1.5V, Figure 2
VNO, VNC = 1.5V, Figure 3
V
= 0, R
GEN
C
= 1.0nF, Figure 4
L
Signal = 0dBm, 50Ω in and out,
Figure 5
CL = 5pF, RL = 50Ω, f = 100kHz,
Figure 5
CL = 5pF, RL = 50Ω, f = 100kHz,
Figure 5
= 600Ω, 2Vp-p, f = 20Hz to 20kHz +25°C 0.06 %
L
,
f = 1MHz, Figure 6 +25°C12 pF
f = 1MHz, Figure 6 +25°C12 pF
f = 1MHz, Figure 6 +25°C35 pF
DIGITAL I/O
Input Logic High V
Input Logic Low V
Logic Input
Leakage Current
IH
IL
I
, I
IH
IL
VIN = 0 or V+
POWER SUPPLY
Power-Supply Range V+
Supply Current I+ V+ = 3.3V, VIN = 0 or V+
GEN
= 0,
MIN TYP MAX UNITS
A
+25°C1012
T
to
MIN
T
MAX
15
+25°C8
T
to
MIN
T
MAX
2
+25°C40 pC
+25°C 200 MHz
+25°C -90 dB
+25°C -95 dB
T
to
T
T
T
T
MIN
T
MIN
T
MIN
T
MIN
T
MIN
T
MAX
MAX
MAX
MAX
MAX
1.4 V
to
to
-1 1 µA
to
1.8 5.5 V
to
-1 1 µA
0.5 V
ns
ns
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
4 _______________________________________________________________________________________
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
12
4.0
ON-RESISTANCE vs. V
COM
3.0
ON-RESISTANCE vs. V
COM
(V+ = +3V)
V+ = +5V
V+ = +1.8V
V+ = +2.7V
V+ = +3.3V
V
COM
(V)
10
8
6
4
SUPPLY CURRENT (pA)
2
0
0231 456
SUPPLY VOLTAGE (V)
MAX4686/7/8 toc01
(Ω)
ON
R
3.5
3.0
2.5
2.0
1.5
1.0
021345
LOGIC THRESHOLD VOLTAGE
ON-RESISTANCE vs. V
2.5
2.3
2.1
1.9
1.7
(Ω)
1.5
ON
R
1.3
1.1
0.9
0.7
0.5
021 345
TA = +85°C
TA = +25°C
V
COM
(V)
COM
(V+ = +5V)
TA = -40°C
2.0
MAX4686/7/8 toc04
1.5
1.0
0.5
LOGIC THRESHOLD VOLTAGE (V)
0
1.5 2.5 3.5 4.52.0 3.0 4.0 5.0 5.5
vs. SUPPLY VOLTAGE
VIN RISING
VIN FALLING
V+ (V)
MAX4686/7/8 toc02
MAX4686/7/8 toc05
2.5
2.0
(Ω)
ON
R
1.5
1.0
0.5
0 1.00.5 1.5 2.0 2.5 3.0
TA = +85°C
TA = +25°C
V
(V)
COM
TA = -40°C
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
35
30
25
20
(ns)
ON/OFF
15
t
10
5
0
132 456
t
ON
V+ (V)
t
OFF
MAX4686/7/8 toc03
MAX4686/7/8 toc06
TURN-ON/OFF TIME vs. TEMPERATURE
18
V+ = +3V
15
12
(ns)
9
ON/OFF
t
6
3
0
-40 10-15 35 60 85
t
ON
t
OFF
TEMPERATURE (°C)
1000
V+ = +3V
MAX4686/7/8 toc07
100
10
1
ON/OFF-LEAKAGE CURRENT (pA)
0.1
-40 10-15 35 60 85
vs. TEMPERATURE
I
COMON
I
I
TEMPERATURE (°C)
NOOFF,
NCOFF
MAX4686/7/8 toc08
Q (pC)
CHARGE INJECTION vs. V
80
60
40
20
0
021 345
ON/OFF-LEAKAGE CURRENT
V+ = +3V
V
COM
COM
V+ = +5V
MAX4686/7/8 toc09
(V)
Applications Information
Logic Inputs
Where the MAX4686/MAX4687/MAX4688 have a +3.3V
supply, IN may be driven low to GND and driven high
to 5.5V. Driving IN rail-to-rail minimizes power consumption. Logic inputs accept up to +5.5V regardless
of supply voltage.
Analog Signal Levels
Analog signals that range over the entire supply voltage (V+ to GND) are passed with very little change in
RON(see Typical Operating Characteristics). The
switches are bidirectional, so the NO, NC, and COM
pins are both inputs or outputs.
Power-Supply Sequencing
and Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings
may cause permanent damage to devices.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
_______________________________________________________________________________________ 5
Pin Description
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
Figure 1. Overvoltage Protection Using External Blocking
Diodes
0
-20
-40
-60
LOSS (dB)
-80
-100
-120
0.01 1 100.1 100
MAX4686 MAX4687 MAX4688
B1 B1 B1 V+ Positive Supply Voltage Input
B2 B2 B2 IN Digital Control Input
B3 B3 B3 GND Ground
— A1 A3 NC Analog Switch, Normally Closed Terminal
A3 A3 A2 COM Analog Switch, Common Terminal
A1 — A1 NO Analog Switch, Normally Open Terminal
A2 A2 — I.C. Internally Connected
FREQUENCY RESPONSE
ON-RESPONSE
OFF-ISOLATION
FREQUENCY (MHz)
BUMP
TOTAL HARMONIC DISTORTION PLUS
1
MAX4686/7/8 toc10
0.1
THD + N (%)
CROSSTALK
0.01
NOISE vs. FREQUENCY
10 1k 100k
100
FREQUENCY (Hz)
10k
MAX4686/7/8 toc11
NAME FUNCTION
POSITIVE SUPPLY
D1
V+
MAX4686
MAX4687
NO
V
g
GND
COM
MAX4688
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog
inputs are not current limited to <20mA, add a small-signal diode (D1) as shown in Figure 1. Adding a protection
diode reduces the analog range to a diode drop (about
0.7V) below V+ (for D1). RONincreases slightly at low
supply voltages. Maximum supply voltage (V+) must not
exceed +6V.Protection diode D1 also protects against
some overvoltage situations. No damage will result on
Figure 1’s circuit if the supply voltage is below the
absolute maximum rating and if a fault voltage up to the
absolute maximum rating is applied to an analog signal
pin.
UCSP Package Consideration
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical reliability tests. CSP reliability is integrally linked to the user’s
assembly methods, circuit board material, and usage
environment. The user should closely review these areas
when considering use of a CSP package. Performance
through Operating Life Test and Moisture Resistance
remains uncompromised as it is primarily determined by
the wafer-fabrication process.
Mechanical stress performance is a greater consideration for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be considered.
Information on Maxim’s qualification plan, test data, and
recommendations are detailed in the UCSP application
note, which can be found on Maxim’s website at
www.maxim-ic.com.
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
6 _______________________________________________________________________________________
Test Circuits/Timing Diagrams
Figure 2. Switching Time
Figure 3. Break-Before-Make Interval (MAX4688 only)
MAX4686
MAX4687
MAX4688
NO_
V
IN_
LOGIC
INPUT
OR NC
IN_
GND
V+
V+
COM_
R
50Ω
LOGIC
INPUT
V
OUT
C
L
L
35pF
SWITCH
OUTPUT
V+
0
0
50%
V
OUT
0.9 x V
0UT
t
ON
tr < 5ns
tf < 5ns
t
OFF
0.9 x V
OUT
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
OUT
= V
N_ (
R
V
RL + R
L
)
ON
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
GND
V+
V+
V
R
L
300Ω
OUT
C
35pF
L
COM_
LOGIC
INPUT
V
OUT
V+
0
50%
0.9 x V
t
D
MAX4688
V
LOGIC
INPUT
N_
NC_
NO_
IN_
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
tr < 5ns
< 5ns
t
f
OUT
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
_______________________________________________________________________________________ 7
Figure 4. Charge Injection
Test Circuits/Timing Diagrams (continued)
Figure 5. Off-Isolation/On-Channel Bandwidth, Crosstalk
Chip Information
TRANSISTOR COUNT: 150
Figure 6. Channel Off/On-Capacitance
MAX4686
MAX4687
MAX4688
V
GEN
0V OR V+
50Ω
V+
V+
R
GEN
IN_
NC_
NC_
OR NO_
GND
+5V
V+
MAX4686
MAX4687
MAX4688
GND
10nF
IN_
V
IL
COM
NO
COM_
TO V
∆V
OUT
V
OUT
V
OUT
C
L
IH
V
IN
V
OUT
50Ω
MEAS REF
50Ω 50Ω
NETWORK
ANALYZER
IN
OFF
OFF
IN
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
50Ω
ON
ON
Q = (∆V
)(CL)
OUT
OFF-ISOLATION = 20log
ON-LOSS = 20log
CROSSTALK = 20log
OFF
OFF
V
OUT
V
IN
V
OUT
V
V
OUT
V
IN
IN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
V+
10nF
V+
COM_
MAX4686
MAX4687
CAPACITANCE
METER
f = 1MHz
MAX4688
NC_ or
NO_
GND
IN
V
IL
OR
V
IH
MAX4686/MAX4687/MAX4688
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.
6L, UCSP.EPS
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