MAXIM MAX4684, MAX4685 User Manual

General Description
The MAX4684/MAX4685 low on-resistance (RON), low­voltage, dual single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. The MAX4684 features a 0.5Ω (max) R
for its NC
switch and a 0.8Ω (max) R
ON
for its NO switch at a +2.7V supply. The MAX4685 features a 0.8Ω max on­resistance for both NO and NC switches at a +2.7V supply.
Both parts feature break-before-make switching action (2ns) with t
ON
= 50ns and t
OFF
= 40ns at +3V. The digi­tal logic inputs are 1.8V logic-compatible with a +2.7V to +3.3V supply.
The MAX4684/MAX4685 are packaged in the chipscale package (UCSP)™, significantly reducing the required PC board area. The chip occupies only a 2.0mm
1.50mm area. The 4 ✕3 array of solder bumps are spaced with a 0.5mm bump pitch.
________________________Applications
Speaker Headset Switching
MP3 Players
Power Routing
Battery-Operated Equipment
Relay Replacement
Audio and Video Signal Routing
Communications Circuits
PCMCIA Cards
Cellular Phones
Modems
Features
12-Bump, 0.5mm-Pitch UCSPNC Switch R
ON
0.5Ω max (+2.7V Supply) (MAX4684)
0.8Ω max (+2.7V Supply) (MAX4685)
NO Switch R
ON
0.8Ω max (+2.7V Supply)
R
ON
Match Between Channels
0.06Ω (max)
RONFlatness Over Signal Range
0.15Ω (max)
+1.8V to +5.5V Single-Supply OperationRail-to-Rail Signal Handling1.8V Logic CompatibilityLow Crosstalk: -68dB (100kHz)High Off-Isolation: -64dB (100kHz)THD: 0.03%50nA (max) Supply CurrentLow Leakage Currents
1nA (max) at T
A
= +25°C
MAX4684/MAX4685
0.5ΩΩ/0.8
ΩΩ
Low-Voltage, Dual SPDT
Analog Switches in UCSP
________________________________________________________________
Maxim Integrated Products
1
19-1977; Rev 4; 1/09
Pin Configurations/Functional Diagrams/Truth Table
UCSP is a trademark of Maxim Integrated Products, Inc. µMAX is a registered trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Continued at end of data sheet.
Ordering Information
+
Denotes a lead(Pb)-free/RoHS-compliant package. Note: Requires special solder temperature profile described in the Absolute Maximum Ratings section.
*
UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information.
**
EP = Exposed Pad
T = Tape and reel.
PART
PIN /B U M P­PACKAGE
TOP
MARK
M A X4 6 8 4 E BC + T
12 UCSP* AAF
M AX 4684E TB+ T
AAG
M AX 4684E U B+ T
10 µMAX
®
M A X4 6 8 5 E BC + T
12 UCSP* AAG
M AX 4685E TB+ T
AAH
M AX 4685E U B+ T
10 µMAX
TOP VIEW
MAX4684/MAX4685
GND
C1
NC1
C2
C3
C4 B4 A4
V+
UCSP
A1B1
NC2
A2
IN2IN1
COM2COM1
A3
NO2NO1
MAX4684/MAX4685
IN_
NO_
0
1
SWITCHES SHOWN FOR LOGIC "0" INPUT
NC_
ON
OFF
OFF
ON
V+
NO1
COM1
IN1
NC1
TEMP RANGE
-40°C to +85°C
-40°C to +85°C 10 TD FN - E P **
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C 10 TD FN - E P **
-40°C to +85°C
MAX4684/MAX4685
1
2
3
4
5
µMAX
10
NO2
9
COM2
IN2
8
7
NC2
GND
6
MAX4684/MAX4685
0.5ΩΩ/0.8
ΩΩ
Low-Voltage, Dual SPDT
Analog Switches in UCSP
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(All Voltages Referenced to GND)
V+, IN_......................................................................-0.3V to +6V
COM_, NO_, NC_ (Note1) ........................... -0.3V to (V+ + 0.3V)
Continuous Current NO_, NC_, COM_ .......................... ±300mA
Peak Current NO_, NC_, COM_
(pulsed at 1ms, 50% duty cycle).................................±400mA
Peak Current NO_, NC_, COM_
(pulsed at 1ms, 10% duty cycle).................................±500mA
Continuous Power Dissipation (T
A
= +70°C)
10-Pin TDFN (derate 18.5mW/°C above +70°C)........1482mW
12-Bump UCSP (derate 11.4mW/°C above +70°C) ...909mW
10-Pin µMAX (derate 5.6mW/°C above +70°C) ..........444mW
Operating Temperature Ranges..........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering) (Note 2)
Infared (15s)................................................................+220°C
Vapor Phase (60s) ......................................................+215°C
Note 1: Signals on NO_, NC_, and COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom­mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow. Pre­heating is required. Hand or wave soldering is not allowed.
PARAMETER SYMBOL CONDITIONS T
A
MIN
ANALOG SWITCH
Analog Signal Range
V
NO
_, VNC_,
V
COM
_
E0 V+V
0.3
E
NC_ On-Resistance (Note 4)
R
ON(NC)
VNC_ = 0 to V+
E
Ω
NO_ On-Resistance (Note 4)
R
ON(NO)
V+ = 2.7V; I
COM
_ = 100mA;
V
NO
_ = 0 to V+
E
Ω
On-Resistance Match Between Channels (Notes 4, 5)
ΔR
ON
V+ = 2.7V; I
COM
_ = 100mA;
V
NO
_ or VNC_ = 1.5V
E
Ω
E
NC_ On-Resistance Flatness (Note 6)
R
FLAT (NC)
V
N C
_ = 0 to V +
E
Ω
NO_ On-Resistance Flatness (Note 6)
R
FLAT (NO)
V+ = 2.7V; I
COM
= 100mA;
V
NO
_ = 0 to V+
E
Ω
-1 1
NO_ or NC_ Off­Leakage Current (Note 7)
INC_(OFF)
V+ = 3.3V; V
NO
_ or VNC_ = 3V, 0.3V;
V
COM
_ = 0.3V, 3V
E -10 10
nA
-2 2
COM_ On-Leakage Current (Note 7)
I
COM
_(ON)
V + = 3.3V ; V
N O
_ or V
N C
_ = 3V , 0.3V , or
unconnected ; V
C OM
_ = 3V , 0.3V , or
unconnected
E -20 20
nA
DYNAMIC CHARACTERISTICS
30 50
Turn-On Time t
ON
V+ = 2.7V, VNO_ or VNC_ = 1.5V; R
L
= 50Ω; CL = 35pF; Figure 2
E60
ns
ELECTRICAL CHARACTERISTICS—+3V SUPPLY
(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= +0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at +3V and +25°C.)
(Notes 3, 9, 10)
TYP MAX UNITS
INO_(OFF) or
V + = 2.7V ; I
V + = 2.7V ; I
_ = 100mA;
C OM
= 100mA;
C OM
MAX4684
MAX4685
MAX4684
MAX4685
+25°C
+25°C0.450.8
+25°C0.450.8
+25°C0.06
+25°C
+25°C
+25°C
0.5
0.5
0.8
0.8
0.06
0.15
0.35
0.35
MAX4684/MAX4685
0.5ΩΩ/0.8
ΩΩ
Low-Voltage, Dual SPDT
Analog Switches in UCSP
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—+3V SUPPLY (continued)
(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= +0.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at +3V and +25°C.)
(Notes 3, 9, 10)
PARAMETER SYMBOL CONDITIONS T
A
MIN
25 30
Turn-Off Time t
OFF
V+ = 2.7V, VNO_ or VNC_ = 1.5V;
R
L
= 50Ω; CL = 35pF; Figure 2
E40
ns
Break-Before-Make Delay
t
BBM
V+ = 2.7V, VNO_, or VNC_ = 1.5V;
R
L
= 50Ω; CL = 35pF; Figure 3
E 2 15 ns
Charge Injection Q
200 pC
Off-Isolation (Note 8) V
ISO
CL = 5pF; RL = 50Ω; f = 100kHz; V
COM
_ = 1V
RMS
; Figure 5
-64 dB
Crosstalk V
CT
CL = 5pF; RL = 50Ω; f = 100kHz; V
COM
_ = 1V
RMS
; Figure 5
-68 dB
Total Harmonic Distortion
THD
RL = 600Ω, IN_ = 2Vp-p, f = 20Hz to
20kHz
%
NC_ Off-Capacitance
)
f = 1MHz; Figure 6
84 pF
NO_ Off-Capacitance
C
NO_(OFF)
f = 1MHz; Figure 6
37 pF
NC_ On-Capacitance
C
NC_(ON)
f = 1MHz; Figure 6
190 pF
NO_ On-Capacitance
C
NO_(ON)
f = 1MHz; Figure 6
150 pF
DIGITAL I/O
Input Logic High V
IH
E1.4 V
Input Logic Low V
IL
E
V
IN_ Input Leakage Current
I
IN
_V
IN
_ = 0 or V+ E -1 1 µA
POWER SUPPLY
Power-Supply Range V+ E 1.8
V
-50
50
S up p l y C ur r ent ( N ote 4)
I+ V+ = 5.5V; VIN_ = 0 or V+
E
nA
Note 3: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value a maximum.
Note 4: Guaranteed by design. Note 5: ΔR
ON
= R
ON(MAX)
- R
ON(MIN)
, between NC1 and NC2 or between NO1 and NO2.
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Leakage parameters are 100% tested at T
A
= +85°C, and guaranteed by correlation over rated temperature range.
Note 8: Off-isolation = 20log
10(VCOM
/ VNO), V
COM
= output, VNO= input to off switch.
Note 9: UCSP and TDFN parts are 100% tested at +25°C only and guaranteed by design and correlation at the full hot-rated
temperature.
Note 10: -40°C specifications are guaranteed by design.
COM_ = 0; RS = 0; CL = 1nF; Figure 4 +25°C
C
NC_(OFF
+25°C
+25°C
+25°C
+25°C0.03
+25°C
+25°C
+25°C
+25°C
TYP MAX
0.5
UNITS
+25°C
-200 200
5.5
0.04
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