MAXIM MAX4684, MAX4685 User Manual

General Description

The MAX4684/MAX4685 low on-resistance (RON), low­voltage, dual single-pole/double-throw (SPDT) analog
switches operate from a single +1.8V to +5.5V supply.
The MAX4684 features a 0.5Ω (max) R

ON

for its NC

switch and a 0.8Ω (max) R

ON

for its NO switch at a
+2.7V supply. The MAX4685 features a 0.8Ω max on­resistance for both NO and NC switches at a +2.7V
supply.

Both parts feature break-before-make switching action
(2ns) with t

ON

= 50ns and t

OFF

= 40ns at +3V. The digi­tal logic inputs are 1.8V logic-compatible with a +2.7V to
+3.3V supply.

The MAX4684/MAX4685 are packaged in the chipscale
package (UCSP)™, significantly reducing the required
PC board area. The chip occupies only a 2.0mm

✕

1.50mm area. The 4 ✕3 array of solder bumps are
spaced with a 0.5mm bump pitch.

________________________Applications

Speaker Headset Switching

MP3 Players

Power Routing

Battery-Operated Equipment

Relay Replacement

Audio and Video Signal Routing

Communications Circuits

PCMCIA Cards

Cellular Phones

Modems

Features

♦ 12-Bump, 0.5mm-Pitch UCSP
♦ NC Switch R

ON

0.5Ω max (+2.7V Supply) (MAX4684)

0.8Ω max (+2.7V Supply) (MAX4685)

♦ NO Switch R

ON

0.8Ω max (+2.7V Supply)

♦ R

ON

Match Between Channels

0.06Ω (max)

♦ RONFlatness Over Signal Range

0.15Ω (max)

♦ +1.8V to +5.5V Single-Supply Operation
♦ Rail-to-Rail Signal Handling
♦ 1.8V Logic Compatibility
♦ Low Crosstalk: -68dB (100kHz)
♦ High Off-Isolation: -64dB (100kHz)
♦ THD: 0.03%
♦ 50nA (max) Supply Current
♦ Low Leakage Currents

1nA (max) at T

A

= +25°C

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

________________________________________________________________

Maxim Integrated Products

1

19-1977; Rev 4; 1/09

Pin Configurations/Functional Diagrams/Truth Table

UCSP is a trademark of Maxim Integrated Products, Inc.
µMAX is a registered trademark of Maxim Integrated Products,
Inc.

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

Continued at end of data sheet.

Ordering Information

+

Denotes a lead(Pb)-free/RoHS-compliant package.
Note: Requires special solder temperature profile described in
the Absolute Maximum Ratings section.

*

UCSP reliability is integrally linked to the user’s assembly
methods, circuit board material, and environment. Refer to the
UCSP Reliability Notice in the UCSP Reliability section of this
data sheet for more information.

**

EP = Exposed Pad

T = Tape and reel.

PART

PIN /B U M P­PACKAGE

TOP

MARK

M A X4 6 8 4 E BC + T

12 UCSP* AAF

M AX 4684E TB+ T

AAG

M AX 4684E U B+ T

10 µMAX

®

—

M A X4 6 8 5 E BC + T

12 UCSP* AAG

M AX 4685E TB+ T

AAH

M AX 4685E U B+ T

10 µMAX —

TOP VIEW

MAX4684/MAX4685

GND

C1

NC1

C2

C3

C4 B4 A4

V+

UCSP

A1B1

NC2

A2

IN2IN1

COM2COM1

A3

NO2NO1

MAX4684/MAX4685

IN_

NO_

0

1

SWITCHES SHOWN FOR LOGIC "0" INPUT

NC_

ON

OFF

OFF

ON

V+

NO1

COM1

IN1

NC1

TEMP RANGE

-40°C to +85°C

-40°C to +85°C 10 TD FN - E P **

-40°C to +85°C

-40°C to +85°C

-40°C to +85°C 10 TD FN - E P **

-40°C to +85°C

MAX4684/MAX4685

1

2

3

4

5

µMAX

10

NO2

9

COM2

IN2

8

7

NC2

GND

6

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

(All Voltages Referenced to GND)

V+, IN_......................................................................-0.3V to +6V

COM_, NO_, NC_ (Note1) ........................... -0.3V to (V+ + 0.3V)

Continuous Current NO_, NC_, COM_ .......................... ±300mA

Peak Current NO_, NC_, COM_

(pulsed at 1ms, 50% duty cycle).................................±400mA

Peak Current NO_, NC_, COM_

(pulsed at 1ms, 10% duty cycle).................................±500mA

Continuous Power Dissipation (T

A

= +70°C)

10-Pin TDFN (derate 18.5mW/°C above +70°C)........1482mW

12-Bump UCSP (derate 11.4mW/°C above +70°C) ...909mW

10-Pin µMAX (derate 5.6mW/°C above +70°C) ..........444mW

Operating Temperature Ranges..........................-40°C to +85°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Bump Temperature (soldering) (Note 2)

Infared (15s)................................................................+220°C

Vapor Phase (60s) ......................................................+215°C

Note 1: Signals on NO_, NC_, and COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to

maximum current rating.

Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device

can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom­mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow. Pre­heating is required. Hand or wave soldering is not allowed.

PARAMETER SYMBOL CONDITIONS T

A

MIN

ANALOG SWITCH

Analog Signal Range

V

NO

_, VNC_,

V

COM

_

E0 V+V

0.3

E

NC_ On-Resistance
(Note 4)

R

ON(NC)

VNC_ = 0 to V+

E

Ω

NO_ On-Resistance
(Note 4)

R

ON(NO)

V+ = 2.7V; I

COM

_ = 100mA;

V

NO

_ = 0 to V+

E

Ω

On-Resistance Match
Between Channels
(Notes 4, 5)

ΔR

ON

V+ = 2.7V; I

COM

_ = 100mA;

V

NO

_ or VNC_ = 1.5V

E

Ω

E

NC_ On-Resistance
Flatness (Note 6)

R

FLAT (NC)

V

N C

_ = 0 to V +

E

Ω

NO_ On-Resistance
Flatness (Note 6)

R

FLAT (NO)

V+ = 2.7V; I

COM

= 100mA;

V

NO

_ = 0 to V+

E

Ω

-1 1

NO_ or NC_ Off­Leakage Current
(Note 7)

INC_(OFF)

V+ = 3.3V; V

NO

_ or VNC_ = 3V, 0.3V;

V

COM

_ = 0.3V, 3V

E -10 10

nA

-2 2

COM_ On-Leakage
Current (Note 7)

I

COM

_(ON)

V + = 3.3V ; V

N O

_ or V

N C

_ = 3V , 0.3V , or

unconnected ; V

C OM

_ = 3V , 0.3V , or

unconnected

E -20 20

nA

DYNAMIC CHARACTERISTICS

30 50

Turn-On Time t

ON

V+ = 2.7V, VNO_ or VNC_ = 1.5V;
R

L

= 50Ω; CL = 35pF; Figure 2

E60

ns

ELECTRICAL CHARACTERISTICS—+3V SUPPLY

(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= +0.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at +3V and +25°C.)

(Notes 3, 9, 10)

TYP MAX UNITS

INO_(OFF) or

V + = 2.7V ; I

V + = 2.7V ; I

_ = 100mA;

C OM

= 100mA;

C OM

MAX4684

MAX4685

MAX4684

MAX4685

+25°C

+25°C0.450.8

+25°C0.450.8

+25°C0.06

+25°C

+25°C

+25°C

0.5

0.5

0.8

0.8

0.06

0.15

0.35

0.35

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS—+3V SUPPLY (continued)

(V+ = +2.7V to +3.3V, VIH= +1.4V, VIL= +0.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at +3V and +25°C.)

(Notes 3, 9, 10)

PARAMETER SYMBOL CONDITIONS T

A

MIN

25 30

Turn-Off Time t

OFF

V+ = 2.7V, VNO_ or VNC_ = 1.5V;

R

L

= 50Ω; CL = 35pF; Figure 2

E40

ns

Break-Before-Make
Delay

t

BBM

V+ = 2.7V, VNO_, or VNC_ = 1.5V;

R

L

= 50Ω; CL = 35pF; Figure 3

E 2 15 ns

Charge Injection Q

200 pC

Off-Isolation (Note 8) V

ISO

CL = 5pF; RL = 50Ω; f = 100kHz;
V

COM

_ = 1V

RMS

; Figure 5

-64 dB

Crosstalk V

CT

CL = 5pF; RL = 50Ω; f = 100kHz;
V

COM

_ = 1V

RMS

; Figure 5

-68 dB

Total Harmonic
Distortion

THD

RL = 600Ω, IN_ = 2Vp-p, f = 20Hz to

20kHz

%

NC_ Off-Capacitance

)

f = 1MHz; Figure 6

84 pF

NO_ Off-Capacitance

C

NO_(OFF)

f = 1MHz; Figure 6

37 pF

NC_ On-Capacitance

C

NC_(ON)

f = 1MHz; Figure 6

190 pF

NO_ On-Capacitance

C

NO_(ON)

f = 1MHz; Figure 6

150 pF

DIGITAL I/O

Input Logic High V

IH

E1.4 V

Input Logic Low V

IL

E

V

IN_ Input Leakage
Current

I

IN

_V

IN

_ = 0 or V+ E -1 1 µA

POWER SUPPLY

Power-Supply Range V+ E 1.8

V

-50

50

S up p l y C ur r ent ( N ote 4)

I+ V+ = 5.5V; VIN_ = 0 or V+

E

nA

Note 3: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive

value a maximum.

Note 4: Guaranteed by design.
Note 5: ΔR

ON

= R

ON(MAX)

- R

ON(MIN)

, between NC1 and NC2 or between NO1 and NO2.

Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the

specified analog signal ranges.

Note 7: Leakage parameters are 100% tested at T

A

= +85°C, and guaranteed by correlation over rated temperature range.

Note 8: Off-isolation = 20log

10(VCOM

/ VNO), V

COM

= output, VNO= input to off switch.

Note 9: UCSP and TDFN parts are 100% tested at +25°C only and guaranteed by design and correlation at the full hot-rated

temperature.

Note 10: -40°C specifications are guaranteed by design.

COM_ = 0; RS = 0; CL = 1nF; Figure 4 +25°C

C

NC_(OFF

+25°C

+25°C

+25°C

+25°C0.03

+25°C

+25°C

+25°C

+25°C

TYP MAX

0.5

UNITS

+25°C

-200 200

5.5

0.04

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

4 _______________________________________________________________________________________

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

0

0.4

0.2

1.0

0.8

0.6

1.6

1.4

1.2

1.8

021 345

MAX4684

NC ON-RESISTANCE vs. COM VOLTAGE

MAX4684/5 toc01

V

COM

(V)

R

ON

(Ω)

V+ = +3.0V

V+ = +5.0V

V+ = +1.8V

V+ = +2.0V

V+ = +2.3V

V+ = +2.5V

NO ON-RESISTANCE vs. COM VOLTAGE

0

0.5

1.5

1.0

2.0

2.5

021345

R

ON

(Ω)

MAX4684/5 toc03

V

COM

(V)

V+ = +5.0V

V+ = +1.8V

V+ = +2.0V

V+ = +2.3V

V+ = +2.5V

V+ = +3.0V

MAX4685

NC ON-RESISTANCE vs. COM VOLTAGE

0

0.2

0.4

0.6

0.8

1.2

1.4

1.8

1.0

1.6

2.0

021345

R

ON

(Ω)

MAX4684/5 toc02

V

COM

(V)

V+ = +5.0V

V+ = +2.3V

V+ = +3.0V

V+ = +1.8V

V+ = +2.0V

V+ = +2.5V

0.10

0.12

0.14

0.16

0.20

0.18

0.22

0.24

0.26

0.28

021345

MAX4684/5 toc04

MAX4684

NC ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

TA = +85°C

V+ = +5V

TA = -40°C

TA = +25°C

0.10

0.15

0.20

0.25

0.30

0.35

0.40

012345

MAX4684/5 toc06

NO ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

TA = +85°C

V+ = +5V

TA = -40°C

TA = +25°C

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

012345

MAX4684/5 toc05

MAX4685

NC ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

V+ = +5V

TA = +25°C

TA = -40°C

TA = +85°C

01.01.50.5 2.0 2.5 3.0

0.10

0.15

0.20

0.25

0.30

0.35

MAX4684/5 toc07

MAX4684

NC ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

V+ = +3V

TA = +85°C

TA = -40°C

TA = +25°C

0.15

0.10

0.20

0.25

0.30

0.35

0.40

0.45

0.50

01.00.5 1.5 2.0 2.5 3.0

MAX4684/5 toc09

NO ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

V+ = +3V

TA = +85°C

TA = +25°C

TA = -40°C

0.15

0.10

0.20

0.25

0.30

0.35

0.40

0.45

0.50

01.00.5 1.5 2.0 2.5 3.0

MAX4684/5 toc08

MAX4685

NC ON-RESISTANCE vs. COM VOLTAGE

V

COM

(V)

R

ON

(Ω)

V+ = +3V

TA = +85°C

TA = +25°C

TA = -40°C

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

_______________________________________________________________________________________ 5

0

20

60

40

80

100

021 3456

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX4684/5 toc10

V

SUPPLY

(V)

SUPPLY CURRENT (pA)

0

20

10

40

30

50

60

70

80

1.8 2.8 3.32.3 3.8 4.3 4.8 5.3

MAX4684/5 toc11

V

SUPPLY

(V)

t

ON

/t

OFF

(ns)

TURN-ON/TURN-0FF TIMES

vs. SUPPLY VOLTAGE

t

ON

t

OFF

0

15

10

5

20

25

30

35

40

45

50

-40 10-15 356085

MAX4684/5 toc12

TURN-ON/TURN-0FF TIMES

vs. TEMPERATURE

V+ = +3V

t

ON

/t

OFF

(ns)

TEMPERATURE (°C)

t

ON

t

OFF

2.0

1.5

1.0

0.5

0

0312 456

LOGIC THRESHOLD VOLTAGE

vs. SUPPLY VOLTAGE

MAX4684/5 toc13

LOGIC THRESHOLD VOLTAGE (V)

V

SUPPLY

(V)

V

IN

RISING

V

IN

FALLING

-500

-400

-300

-200

-100

0

100

200

300

021 3456

CHARGE INJECTION vs. COM VOLTAGE

MAX4684/5 toc14

Q (pC)

V

COM

(V)

-40 10-15 35 60 85

MAX4684/5 toc15

TEMPERATURE (°C)

ON/OFF-LEAKAGE CURRENT (pA)

1

10

100

1000

MAX4684

ON/OFF-LEAKAGE CURRENT

vs. TEMPERATURE

I

COM(ON)

I

COM(OFF)

-40 10-15 35 60 85

MAX4684/5 toc16

TEMPERATURE (°C)

ON/OFF-LEAKAGE CURRENT (pA)

1

10

100

1000

MAX4685

ON/OFF-LEAKAGE CURRENT

vs. TEMPERATURE

I

COM(ON)

I

COM(OFF)

FREQUENCY RESPONSE (µMAX)

FREQUENCY (MHz)

0.001 1 10 1000.01 0.1

LOSS (dB)

-120

-100

-80

-20

-40

-60

0

MAX4684/85 toc17

ON­RESPONSE

OFF­ISOLATION

CROSSTALK

10 100 1k 10k 100k

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

MAX4684/5 toc18

FREQUENCY (Hz)

THD + N (%)

0.01

0.1

Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

Detailed Description

The MAX4684/MAX4685 are low on-resistance, low­voltage, dual SPDT analog switches that operate from a
+1.8V to +5.5V supply. The devices are fully specified
for nominal 3V applications. The MAX4684/MAX4685
have break-before-make switching and fast switching
speeds (tON= 50ns max, t

OFF

= 40ns max).

The MAX4684 offers asymmetrical normally closed
(NC) and normally open (NO) R

ON

for applications that
require asymmetrical loads (examples include speaker
headsets and internal speakers). The part features a

0.5Ω max R

ON

for its NC switch and a 0.8Ω max RON
for its NO switch at the 2.7V supply. The MAX4685 fea­tures a 0.8Ω max on-resistance for both NO and NC
switches at the +2.7V supply.

Applications Information

Digital Control Inputs

The MAX4684/MAX4685 logic inputs accept up to
+5.5V regardless of supply voltage. For example, with a
+3.3V supply, IN_ may be driven low to GND and high
to 5.5V. Driving IN_ rail-to-rail minimizes power con­sumption. Logic levels for a +1.8V supply are 0.5V (low)
and 1.4V (high).

Analog Signal Levels

Analog signals that range over the entire supply voltage
(V+ to GND) are passed with very little change in on­resistance (see

Typical Operating Characteristics

). The
switches are bidirectional, so the NO_, NC_, and COM_
pins can be either inputs or outputs.

Power-Supply Sequencing and

Overvoltage Protection

Caution: Do not exceed the absolute maximum rat­ings because stresses beyond the listed ratings
may cause permanent damage to devices.

Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current limited. If this sequencing is not possible, and if
the analog inputs are not current limited to <20mA, add
a small signal diode (D1) as shown in Figure 1. Adding
a protection diode reduces the analog range to a diode
drop (about 0.7V) below V+ (for D1). RONincreases
slightly at low supply voltages. Maximum supply volt­age (V+) must not exceed +6V. Protection diode D1
also protects against some overvoltage situations. No
damage will result on Figure 1’s circuit if the supply
voltage is below the absolute maximum rating applied
to an analog signal pin.

POSITIVE SUPPLY

COM

NO

D1

GND

V

g

V+

MAX4684
MAX4685

Figure 1. Overvoltage Protection Using Two External Blocking
Diodes

PIN

NAME

UCSP

FUNCTION

NC_ A1, C1 5, 7 Analog Switch—Normally Closed Terminal

IN_ A2, C2 4, 8 Digital Control Input

COM_ A3, C3 3, 9 Analog Switch—Common Terminal

NO_ A4, C4 2, 10 Analog Switch—Normally Open Terminal

V+ B4 1 Positive Supply Voltage Input

GND B1 6 Ground

EP — — Exposed Pad. Connect EP to GND (for TDFN only.)

Pin Description

6 _______________________________________________________________________________________

µMAX/TDFN

UCSP Package Consideration

For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).

UCSP Reliability

The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia­bility tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.

Mechanical stress performance is a greater considera­tion for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be consid­ered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s web­site at www.maxim-ic.com.

Chip Information

PROCESS: BiCMOS

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

_______________________________________________________________________________________ 7

tr < 5ns
tf < 5ns

50%

V

IL

LOGIC
INPUT

R

L

50Ω

COM_

GND

IN_

C

L

INCLUDES FIXTURE AND STRAY CAPACITANCE.

V

OUT

= V

N_ (

R

L

)

RL + R

ON

V

IN_

V

IH

t

OFF

0

NO_
OR NC

0.9 x V

0UT

0.9 x V

OUT

t

ON

V

OUT

SWITCH
OUTPUT

LOGIC

INPUT

LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.

V+

C

L

35pF

V+

V

OUT

MAX4684
MAX4685

Figure 2. Switching Time

Test Circuits/Timing Diagrams

50%

V

IH

V

IL

LOGIC
INPUT

V

OUT

0.9 x V

OUT

t

D

LOGIC
INPUT

R

L

50Ω

GND

C

L

INCLUDES FIXTURE AND STRAY CAPACITANCE.

NO_

IN_

NC_

V

OUT

V+

V+

C

L

35pF

V

N_

COM_

MAX4684
MAX4685

Figure 3. Break-Before-Make Interval

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

8 _______________________________________________________________________________________

V

GEN

GND

COM_

C

L

V

OUT

V+

V

OUT

IN

OFF

ON

OFF

ΔV

OUT

Q = (ΔV

OUT

)(CL)

NC_

IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.

OFF

ON

OFF

IN

V

IL

TO V

IH

V+

R

GEN

IN_

MAX4684
MAX4685

OR NO_

Figure 4. Charge Injection

MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.

+5V

V

OUT

V+

IN_

NC_

COM

NO

V

IN

MAX4684
MAX4685

OFF-ISOLATION = 20log

V

OUT

V

IN

ON-LOSS = 20log

V

OUT

V

IN

CROSSTALK = 20log

V

OUT

V

IN

NETWORK

ANALYZER

50Ω

50Ω 50Ω

50Ω

MEAS REF

10nF

0V OR V+

50Ω

GND

Figure 5. On-Loss, Off-Isolation, and Crosstalk

CAPACITANCE

METER

NC_ or
NO_

COM_

GND

IN

V

IL

OR

V

IH

10nF

V+

f = 1MHz

V+

MAX4684
MAX4685

Figure 6. Channel Off/On-Capacitance

Test Circuits/Timing Diagrams (continued)

Pin Configurations (continued)

TOP VIEW

MAX4684/MAX4685

V+

1

2

NO1

3

COM1

IN1

4

NC1

5

3mm ✕ 3mm TDFN

*CONNECT EP TO GND.

*EP

NO2

10

COM2

9

IN2

8

NC2

7

GND

6

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

_______________________________________________________________________________________ 9

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

12 UCSP B12-4

21-0104

10 TDFN-EP T1033-1

21-0137

10 µMAX U10-2

21-0061

Package Information

For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.

MAX4684/MAX4685

0.5ΩΩ/0.8

ΩΩ

Low-Voltage, Dual SPDT

Analog Switches in UCSP

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

10

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2009 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.

Revision History

REVISION

NUMBER

REVISION

DATE

DESCRIPTION

PAGES

CHANGES

3 2/03 Added TDFN packaging, noted parts are now UCSP qualified —

4 1/09 Added lead-free packaging and exposed pad note 1, 2, 6–9