The MAX458/MAX459 are crosspoint switches with eight
input channels and four high-speed, buffered output
channels. The MAX458 output buffer is configured with a
gain of one, while the MAX459 buffer has a gain of two. In
each device, any one of eight input lines can be connected to any of four output amplifiers. The output buffers are
capable of driving loads of 75Ω.
Data interface can be accomplished by either a 16-bit
serial or a 6-bit parallel connection. In the serial mode,
the MAX458/MAX459 are SPITM, QSPITM, and Microwire
compatible. In parallel mode, the MAX458/MAX459 are
compatible with most microprocessor buses. Three-state
amplifier output capability makes it possible to multiplex
MAX458/MAX459s to form larger switch networks. The
output buffers can be disabled individually or the entire
device can be shut down to conserve power.
________________________Applications
Video Test Equipment
Video Security Systems
____________________________Features
♦ 100MHz Unity-Gain Bandwidth
♦ 300V/µs Slew Rate
♦ Low 0.05° Differential Phase Error
♦ Low 0.01% Differential Gain Error
♦ Directly Drives 75Ω Cables
♦ Fast 60ns Switching Time
♦ High-Z Amplifier Output Capability
♦ Shutdown Capability
♦ 16-Bit Serial and 6-Bit Parallel Address Modes
TM
♦ 40-Pin DIP and 44-Pin PLCC Packages
______________Ordering Information
PART
MAX458CPL
MAX458CQH
MAX458EPL-40°C to +85°C
MAX459CPL
MAX459CQH
MAX459EPL-40°C to +85°C
TEMP. RANGEPIN-PACKAGE
0°C to +70°C
0°C to +70°C
0°C to +70°C40 Plastic DIP
0°C to +70°C
Video Editing
_____________________Block Diagram
8 BUFFERED
INPUTS
IN0
75Ω
IN1
IN2
IN3
IN4
IN5
IN6
IN7
™
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
Note 1: Outputs may be shorted to any supply pin or ground as long as package power dissipation ratings are not exceeded.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
On Input Bias Current
On Input Resistance
Input Capacitance
DC Voltage Gain Accuracy
Output Voltage Swing
Enabled Output Resistance
Disabled Output Resistance
Disabled Output Capacitance
Positive Power-Supply Current
Negative Power-Supply Current
Positive Supply Current in
Shutdown
Negative Supply Current in
Shutdown
Logic Input High Voltage
Logic Input Low Voltage
= +25°C.)
A
V
OS
OS
IN
IN
IN
OUT
R
OUT
R
OUT
OUT
I
CC
I
EE
IH
IL
Any channel
VIN= 0V (Note 2)
VS= ±4.75V to ±5.25VdB5060PSRRPower-Supply Rejection Ratio
VIN= 0V, input programmed to one output
Input programmed to one output
Input channel on or off
MAX458 (Note 3)
MAX459 (Note 4)
VIN= 1kHz sine wave
VIN= 10MHz sine wave
MAX458
MAX459
VIN= 0V,
all amplifiers enabled
VIN= 0V,
all amplifiers enabled
(Note 5)
(Note 5)
Operating Temperature Ranges
MAX45_C_ _ ........................................................0°C to +70°C
MAX45_E_ _......................................................-40°C to +85°C
Logic Input High Current
Logic Input Low Current
Logic Output High Voltage
Logic Output Low Voltage
DYNAMIC SPECIFICATIONS
Input Noise Density
Settling Time
Amplifier Disable Time
Amplifier Enable Time
Channel Switching Time
Channel Switching Propagation Delay
Note 2: Defined as the DC offset shift when switching between input channels for a given output.
Note 3: Voltage Gain Accuracy for MAX458 calculated as (V
Note 4: Voltage Gain Accuracy for MAX459 calculated as (VOUT/2 - VIN) @ (VIN = +1V) - (VOUT/2 - VIN) @ (VIN = -1V)
Note 5: All logic levels are guaranteed over the range of VS= ±4.75V to ±5.25V.
Note 6: Differential phase and gain measured with a 40 IRE (285.7mV), 3.58MHz sine wave superimposed on a linear ramp of 0 IRE
Note 7: For MAX458, step input from +2V to 0V; for MAX459, step input from +1V to 0V. All unused channels grounded and all
Note 8: Test input channel programmed to an output and grounded through a 75Ω resistor. Adjacent input is programmed to an
Note 9: Same as Note 6 above, except driven input and output are not adjacent to test input/output.
Note 10: All inputs but the test input are driven by a 10MHz 4Vp-p sine wave. All outputs except the test output are connected to driven inputs.
Note 11: Same as Note 9 above, except with test channel programmed off.
to 100 IRE (714.3mV). “The IRE scale is a linear scale for measuring, in arbitrary IRE units, the relative amplitudes of the various components of a television signal” (from the “Television Engineering Handbook”, edited by K. Blair Benson, McGraw
Hill). This system defines 100 IRE as reference white, 0 IRE as the blanking level, and -40 IRE as the sync peak. The equipment used for the test signal generated 714.3mV (100 IRE) as reference white and -285.7mV (-40 IRE) as sync. The modulation used was 285.7mV (40 IRE), which conforms to the EIA color signal standards.
unused amplifiers disabled.
adjacent output and driven by a 10MHz, 4Vp-p sine wave.
Address to –W—R–Fall Setup Time
Address to –W—R–Rise Hold Time
–C—E–
Fall to –W—R–Fall Setup Time
–C—E–
Rise to –W—R–Rise Hold Time
–W—R–
Pulse Width Low
Data to –W—R–Rise Setup Time
Data to –W—R–Rise Hold Time
–W—R–
Rise to –U—P—D—A—T—E–Fall Setup Time
–U—P—D—A—T—E–
MAX458/MAX459
Pulse Width Low
–U—P—D—A—T—E–
Rise to –W—R–Fall Setup Time
ADS
ADH
CES
CEH
WR
DS
DH
WRS
UP
UPS
SERIAL-MODE TIMING (see Figure 6)
SCLK to –C—S–Fall
–C—S–
Fall to SCLK Rise
SCLK Pulse Width High
SCLK Pulse Width Low
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
SCLK Fall to DOUT
SCLK Rise to –C—S–Rise
–C—S–
Rise to SCLK Rise
–C—S–
Pulse Width High
CSO
CSS
CH
CL
DS
DH
DO
CSH
CS1
CSW
Note 12: Timing Characteristics are guaranteed by design.