Datasheet MAX4589EPP, MAX4589CWP, MAX4589CAP Datasheet (Maxim)

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone].
For small orders, phone [phone].

General Description

The MAX4589 low-voltage, dual 2-channel multiplexer is
designed for RF and video signal processing at frequen­cies up to 200MHz in 50Ω and 75Ω systems. On-chip
functions are controlled through either a parallel interface
or an SPI™/QSPI™/MICROWIRE™ serial interface.

Each channel of the MAX4589 is designed using a “T”
switch configuration, ensuring excellent high-frequency
off-isolation. The MAX4589 has low on-resistance of
60Ω max, with an on-resistance match across all chan-
nels of 4Ω max. Additionally, on-resistance is flat
across the specified signal range (2Ω max). The off­leakage current is under 1nA at TA= +25°C, and less
than 10nA at TA= +85°C.

The MAX4589 operates from single +2.7V to +12V or
dual ±2.7V to ±6V supplies. When operating with a
positive supply of +5V, the inputs maintain TTL/CMOS­level compatibility. The MAX4589 is available in 20-pin
DIP, wide SO, and SSOP packages.

Applications

RF Switching
Video Signal Routing
High-Speed Data Acquisition
Automatic Test Equipment
Networking

Features

♦ Low Insertion Loss: < -2.5dB up to 100MHz
♦ High Off-Isolation: -74dB at 10MHz
♦ Low Crosstalk: < -70dB up to 10MHz
♦ 20MHz -0.1dB Signal Bandwidth
♦ 200MHz -3dB Signal Bandwidth
♦ 60Ω (max) On-Resistance with ±5V Supplies
♦ 4Ω (max) On-Resistance Matching with ±5V

Supplies

♦ 2Ω (max) On-Resistance Flatness with ±5V

Supplies

♦ +2.7V to +12V Single-Supply Operation

±2.7V to ±6V Dual-Supply Operation

♦ Low Power Consumption: <20µW
♦ Rail-to-Rail®‚ Bidirectional Signal Handling
♦ Parallel or SPI/QSPI/MICROWIRE-Compatible

Serial Interface

♦ >±2kV ESD Protection per Method 3015.7
♦ TTL/CMOS-Compatible Inputs with V

L

= +5V

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

________________________________________________________________

Maxim Integrated Products

1

20
19
18
17
16
15
14
13
12
11

1
2
3
4
5
6
7
8
9

10

SER/PAR
COM2
V­NO3
GND
NO4
V

L

DIN
EN
A0/DOUTA1/SCLK

LE/CS

RS

2/4

NO2

GND

NO1

V+

COM1

GND

SSOP/SO/DIP

TOP VIEW

MAX4589

CONTROL LOGIC

19-1424; Rev 0; 1/99

PART

MAX4589CAP
MAX4589CWP
MAX4589CPP 0°C to +70°C

0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

20 SSOP
20 Wide SO
20 Plastic DIP

Pin Configuration

Ordering Information

MAX4589EAP -40°C to +85°C 20 SSOP
MAX4589EWP -40°C to +85°C 20 Wide SO
MAX4589EPP -40°C to +85°C 20 Plastic DIP

SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS—Dual Supplies

(V+ = VL= +4.5V to +5.5V, V- = -4.5V to -5.5V, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical val-

ues are at T

A

= +25°C, V+ = VL= +5V, V- = -5V.) (Note 2)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

(Voltages referenced to GND)

V+...........................................................................-0.3V to +13V

V

L

......................-0.3V to (V+ + 0.3V) or 7V (whichever is lower)

V- ...........................................................................-13V to +0.3V

V+ to V-...................................................................-0.3V to +13V

V

NO_

, V

COM_

to GND (Note 1)..............(V- - 0.3V) to (V+ + 0.3V)

2/

4, RS, LE, CS, A1/SCLK,

A0/DOUT, EN, DIN, SER/PAR to GND ......-0.3V to (V+ + 0.3V)

Continuous Current into Any Terminal..............................±20mA

Peak Current into Any Terminal

(pulsed at 1ms, 10% duty cycle)...................................±40mA

ESD per Method 3015.7.......................................................±2kV

Continuous Power Dissipation (T

A

= +70°C)

SSOP (derate 9.1mW/°C above +70°C)............................727mW

Wide SO (derate 10mW/°C above +70°C)........................800mW

Plastic DIP (derate 11.1mW/°C above +70°C) .................889mW

Operating Temperature Ranges

MAX4589C_ P......................................................0°C to +70°C

MAX4589E_ P...................................................-40°C to +85°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10sec).............................+300°C

V

IN_

= 0 or V

L

V+ = 5V, V- = -5V,
V

NO_

= ±2V, I

COM_

= 4mA

V+ = 5V; V- = -5V;
V

NO_

= 1V, 0, -1V;

I

COM_

= 4mA

CONDITIONS

µA-1 0.03 1I

IN

Input Current

V0.2Input Threshold Hysteresis

V1.5 0.8V

INL

Input Logic Threshold Low

Ω

40 60

R

ON

On-Resistance

Ω

0.5 2.5

R

FLAT(ON)

On-Resistance Flatness
(Note 5)

V2.4 1.7V

INH

Input Logic Threshold High

UNITSMIN TYP MAXSYMBOLPARAMETER

Note 1: Voltages on these pins exceeding V+ or V- are clamped by internal diodes. Limit forward diode current to maximum

current rating.

C, E

C, E

+25°C

+25°C

C, E

T

A

VV- V+V

COM_, VNO_

Analog Signal Range (Note 3)

C, E

C, E

V+ = 5V, V- = 5V,
V

NO_

= ±2V, I

COM_

= 4mA

Ω

14

∆R

ON

On-Resistance Match Between
Channels (Note 4)

+25°C

C, E

C, E

V+ = 5.5V, V- = -5.5V,
V

COM_

= ±4.5V,

V

NO_

= 4.5V

nA

-1 0.01 1

I

NO_ (OFF)

NO_ Off-Leakage Current
(Note 6)

+25°C

C, E

V+ = 5.5V, V- = -5.5V,
V

COM_

= ±4.5V,

V

NO_

= 4.5V

nA

-2 0.01 2

I

COM_ (OFF)

COM_ Off-Leakage Current
(Note 6)

+25°C

C, E

V+ = 5.5V, V- = -5.5V,
V

COM_

= ±4.5V,

V

NO_

= floating

nA

-2 0.01 2

I

COM_ (ON)

COM_ On-Leakage Current
(Note 6)

+25°C

75

5

3

-10 10

-20 20

-20 20

ANALOG SWITCH

LOGIC INPUTS (2/44, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR)

±

±

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

_______________________________________________________________________________________ 3

V

NO_

= 1V

RMS

, f = 10MHz,

Figure 5

V

NO_

= 1V

RMS

, f = 10MHz,

all channels off, Figure 5

V

NO_

= 3V, V+ = 5.5V,

V- = -5.5V, Figure 2

V

COM_

= 0, fIN= 1MHz, Figure 4

V

COM_

= 0, fIN= 1MHz, Figure 4

V

NO_

= 3V, V+ = 4.5V,

V- = -4.5V, Figure 1

V

NO_

= 3V, V+ = 4.5V,

V- = -4.5V, Figure 1

I

SOURCE

= -1mA

V

NO_

= 0, fIN= 1MHz, Figure 4

CL= 1.0nF, V

NO_

= 0,

RS= 0, Figure 3

CONDITIONS

dB-70V

CT

Channel-to-Channel Crosstalk

dB-74V

ISO

Off-Isolation (Note 7)

pF6C

COM_(ON)

COM_ On-Capacitance

pF4C

COM_(OFF)

COM_ Off-Capacitance

pF2C

NO_(OFF)

NO_ Off-Capacitance

pC15QCharge Injection

+25°C

+25°C

ns10 180t

BBM

Break-Before-Make Time Delay
(Note 3)

ns

150 300

t

OFF

Turn-Off Time

ns

380 550

t

ON

Turn-On Time

VVL- 1V

OH

DOUT Logic High Output

UNITSMIN TYP MAXSYMBOLPARAMETER

C, E

+25°C

+25°C

+25°C

+25°C

C, E

+25°C

+25°C

T

A

I

SINK

= 3.2mA V0.4V

OL

DOUT Logic Low Output C, E

ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)

(V+ = VL= +4.5V to +5.5V, V- = -4.5V to -5.5V, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical val-

ues are at T

A

= +25°C, V+ = VL= +5V, V- = -5V.) (Note 2)

C, E

C, E

600

350

Figure 5 MHz

200

BW-3dB Bandwidth +25°C

150

2-channel mode
4-channel mode

Figure 5 MHz

20

BW-0.1dB Bandwidth +25°C

154-channel mode

2-channel mode

Figure 6 ns80t

DS

A_, EN to LE Rise Setup Time

C, E

Figure 6 ns0t

DH

A_, EN to LE Rise Hold Time

C, E

Figure 6 ns80t

L

LE Low Pulse Width

C, E

Figure 6 ns80t

RS

RS Low Pulse Width

C, E

Figure 7 MHz6.25f

CLK

Operating Frequency C, E

Figure 7 ns80t

CH

SCLK Pulse Width High C, E

Figure 7 ns80t

CL

SCLK Pulse Width Low C, E

Figure 7 ns60t

DS

DIN to SCLK Rise Setup Time C, E

Figure 7 ns0t

DH

DIN to SCLK Rise Hold Time C, E

LOGIC OUTPUT (SERIAL INTERFACE)

PARALLEL-INTERFACE TIMING

SERIAL-INTERFACE TIMING

SWITCH DYNAMIC CHARACTERISTICS

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)

(V+ = VL= +4.5V to +5.5V, V- = -4.5V to -5.5V, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical val-

ues are at T

A

= +25°C, V+ = VL= +5V, V- = -5V.) (Note 2)

CONDITIONS

CL= 50pF, Figure 7 ns150t

DO

SCLK Rise to DOUT Valid C, E

UNITSMIN TYP MAXSYMBOLPARAMETER

V

T

A

±2.7 ±6V+, V-

Power-Supply Range

+2.7 V+V

L

V- = -5.5V, V+ = 5.5V µA

-1 0.0001 1+25°C

V- = -5.5V, V+ = 5.5V µA

-1 0.0001 1+25°C

VL= 5.5V, all V

IN_

= 0 or V

L

µA-10 2 10I

L

VLSupply Current C, E

Figure 7 ns80t

CSS1

CS Rise to SCLK Rise Setup
Time

C, E

-10 10

I+V+ Supply Current

C, E

-10 10

I-V- Supply Current

C, E

ELECTRICAL CHARACTERISTICS—Single +5V Supply

(V+ = VL= +4.5V to +5.5V, V- = 0, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

A

= +25°C, V+ = VL= +5V.) (Note 2)

C, E

C, E

V+ = 5V, V

NO_

= 3V,

I

COM_

= 4mA

Ω

18

∆R

ON

On-Resistance Match Between
Channels (Note 4)

+25°C

C, E

150

10

12

-10 10

-20 20

V+ = 5V, V

NO_

= 3V,

I

COM_

= 4mA

V+ = 5V; I

COM_

= 4mA;

V

NO_

= 2V, 3V, 4V

-20 20

CONDITIONS

C, E

V+ = 5.5V; V

COM_

= 4.5V, 1V;

V

NO_

= 1V, 4.5V

nA

-1 0.005 1

I

NO_ (OFF)

NO_ Off-Leakage Current
(Notes 6, 8)

+25°C

C, E

V+ = 5.5V; V

COM_

= 4.5V, 1V;

V

NO_

= 1V, 4.5V

nA

-2 0.005 2

I

COM_ (OFF)

COM_ Off-Leakage Current
(Notes 6, 8)

+25°C

C, E

V+ = 5.5V; V

COM_

= 4.5V 1V;

V

NO_

= 4.5V, 1V, or floating

nA

-2 0.005 2

I

COM_ (ON)

COM_ On-Leakage Current
(Notes 6, 8)

+25°C

Ω

80 120

R

ON

On-Resistance

Ω

410

R

FLAT(ON)

On-Resistance Flatness
(Note 5)

UNITSMIN TYP MAXSYMBOLPARAMETER

+25°C

+25°C

T

A

V0V+V

COM_

, V

NO

Analog Signal Range (Note 3)

Figure 7 ns50t

CSS0

CS Fall to SCLK Rise Setup Time

C, E

Figure 7 ns80t

CSS1

CS Fall to SCLK Rise Hold Time

C, E

Figure 7 ns0t

CSH1

CS Rise to SCLK Rise Hold Time

C, E

ANALOG SWITCH

Figure 6 ns80t

RS

RS Low Pulse Width

C, E

POWER SUPPLY

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

_______________________________________________________________________________________ 5

C, E

C, E

900

350

Figure 5 MHz

100

BW-3dB Bandwidth

V

NO_

= 1V

RMS

, f = 10MHz,

Figure 5

V

NO_

= 1V

RMS

, f = 10MHz,

all channels off, Figure 5

V

NO__

= 3V, V+ = 5.5V,

Figure 2

+25°C

V

NO__

= 3V, V+ = 4.5V,

Figure 1

V

NO__

= 3V, V+ = 4.5V,

Figure 1

Figure 5 MHz

I

SOURCE

= -1mA

CL= 1.0nF, V

NO_

= 2.5V,

RS= 0, Figure 3

CONDITIONS

75
10

BW-0.1dB Bandwidth

4-channel mode

+25°C

2-channel mode

74-channel mode

2-channel mode

Figure 6 ns80t

DS

A_, EN to LE Rise Setup Time

C, E

Figure 6 ns0t

DH

A_, EN to LE Rise Hold Time

C, E

dB-70V

CT

Channel-to-Channel Crosstalk

dB-65V

ISO

Off-Isolation

pC5QCharge Injection

Figure 6 ns80t

L

LE Low Pulse Width

+25°C

+25°C

ns10 200t

BBM

Break-Before-Make Time Delay
(Note 3)

C, E

Figure 6 ns80

ns

150 300

t

OFF

Turn-Off Time

ns

550 800

t

ON

Turn-On Time

t

RS

RS Low Pulse Width

C, E

VVL- 1V

OH

DOUT Logic High Output

UNITSMIN TYP MAXSYMBOLPARAMETER

C, E

+25°C

+25°C

C, E

+25°C

T

A

I

SINK

= 3.2mA V0.4V

OL

DOUT Logic Low Output C, E

ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)

(V+ = VL= +4.5V to +5.5V, V- = 0, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

A

= +25°C, V+ = VL= +5V.) (Note 2)

V2.4 1.7V

INH

Input Logic Threshold High C, E

V0.2Input Threshold Hysteresis

VIN= 0 or V

L

µA-1 1I

IN

Input Current C, E

V1.5 0.8V

INL

Input Logic Threshold Low C, E

LOGIC INPUTS (2/44, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR

LOGIC OUTPUT (SERIAL INTERFACE)

SWITCH DYNAMIC CHARACTERISTICS

PARALLEL-INTERFACE TIMING

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

6 _______________________________________________________________________________________

Figure 7

-10 10

I+V+ Supply Current

C, E

ns

CONDITIONS

6.25f

CLK

Operating Frequency C, E

Figure 7 ns0t

CSH1

CS Rise to SCLK Rise Hold Time

C, E

CL= 50pF, Figure 7 ns150t

DO

SCLK Rise to DOUT Valid C, E

UNITSMIN TYP MAXSYMBOLPARAMETER

V+ ≤ 6.5V

V

T

A

2.7 V+

V

L

V+ > 6.5V 2.7 6.5
V+= 5.5V, VIN= 0 or V

L

µA

-1 1+25°C

VL= 5.5V, all V

IN_

= 0 or V

L

µA-10 2 10I

L

VLSupply Current C, E

ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)

(V+ = VL= +4.5V to +5.5V, V- = 0, V

INH

= +2.4V, V

INL

= +0.8V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

A

= +25°C, V+ = VL= +5V.) (Note 2)

Figure 7 ns50t

CSS0

CS Fall to SCLK Rise Setup Time

C, E

Figure 7 ns80t

CL

SCLK Pulse Width Low C, E

Figure 7 ns80t

CH

SCLK Pulse Width High C, E

Figure 7 ns60t

DS

DIN to SCLK Rise Setup Time C, E

Figure 7 ns0t

DH

DIN to SCLK Rise Hold Time C, E

V2.7 12V+

Power-Supply Range

C, E 450

V

IN_

= 0 or V

L

V+ = 2.7V, V

NO_

= 1V,

I

COM_

= 1mA

CONDITIONS

µA-1 1I

IN

Input Current

V0.5V

INL

Input Logic Threshold Low

Ω

240 350

R

ON

On-Resistance

V2.0V

INH

Input Logic Threshold High

UNITSMIN TYP MAXSYMBOLPARAMETER

C, E

C, E

+25°C

C, E

T

A

V0V+V

COM_,VNO

Analog Signal Range (Note 3)

ELECTRICAL CHARACTERISTICS—Single +3V Supply

(V+ = VL= +2.7V to +3.6V, V- = 0, V

INH

= +2V, V

INL

= +0.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA=

+25°C, V+ = V

L

= +3V.)

µA

V

NO__

= 1.5V, V+ = 2.7V,

Figure 1

ns

1200

t

ON

Turn-On Time

C, E

V

NO__

= 1.5V, V+ = 2.7V,

Figure 1

ns

500

t

OFF

Turn-Off Time

C, E

V

NO__

= 1.5V, V+ = 3.6V,

Figure 2

ns10 350t

BBM

Break-Before-Make Time Delay
(Note 3)

+25°C

+25°C

C, E

700 1000

250 400

SWITCH DYNAMIC CHARACTERISTICS

LOGIC INPUT (2/44, RS, LE/CS, A1/SCLK, AO/DOUT, EN, DIN, SER/PAR

ANALOG SWITCH

Figure 7 ns80t

CSS1

CS Rise to SCLK Rise Setup
Time

C, E

Figure 7 ns80t

CSS1

CS Fall to SCLK Rise Hold Time

C, E

Figure 6 ns80t

RS

RS Low Pulse Width

C, E

SERIAL-INTERFACE TIMING

POWER SUPPLY

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

_______________________________________________________________________________________ 7

Figure 7 ns200t

CSS1

CS Fall to SCLK Rise Hold Time

C, E

Figure 6

-10 10

I+V+ Supply Current

C, E

ns

CONDITIONS

200t

DS

A_, EN to LE Rise Setup Time

C, E

Figure 7 ns0t

CSH1

CS Rise to SCLK Rise Hold Time

C, E

CL= 50pF, Figure 7 ns250t

DO

SCLK Rise to DOUT Valid C, E

UNITSMIN TYP MAXSYMBOLPARAMETER T

A

V+ = 3.6V, VIN= 0 or V

L

µA

-1 1+25°C

Figure 7 ns100t

CSS0

CS Fall to SCLK Rise Setup Time

C, E

Figure 6 ns200t

L

LE Low Pulse Width

C, E

Figure 6 ns0t

DH

A_, EN to LE Rise Hold Time

C, E

Figure 7 MHz2.1f

CLK

Operating Frequency C, E

Figure 7 ns200t

CH

SCLK Pulse Width High C, E

Figure 7 ns0t

DH

DIN to SCLK Rise Hold Time C, E

Figure 7 ns200t

CL

SCLK Pulse Width Low C, E

Figure 7 ns100t

DS

DIN to SCLK Rise Setup Time C, E

Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: Guaranteed by design.
Note 4: ∆R

ON

= R

ON(MAX)

- R

ON(MIN)

.

Note 5: Resistance flatness is defined as the difference between the maximum and the minimum value of on-resistance as

measured over the specified analog-signal range.

Note 6: Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at T

A

= +25°C.

Note 7: Off-isolation = 20log10 [V

COM_

/ V

NO_

], V

COM_

= output, V

NO_

= input to off switch.

Note 8: Leakage testing for single-supply operation is guaranteed by testing with dual supplies.

ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)

(V+ = VL= +2.7V to +3.6V, V- = 0, V

INH

= +2V, V

INL

= +0.5V, TA= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at TA=

+25°C, V+ = V

L

= +3V.)

I

L

VLSupply Current VL= 3.6V, all VIN= 0 or V

L

µA-10 1 10C, E

Figure 7 ns200t

CSS1

CS Rise to SCLK Rise Setup
Time

C, E

Figure 6 ns80t

RS

RS Low Pulse Width

C, E

Figure 6 ns80t

RS

RS Low Pulse Width

C, E

PARALLEL-INTERFACE TIMING

SERIAL-INTERFACE TIMING

POWER SUPPLY

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

8 _______________________________________________________________________________________

Typical Operating Characteristics

(V+ = VL= +5V, V- = -5V, TA = +25°C, unless otherwise specified.)

0

20
10

40
30

60
50

70

90
80

100

-5 -3 -2 -1-4 012 435

ON-RESISTANCE vs. V

COM

(DUAL SUPPLIES)

MAX4589toc01

V

COM

(V)

R

ON

(Ω)

V± = ±2.5V

V± = ±3V

V± = ±4V
V± = ±5V

0

50

100

150

200

250

024681012

MAX4589toc02

ON-RESISTANCE vs. V

COM

(SINGLE SUPPLY)

V

COM

(V)

R

ON

(Ω)

V+ = +3.6V

V+ = +3.0V

V+ = +2.5V

V+ = +5V

V- = 0

V+ = +9V

V+ = +12V

20

30

25

40

35

50

45

55

-5 -1-3 1 3-4 0-2 2 4 5

MAX4589toc03

ON-RESISTANCE vs. V

COM

AND

TEMPERATURE (DUAL SUPPLIES)

V

COM

(V)

R

ON

(Ω)

TA = -40°C

TA = +25°C

TA = +85°C

0

60

40

20

80

100

120

0 2.01.50.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0

MAX4589toc04

ON-RESISTANCE vs. V

COM

AND

TEMPERATURE (SINGLE SUPPLY)

V

COM

(V)

R

ON

(Ω)

TA = -40°C

TA = +25°C

TA = +85°C

0

200

100

400

300

t

ON

t

OFF

500

600

2.0 3.0 3.52.5 4.0 4.5 5.0

tON, t

OFF

vs. SUPPLY VOLTAGE

MAX4589toc07

DUAL SUPPLY VOLTAGE (±V)

TIME (ns)

10

100

1

-40 0-20 20 40 60 80

ON/OFF-LEAKAGE CURRENT

vs. TEMPERATURE

MAX4589toc05

TEMPERATURE (°C)

LEAKAGE CURRENT (pA)

ON-LEAKAGE

OFF-LEAKAGE

-5 -3 -2 -1 0-4 12345

CHARGE INJECTION

vs. V

COM

MAX4589toc06

V

COM

(V)

CHARGE INJECTION (pC)

0

10

5

20

15

30

25

35

DUAL SUPPLIES

SINGLE SUPPLY

0

50

100

150

200

250

300

350

400

450

-40 -20 0 20 40 60 80

tON, t

OFF

vs. TEMPERATURE

MAX4589toc08

TEMPERATURE (°C)

TIME (ns)

t

ON

t

OFF

0.1p

1p

10p

100p

1n

10n

100n

1µ

10µ

-40 -20 0 20 40 60 80

POWER-SUPPLY CURRENT

vs. TEMPERATURE

MAX4589toc09

TEMPERATURE (°C)

CURRENT (A)

I

L

I+, I-

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(V+ = VL= +5V, V- = -5V, TA = +25°C, unless otherwise specified.)

-90

-60

-70

-80

-50

-40

-30

-20

-10

0

10

INSERTION LOSS, OFF-ISOLATION,

AND CROSSTALK vs. FREQUENCY

(DUAL SUPPLIES)

MAX4589toc11

AMPLITUDE (dB)

100k 1M 10M 100M 1G

ON LOSS

RS = 75Ω
R

L

= 600Ω

CROSSTALK

OFF-ISOLATION

FREQUENCY (Hz)

-90

-60

-70

-80

-50

-40

-30

-20

-10

0

10

INSERTION LOSS, OFF-ISOLATION,

AND CROSSTALK vs. FREQUENCY

(SINGLE SUPPLY)

MAX4589toc12

FREQUENCY (MHz)

AMPLITUDE (dB)

100k 1M 10M 100M 1G

INSERTION LOSS

OFF-ISOLATION

CROSSTALK

RS = 75Ω
R

L

= 600Ω

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

10 ______________________________________________________________________________________

Pin Description

Interface Select Input. Drive low for parallel data interface operation. Drive high for serial data interface
operation and to enable the DOUT driver.

SER/PAR

20

Analog Switch Common Terminal. See

Truth Tables

.COM219

Analog Negative Supply Voltage Input. Connect to GND for single-supply operation.V-18

Normally Open Analog Input Terminal. See

Truth Tables

.NO317

Normally Open Analog Input Terminal. See

Truth Tables

.NO415

Logic Supply Input. Powers the DOUT driver and other digital circuitry. VLsets both the input threshold
levels and the output logic levels.

V

L

14

In parallel mode this pin is the transparent Latch Enable. In the serial mode, this pin is the Chip-Select input.
See

Truth Tables

.

LE/CS

9

In parallel mode, A1/SCLK is the most significant address bit. If 2/4 is high, A1/SCLK is ignored. In the serial
mode, A1/SCLK is the serial shift clock input. Data is loaded on the rising edge of SCLK. See

Truth Tables

.

A1/SCLK10

In parallel mode, this pin is the least significant address bit. In serial mode, DOUT is the output from the
internal 4-bit shift register. DOUT is intended for daisy-chain cascading. DOUT is not three-stated by CS.
See

Serial Operation

.

A0/DOUT11

Switch Enable. Drive EN low to force all channels off. Drive high to allow normal multiplexer operation.
Operates asynchronously in serial mode. In parallel mode, EN is latched when the LE signal is high.

EN12

Serial Data Input. In serial mode, data is loaded on the rising edge of SCLK. Connect to VLor GND in
parallel mode.

DIN13

Normally Open Analog Input Terminal. See

Truth Tables

.NO26

Multiplexer Configuration Control. Connect to VLto select dual 2-channel mode. Connect to GND for single
4-channel multiplexer operation. See

Truth Tables

.

2/4

7

Active-Low Reset Input. In serial mode, drive RS low to force the latches and shift registers to the power-on
reset state and force all switches open. In parallel mode, drive RS low to force the latches to the power-on
reset state and force switches open. See

Truth Tables

.

RS

8

Normally Open Analog Input Terminal. See

Truth Tables

.NO14

Analog Positive Supply Voltage InputV+3

PIN

Analog Switch Common Terminal. See

Truth Tables

.COM12

Ground. Connect to ground plane. See

Grounding

section.GND1, 5, 16

FUNCTIONNAME

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

______________________________________________________________________________________ 11

t

OFF

t

ON

V

OUT

V

OUT

V

NO_

NO_

COM_

V+

V+

V-

V-

SWITCH IS TIMED FROM 50% LEVEL OF DIGITAL SIGNAL.

MAX4589

300Ω

30pF

90%90%

50% 50%

GND

EN

LE/CS

EN

∆V

OUT

EN

V

OUT

∆V

OUT

IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER

ERROR Q WHEN THE CHANNEL TURNS OFF.

V+

V+

V-

V-

V

OUT

EN

NO_

COM_

V

NO_

MAX4589

Q = ∆V

OUT

· C

L

1nF

GND

C

L

10µF

LE/CS
SER/PAR

Figure 1. Turn-On/Turn-Off Time

Figure 2. Break-Before-Make Time Delay

Figure 3. Charge Injection

V

OUT

GND

V

OUT

V

NO_

NO_

COM_

MAX4589

300Ω

30pF

GND

NO_

t

BBM

90%90%

V+

V+

V-

V-

A0

LE/CS
SER/PAR

A0

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

12 ______________________________________________________________________________________

V+

V+

V-

V-

1MHz

CAPACITANCE

ANALYZER

NO_ FLOATING

COM_

MAX4589

GND

V+

V+

V-

V-

NO_

COM_

MAX4589

GND

GND

FLOATING

1MHz

CAPACITANCE

ANALYZER

Figure 4. NO_, COM_ Capacitance

Figure 5. Off-Isolation, Crosstalk, and Bandwidth

Figure 6. Parallel Timing Diagram

V+
V+

NO_

49.9Ω

MAX4589

56Ω

50Ω

+

-

NO_

COM_

V­V-

ALL SIGNALS NORMALIZED TO V
.

COM

24.9Ω

560Ω

= 0dB.

50Ω

50Ω

t

L

LE

t

DS

A0, A1, EN

RS

NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH t
TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.

t

DH

AND tF <10ns.

R

MAX4589

t

RS

MEASURE
NODE

MEASURE
NODE

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

______________________________________________________________________________________ 13

_______________Detailed Description

Logic-Level Translators

The MAX4589 is constructed of high-frequency “T”
switches, as shown in Figure 8. The logic-level inputs
are translated by amplifier A1 into a V+ to V- logic sig­nal that drives the internal control logic. The internal
control logic drives the gates of N-channel MOSFETs
N1 and N2 from V+ to V-, turning them fully on or off.
The same signal drives inverter A2 (which drives the P­channel MOSFETs P1 and P2, turning them fully on or
off) from V+ to V-, and turns the N-channel MOSFET N3
on and off. The logic-level threshold is determined by
VLand GND.

Switch On Condition

When the switch is on, MOSFETs N1, N2, P1, and P2
are on and MOSFET N3 is off (Figure 8). The signal
path is COM_ to NO_, and because both N-channel
and P-channel MOSFETs act as pure resistances, it is
symmetrical (i.e., signals pass in either direction). The
off MOSFET, N3, has no DC conduction, but has a
small amount of capacitance to GND. The MAX4589’s
construction allows an exceptional 200MHz -3dB band­width.

Frequency response in 75Ω systems is reasonably flat
up to 50MHz, with typically 2.5dB of insertion loss.
Higher-impedance circuits show even lower attenuation
(and vice versa), but slightly lower bandwidth due to
the increased effect of the internal and external capaci­tance and the switch’s on-resistance.

The MAX4589 is optimized for ±5V operation. Using
lower supply voltages or a single supply increases
switching time, on-resistance (and therefore on-state
attenuation), and nonlinearity.

Switch Off Condition

When the switch is off, MOSFETs N1, N2, P1, and P2
are off and MOSFET N3 is on (Figure 8). The signal
path is through the parasitic off-capacitances of N1,
N2, P1, and P2, but it is shunted to ground by N3. This
forms a highpass filter whose exact characteristics are
dependent on the source and load impedances. In 75Ω
systems, and below 1MHz, the attenuation exceeds
80dB. This value decreases with increasing frequency
and increasing circuit impedances. External capaci­tance and board layout dominate overall performance.

t

CSS

CS

SCLK

DIN A0 A1 BIT 3 DISABLE

DOUT

NOTE: ALL INPUT SIGNALS ARE SPECIFIED WITH t

R

AND tF < 10ns.

TIMING IS MEASURED FROM 50% OF DIGITAL SIGNAL.

t

DS

t

DH

t

DO

t

CH

t

CL

t

CSH

MAX4589

Figure 7. Serial Timing Diagram

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

14 ______________________________________________________________________________________

N1

P1

N2

N3

P2

A2

A1

COM_

NO_

CONTROL

LOGIC

V+

A_

V

L

GND

V-

Figure 8. T-Switch Construction

__________Applications Information

Power-Supply Considerations

Overview

The MAX4589 construction is typical of many CMOS
analog switches. It has four supply pins: V+, V-, VL, and
GND. V+ and V- are used to drive the internal CMOS
switches and set the limits of the analog voltage on any
switch. Reverse ESD-protection diodes are internally
connected between each analog signal pin and both
V+ and V-. If the voltage on any pin exceeds V+ or V-,
one of these diodes conducts. During normal operation
these reverse-biased ESD diodes leak, forming the only
current drawn from V- and V+.

Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given sig­nal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages vary as the signal varies. The difference in the
two diode leakages from the signal path to the V+ and
V- pins constitutes the analog signal-path leakage cur­rent. All analog leakage current flows to the supply ter­minals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of either the same or opposite polarity.

There is no connection between the analog signal
paths and GND. The analog signal paths consist of an

N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase to V+ and V- by the logic-level translators.

V

L

and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals to drive the gates of the
analog switches. Therefore, the gate-to-source and
gate-to-drain impedances are the only connection
between the logic supplies and the analog supplies.

Bipolar-Supply Operation

The MAX4589 operates with bipolar supplies between
±2.7V and ±6V. The V+ and V- supplies are not
required to be symmetrical, but their sum cannot
exceed the absolute maximum rating of 13.0V. Do not

connect the MAX4589 V+ pin to +3V and connect the
logic-level input pins to TTL logic-level signals. This
exceeds the absolute maximum ratings, and may
cause damage to the part and/or external circuits.

CAUTION: The absolute maximum V+ to V- differen­tial voltage is 13.0V. Typical “±6-Volt” or “12-Volt”
supplies with ±10% tolerances can be as high as

13.2V. This voltage can damage the MAX4589. Even
±5% tolerance supplies may have overshoot or
noise spikes that exceed 13.0V.

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

______________________________________________________________________________________ 15

Single-Supply Operation

The MAX4589 operates from a single supply between
+2.7V and +12V when V- is connected to GND.
Observe all of the precautions listed in the

Bipolar-

Supply Operation

section. Note, however, that these
parts are optimized for ±5V operation, and AC and DC
characteristics are degraded significantly when operat­ing at less than ±5V. As the overall supply voltage
(V+ to V-) is reduced, switching speed, on-resistance,
off-isolation, and distortion are degraded (see

Typical

Operating Characteristics

).

Single-supply operation also limits signal levels and
interferes with grounded signals. When V- = GND, AC
signals are limited to 300mV below GND. Voltages
below this level are clipped by the internal ESD-protec­tion diodes, and the parts can be damaged if exces­sive current flows.

Power Off

When power to the MAX4589 is off (i.e., V+ = 0 and V­= 0), the

Absolute Maximum Ratings

still apply. This
means that none of the MAX4589 pins can exceed
±0.3V. Voltages beyond ±0.3V cause the internal ESD­protection diodes to conduct, with potentially cata­strophic consequences.

Power-Supply Sequencing

When applying power to the MAX4589, follow this
sequence: V+, V-, VL, then logic inputs. Apply signals
on the analog NO_ and COM_ pins any time after V+
and V- are set. Turning on all pins simultaneously is
acceptable only if the circuit design guarantees con­current power-up.

The power-down sequence is the opposite of the
power-up sequence. That is, the VLand logic inputs
must go to zero potential before (or simultaneously
with) the V- then V+ supplies. Always observe the

Absolute Maximum Ratings

to ensure proper operation.

Grounding

DC Ground Considerations

Satisfactory high-frequency operation requires that
careful consideration be given to grounding. For most

applications, a ground plane is strongly recom­mended and the GND pin must connect to it with
solid copper. While the V+ and V- power-supply pins

are common to all switches in a given package, each
input pair is separated with ground pins that are not
internally connected to each other. This contributes to
the overall high-frequency performance by reducing
channel-to-channel crosstalk.

The digital inputs have voltage thresholds determined by
VLand GND. (V- does not influence the logic-level

threshold.) With VL= +5V and GND = 0, the threshold is
about 1.6V, ensuring compatibility with TTL- and CMOS­logic drivers.

AC Ground and Bypassing

A ground plane is mandatory for satisfactory high­frequency operation. Prototyping using hand wiring or

wire-wrap boards is not recommended. Make the
ground plane solid metal underneath the device, with­out interruptions. Avoid routing traces under the device
itself. For DIP packages, this applies to both sides of a
two-sided board. Failure to observe this has a minimal
effect on the “on” characteristics of the switch at high
frequencies, but it will degrade the off-isolation and
crosstalk.

When using the SO package of the MAX4589 on PC
boards with a buried ground plane, connect the GND
pins to the ground plane with a separate via. Do not
share this via with any other ground path. Providing a
ground via on both sides of the SMT land further
enhances the off-isolation by lowering the parasitic
inductance. With the DIP package, connect the
through-holes directly to the buried plane or thermally
relieve them, as required, to meet manufacturability
requirements. Again, do not use these through-hole
pads as the current path for any other components.

Bypass the V+ and V- pins to the ground plane with sur­face-mount 0.1µF capacitors. Locate these capacitors as
close as possible to the pins on the same side of the
board as the device. Do not use feedthroughs or vias for
bypass capacitors. If board layout dictates that the
bypass capacitors are mounted on the opposite side of
the PC board, use short feedthroughs or vias, directly
under the V+ and V- pins. Use multiple vias if possible. If
V- = GND, connect it directly to the ground plane with
solid copper. Keep all traces short.

Signal Routing

Keep all signal traces as short as possible. Separate all
signal traces from each other, and keep them away
from any other traces that could induce interference.
Separating the signal traces with generously sized
ground wires also helps minimize interference. Routing
signals via coaxial cable, terminated as close to the
MAX4589 as possible, provides the highest isolation.

Board Layout

IC sockets degrade high-frequency performance and
are not recommended if signal bandwidth exceeds
5MHz. Surface-mount parts, having shorter internal
lead frames, provide the best high-frequency perfor­mance. Keep all bypass capacitors close to the device,
and separate all signal leads with ground planes. Use

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

16 ______________________________________________________________________________________

vias to connect the ground planes on each side of the
board. Logic-level signal routing is not critical.

Impedance Matching

The MAX4589 is intended for use in 75Ω systems,
where the inputs are terminated external to the IC and
the COM terminals are connected to an impedance of
600Ω or higher. The MAX4589 operates in 50Ω and
75Ω systems with terminations through the IC.
However, variations in on-resistance and on-resistance
flatness cause nonlinearities.

Crosstalk and Off-Isolation

The graphs shown in the

Typical Operating Character-

istics

for crosstalk and off-isolation are taken on adja­cent channels. The adjacent channel is the worst-case
condition. For example, NO1 has the worst off-isolation
to COM1 due to its close proximity. Choosing channels
wisely necessitates separating the most sensitive chan­nels from the most offensive. Conversely, the above
information also applies to the NO3 and NO4 inputs to
the COM2 pin.

Power-On Reset (POR)

The MAX4589 has internal circuitry to guarantee that all
switches are off on power-up (POR). This is equivalent
to the state resulting from asserting RS during normal
operation.

Serial Operation

The serial mode is activated by driving the SER/PAR
input pin to a logic high. The data is then entered using

a 4-bit SPI/MICROWIRE write operation. Systems that
must write longer data streams can ignore all but the
last four bits. Refer to Figure 7 for a detailed diagram of
the serial-interface logic. The first bit loaded is A0, then
A1, then an unused bit, followed by the disable bit.

There are four flip-flops in the input shift register. The
output of the 4th shift register is output on DOUT on the
rising edge of A1/SCLK. This allows cascading of multi­ple MAX4589s using only one chip-select line. For
example, one 16-bit write programs the shift registers
of four cascaded MAX4589s. The data from the shift
register is moved to the internal control latches only
upon the rising edge of CS, so all four MAX4589s
change state simultaneously. RS has the same effect
as the internal power-on reset (POR) signal. The POR
state is A0 = A1 = 0 and disable = 1.

In serial mode, 2/4 is not used. Connect it to GND or
V

L

; do not leave 2/4 unconnected.

Parallel Operation

The parallel mode is activated by driving SER/PAR to a
logic low. The MAX4589 is then programmed by a
latched parallel bus scheme. Refer to Figure 6 for a
detailed diagram of the parallel-interface logic. If 2/ 4 is
high, A1 is disabled and the MAX4589 is configured as
a dual 1-of-2 multiplexer. If 2/4 is low, the MAX4589 is
configured as a 1-of-4 multiplexer. It is best to hard-wire
2/4 to a known state for the desired mode of operation,
or to use a dedicated microcontroller port pin.

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

______________________________________________________________________________________ 17

Parallel Operation

Truth Tables

Connect NO3 to COM210 0 1 0 1 0

Connect NO1 to COM100
Connect NO2 to COM100

All switches off.x0

SER/PAR

All switches off, latches are cleared.xx

Maintain previous state.x0

SWITCH STATESA1

0
1

x

x

x

A0

1
1

0

x

x

EN

0
0

0

x

1

LE

1
1

1

0

1

RS

0
0

x

x

x

2/

44

Serial Mode. Refer to

Serial Operation Truth Table

.x1 x x x 1 x

Connect NO4 to COM210 1 1 0 1 0
Connect NO1 to COM1and NO3 to COM2x0 0 1 0 1 1
Connect NO2 to COM1and NO4 to COM2x0 1 1 0 1 1

x = Don’t Care.

Note: 2/4 is not latched when LE is high. When LE is low, all latches are transparent. A1, A0 and EN are latched.

Connect COM1 to COM2 externally for 1-of-4 single-ended operation.

Serial Operation

Contents of shift register transferred to control latches.1 x x 1

All switches off.1 x x x
Chip unselected.1

Input shift register loads one bit from DIN. DOUT
updates on rising edge of SCLK.

1

0

Parallel Mode. Refer to

Parallel Operation Truth Table

.0

All switches off, latches and shift register are cleared.
This is the Power-On Reset (POR) state.

1

SWITCH STATES

SER/

PPAARR

1
0

x

x

CCSS

x

x

x

SCLK

x
x

x

x

DIN

1
1

x

x

EN

x = Don’t Care.
*DOUT is delayed by 4 clock cycles from DIN.

1

1
1

1

x

0

RRSS

*

*
*

*

High-Z

0

DOUT

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

18 ______________________________________________________________________________________

Truth Tables (continued)

Control Bit and 2/

44

Logic

x = Don't Care.

Note: A0, A1, BIT 3, and DISABLE are the 4 bits latched into the MAX4589 with a MICROWIRE/SPI write, respectively. A0 is the LSB

(first bit clocked in), BIT 3 is not used, and DISABLE is the MSB (last bit clocked in).

Connects NO2 to COM1 and NO4 to COM20 x x 1 1

Connects NO2 to COM10 x 0 1

Connects NO4 to COM20
Connects NO1 to COM1 and NO3 to COM20

0

Connects NO3 to COM20

Connects NO1 to COM10

All switches off.1

SWITCH STATES

DISABLE

BIT

x
x

x

x

x

BIT 3

1
x

1

0

x

A1

BIT

1
0

0

0

x

A0

BIT

0
1

0

0

x

2/

44

PIN

___________________Chip Information

TRANSISTOR COUNT: 853

MAX4589

Low-Voltage, High-Isolation,

Dual 2-Channel RF/Video Multiplexer

______________________________________________________________________________________ 19

Package Information

SSOP.EPS

PDIPN.EPS

MAX4589

Low-Voltage, High-Isolation,
Dual 2-Channel RF/Video Multiplexer

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

20

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Package Information (continued)

SOICW.EPS