Maxim MAX456EPL, MAX456EJL, MAX456CPL, MAX456C-D, MAX456EQH Datasheet

19-2858; Rev 2; 2/94

8 x 8 Video Crosspoint Switch

_______________General Description

The MAX456 is the first monolithic CMOS 8 x 8 video
crosspoint switch that significantly reduces component
count, board space, and cost. The crosspoint switch
contains a digitally controlled matrix of 64 T-switches
that connect eight video input signals to any, or all, out­put channels. Each matrix output connects to eight
internal, high-speed (250V/µs), unity-gain-stable buffers
capable of driving 400Ω and 20pF to ±1.3V. For appli­cations requiring increased drive capability, the
MAX456 outputs can be connected directly to two
MAX470 quad, gain-of-two video buffers, which are
capable of driving 75Ω loads.

Three-state output capability and internal, programma­ble active loads make it feasible to parallel multiple
MAX456s and form larger switch matrices.

In the 40-pin DIP package, crosstalk (70dB at 5MHz) is
minimized, and board area and complexity are simpli­fied by using a straight-through pinout. The analog
inputs and outputs are on opposite sides, and each
channel is separated by a power-supply line or quiet
digital logic line.

________________________Applications

Video Test Equipment
Video Security Systems
Video Editing

________Typical Application Circuit

8 INPUT CHANNELS

MAX470

= 2

A

V

75Ω

WR

OUTPUT

SELECT

INPUT

SELECT

SERIAL

LATCH

MAX456

A2
A1
A0

8 X 8

T-SWITCH

MATRIX
D3
D2

OR

D1/SER OUT
D0/SER IN

I/O



AV = 2

MAX470

75Ω

____________________________Features

♦ Routes Any Input Channel to Any Output Channel
♦ Switches Standard Video Signals
♦ Serial or Parallel Digital Interface
♦ Expandable for Larger Switch Matrices
♦ 80dB All-Channel Off Isolation at 5MHz
♦ 8 Internal Buffers with:

250V/µs Slew Rate, Three-State Output Capability,
Power-Saving Disable Feature, 35MHz Bandwidth

______________Ordering Information

PART TEMP. RANGE PIN-PACKAGE

MAX456CPL 0°C to +70°C 40 Plastic DIP
MAX456CQH 0°C to +70°C 44 PLCC
MAX456C/D 0°C to +70°C Dice*

Ordering Information continued on last page.

* Dice are specified at T

= +25°C, DC parameters only.

A

_________________Pin Configurations

TOP VIEW

D1/SER OUT

D0/SER IN

A2
A1

IN0

A0

IN1

LOAD

IN2

DGND

IN3

DGND

IN4

EDGE/LEVEL

IN5

V+

IN6

SER/PAR

IN7

PLCC on last page

1
2
3

MAX456

4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

V-

20

DIP

V+

40

OUT0

39

D2

38

OUT1

37

D3

36

OUT2

35

V-

34

OUT3

33

AGND

32

OUT4

31

AGND

30

OUT5

29

AGND

28

OUT6

27

V+

26

OUT7

25

CE

24

CE

23

LATCH

22

WR

21

MAX456

________________________________________________________________

Maxim Integrated Products

Call toll free 1-800-998-8800 for free samples or literature.

1

8 x 8 Video Crosspoint Switch

ABSOLUTE MAXIMUM RATINGS

Total Supply Voltage (V+ to V-) ...........................................+12V

Positive Supply Voltage V+ Referred to AGND......-0.3V to +12V

Negative Supply Voltage V- Referred to AGND.....-12V to +0.3V

DGND Voltage.........................................................AGND ±0.3V

Buffer Short Circuit to Ground when

Not Exceeding Package Power Dissipation.............Indefinite

Analog Input Voltage............................(V+ + 0.3V) to (V- - 0.3V)

MAX456

Digital Input Voltage.............................(V+ + 0.3V) to (V- - 0.3V)

Input Current, Power On or Off

Digital Inputs.................................................................±20mA

Analog Inputs ...............................................................±50mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

Continuous Power Dissipation (T

40-Pin Plastic DIP (derate 11.3mW/°C above +70°C)....889mW

40-Pin CERDIP (derate 20.0mW/°C above +70°C)....1600mW

44-Pin PLCC (derate 13.3mW/°C above +70°C) .......1066mW

Operating Temperature Ranges:

MAX456C _ _ ......................................................0°C to +70°C

MAX456E _ _ ...................................................-40°C to +85°C

Storage Temperature Range.............................-65°C to +160°C

Lead Temperature (soldering, 10 sec)............................+300°C

ELECTRICAL CHARACTERISTICS

(V+ = 5.0V, V- = -5.0V, -1.3V ≤ VIN≤ +1.3V; LOAD = +5V; internal load resistors on; AGND = DGND = 0V; TA= +25°C,
unless otherwise noted.)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Voltage Range -1.3 1.3 V

Internal load

Voltage Gain

Buffer Offset Voltage
Offset Voltage Drift TA= T

Operating Supply Voltage ±4.5 ±5.5 V
Supply Current, All Buffers On

(No External Load)

Supply Current, All Buffers Off
Power-Supply Rejection Ratio ±4.5V to ±5.5V, DC measurement 50 64 dB

Analog Input Current ±0.1 ±10 nA
Output Leakage Current

Internal Amplifier Load Resistor
(LOAD Pin = 5V)

Buffer Output Voltage Swing Internal load resistors on, no external load ±1.3 V
Digital Input Current TA= T
Output Impedance at DC 10 Ω
Input Logic Low Threshold 0.8 V
Input Logic High Threshold 2.4 V
SER OUT Output Logic Low 0.4
SER OUT Output Logic High 4

resistors on, no
external load,
V

= 0V to 1V

IN

TA= +25°C ±7
TA= T

MIN
MIN

TA= +25°C 39 45
TA= T

MIN

TA= +25°C
TA= T

MIN

TA= T

MIN

Internal load resistors off, all buffers
off, TA= T

TA= +25°C 250 400 600
TA= T

MIN

MIN

Serial mode,
SER/–P—A—R–= 5V

to T
to T

to T

to T

to T

MIN

to T

to T

MAX
MAX

MAX

MAX

MAX

to T

MAX

MAX

TA= +25°C

TA= T

MAX

to T

MIN

IOL= 1.6mA
IOH= -0.4mA

MAX

0.99 1.0 1.01

0.98 1.0 1.02

200 765

= +70°C)

A

V/V

±12

20 µV/°C

60

1.5 3.0
4

±100 nA

±1

mV

mA

mA

Ω

µA

V

2 _______________________________________________________________________________________

8 x 8 Video Crosspoint Switch

ELECTRICAL CHARACTERISTICS

(V+ = 5.0V, V- = -5.0V, -1.3V ≤ VIN≤ +1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V, TA= +25°C,
unless otherwise noted.)

PARAMETER CONDITIONS MIN TYP MAX UNITS

DYNAMIC SPECIFICATIONS (Note 1)

X
Output-Buffer Slew Rate
Single-Channel Crosstalk 5MHz, VIN= 2V
All-Channel Crosstalk 5MHz, VIN= 2V
All-Channel Off Isolation 5MHz, VIN= 2V

-3dB Bandwidth 10pF load, VIN= 2V
Differential Phase Error (Note 4) 1.0 deg
Differential Gain Error (Note 4) 0.5 %
Input Noise DC to 40MHz 0.3 1.0 mV
Input Capacitance All buffer inputs grounded 6 pF

Buffer Input Capacitance
Output Capacitance Output buffer off 7 pF

Internal load resistors on, 10pF load 250 V/µs

(Note 2) 60 70 dB

P-P

(Notes 2, 3) 57 dB

P-P

(Note 2) 80 dB

P-P

(Note 2) 25 35 MHz

P-P

RMS

Additional capacitance for each out­put buffer connected to channel input

2 pF

SWITCHING CHARACTERISTICS (Note 1)

(Figure 4, V+ = 5.0V, V- = -5.0V, -1.3V ≤ VIN≤ +1.3V, LOAD = +5V, internal load resistors on, AGND = DGND = 0V,
TA = T

Note 1: Guaranteed by design.
Note 2: See
Note 3: 3dB typical crosstalk improvement when R
Note 4: Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of

to T

MIN

Chip-Enable to Write Setup t
Write Pulse Width High t
Write Pulse Width Low t

Data Setup t
Data Hold t

Latch Pulse Width t
Latch Delay
Switch Break-Before-Make Delay t

LATCH Edge to Switch Off t

LATCH Edge to Switch On t

, unless otherwise noted.)

MAX

PARAMETER

Dynamic Test Circuits

video-signal amplitude developed by the International Radio Engineers. 140IRE = 1.0V.

SYMBOL MIN TYP MAX

CE

WH

WL

DS

DH

L

t

D

ON - tOFF

OFF

ON

on page 11.

CONDITIONS

Parallel mode
32-bit serial mode

LATCH on

= 0Ω.

S

UNITS

0 ns
80 ns
80 ns

240
160

0 ns
80 ns
80

15 ns
35 ns
50 ns

ns

ns

MAX456

_______________________________________________________________________________________ 3

8 x 8 Video Crosspoint Switch

______________________________________________________________Pin Description

PIN

DIP PLCC

— 1, 12, 23, 34 N.C. No connect. Not internally connected.

1 2 D1/SER OUT

MAX456

2 3 D0/SER IN

3, 4, 6 4, 5, 7 A2, A1, A0 Output Buffer Address Lines

5, 7, 9, 11,

13, 15, 17, 19

8 9 LOAD

10, 12 11, 14 DGND

14 16 EDGE/–L—E—V—E—L

16, 26, 40 18, 29, 44 V+

18 20 SER/P—A—R

20, 34 22, 38 V-

21 24 WR

22 25 LATCH

23 26 C—E
24 27 CE

25, 27, 29, 31,

33, 35, 37, 39

28, 30, 32 31, 33, 36 AGND

36 40 D3

38 42 D2

Note 1: Buffer inputs are internally grounded with a 1000 or 1001 command from the D3-D0 lines. AGND must be at 0.0V since the

gain setting resistors of the buffers are internally tied to AGND.

6, 8, 10, 13,

15, 17, 19, 21

28, 30, 32, 35,

37, 39, 41, 43

NAME FUNCTION

Parallel Data Bit D1 when SER/P—A—R–= 0V. Serial Output for cascading
multiple parts when SER/P—A—R–= 5V.

Parallel Data Bit D0 when SER/P—A—R–= 0V. A Serial Input when
SER/P—A—R–= 5V.

IN0–IN7 Video lnput Lines

Asynchronous control line. When LOAD = 1, all the 400Ω internal active
loads are on. When LOAD = 0, external 400Ω loads must be used. The
buffers MUST have a resistive load to maintain stability.

Digital Ground Pins. Both DGND pins must have the same potential and
be bypassed to AGND. DGND should be within ±0.3V of AGND.

When this control line is high, the 2nd-rank registers are loaded with the
rising edge of the LATCH line. If this control line is low, the 2nd-rank reg-

–

isters are transparant when LATCH is low, passing data directly from the
1st-rank registers to the decoders.

All V+ pins must be tied to each other and bypassed to AGND
separately (Figure 2).

–

5V = 32-Bit Serial, 0V = 7-Bit Parallel
Both V- pins must be tied to each other and bypassed to AGND

separately (Figure 2).
WRITE in the serial mode, shifts data in. In the parallel mode, WR loads

data into the 1st-rank registers. Data is latched on the rising edge.
If EDGE/–L—E—V—E—L–= 5V, data is loaded from the 1st-rank registers to the 2nd-

rank registers on the rising edge of LATCH. If EDGE/–L—E—V—E—L–= 0V, data is
loaded while LATCH = 0V. In addition, data is loaded during the execution
of parallel-mode functions 1011 through 1110, or if LATCH = 5V during the
execution of the parallel-mode "software-LATCH" command (1111).

–

OUT7-OUT0 Output Buffers 7-0 (Note 1)

–C—h—i—p— —E—n—a—b—l—e–
Chip Enable. When –C—E–= 0V and CE = 5V, the WR line is enabled.

Analog Ground must be at 0.0V since the gain resistors of the buffers are
tied to these 3 pins.

Parallel Data Bit D3 when SER/ –P—A—R–= 0V. When D3 = 0V, D0-D2 specifies
the input channel to be connected to buffer. When D3 = 5V, then D0-D2
specify control codes. D3 is not used when SER/–P—A—R–= 5V.

Parallel Data Bit D2 when SER/–P—A—R–= 0V. Not used when
SER/–P—A—R–= 5V.

. When–C—E–= 0V and CE = 5V, the WR line is enabled.

4 _______________________________________________________________________________________

8 x 8 Video Crosspoint Switch

_______________Detailed Description

Output Buffers

The MAX456 video crosspoint switch consists of 64
T-switches in an 8 x 8 grid (Figure 1). The 8 matrix out­puts are followed by 8 wideband buffers optimized for
driving 400Ω and 20pF loads. Each buffer has an
internal active load on the output that can be readily
shut off via the LOAD input (off when LOAD = 0V). The
shut-off is useful when two or more MAX456 circuits are
connected in parallel to create more input channels.
With more input channels, only one set of buffers can
be active and only one set of loads can be driven.
And, when active, the buffer must have either

1) an internal load, 2) the internal load of another buffer
in another MAX456, or 3) an external load.

Each MAX456 output can be disabled under logic con­trol. When a buffer is disabled, its output enters a high­impedance state. In multichip parallel applications, the
disable function prevents inactive outputs from loading
lines driven by other devices. Disabling the inactive
buffers reduces power consumption.

The MAX456 outputs connect easily to MAX470 quad,
gain-of-two buffers when 75Ω loads must be driven.

Power-On RESET

The MAX456 has an internal power-on reset (POR) cir­cuit that remains low for 5µs when power is applied.
POR also remains low if the total supply voltage is less
than 4V. The POR disables all buffer outputs at
power-up, but the switch matrix is not preset to any ini­tial condition. The desired switch state should be pro­grammed before the buffer outputs are enabled.

___________________Digital Interface

The desired switch state can be loaded in a 7-bit paral­lel-interface mode or 32-bit serial-interface mode (see
Table 3 and Figures 4-6). All action associated with the
WR line occurs on its rising edge. The same is true for
the LATCH line if EDGE/–L—E—V—E—L–is high. Otherwise, the
second-rank registers update while LATCH is low
(when EDGE/–L—E—V—E—L–is low). WR is logically ANDed with
CE and –C—E–to allow active-high or active-low chip
enable.

7-Bit Parallel Mode

In the parallel-interface mode, the 7 data bits A2-A0
and D3-D0 specify an output channel (A2-A0) and the
input channel to which it connects (D3-D0). The data is
loaded on the rising edge of WR. The 8 input channels
are selected by 0000 through 0111 (D3-D0). The
remaining 8 codes (1000-1111) control other MAX456
functions, as listed in Table 1.

32-Bit Serial-Interface Mode

In serial mode (SER/–P—A—R–= high), all first-rank registers
are loaded with data, making it unnecessary to specify
an output address (A2, A1, A0). The input data format
is D3-D0, starting with OUT0 and ending with OUT7 for
32 total bits. Only codes 0000 through 1010 are valid.
Code 1010 disables a buffer, while code 1001 enables
it. After data is shifted into the 32-bit first-rank register,
it is transferred to the second rank by the LATCH line
(see Table 2).

MAX456

_______________________________________________________________________________________ 5

8 x 8 Video Crosspoint Switch

Table 1. Parallel-Interface Mode Functions

A2-A0 D3-D0 FUNCTION

0000 to 0111 Connect the buffer selected by A2-A0 to the input channel selected by D3-D0.

MAX456

1000

1011 Shut off the buffer selected by A2-A0, and retain 2nd-rank contents.

Selects

Output
Buffer,

OUT0

to

OUT7

Table 2. Serial-Interface Mode Functions

D3-D0 FUNCTION

1100 Turn on the buffer selected by A2-A0, or restore the previously connected channel.

1101 Turn off all buffers, or leave 2nd-rank registers unchanged.

1110 Turn on all buffers, or restore the previously connected channels.

1111

1001 and 1010

Connect the buffer selected by A2-A0 to DGND. Note, if the buffer output is on, its output
is its offset voltage.

Send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rank
registers. When latch is held high, this "software-LATCH" command performs the same
function as pulsing LATCH low.

Do not use these codes in the parallel-interface mode. These codes are for the serial­interface mode only.

0000 to 0111

1000

1001

1010

1011 to 1111

6 _______________________________________________________________________________________

Connect the selected buffer to the input
channel selected by D3-D0.

Connect the input of the selected buffer to
GND. Note, if the buffer output remains
on, its input is its offset voltage.

Turn on the selected buffer and connect
its input to GND. Use this code to turn on
buffers after power is applied. The default
power-up state is all buffers disabled.

Shut off the selected buffer at the speci­fied channel, and erase data stored in the
2nd rank of registers. The 2nd rank now
holds the command word 1010.

Do not use these codes in the serial-inter­face mode. They inhibit the latching of the
2nd-rank registers, which prevents proper
data loading.

IN0

IN1 IN2 IN3

8 x 8 Video Crosspoint Switch

IN4 IN5

IN6 IN7

OUTPUT

BUFFERS

MAX456

SER/PAR

A0

Figure 1. MAX456 Functional Diagram

A1

D0/SER IN

MAX456

8 x 8

SWITCH

MATRIX

A2



2nd-RANK REGISTERS

1st-RANK REGISTERS

D3

D2

D1/SER OUT

A = 1

A = 1

LATCH

EDGE/LEVEL

WR
CE

CE

V-

AGND

DGND

V+

OUT0

400Ω

LOAD

OUT7

400Ω

Table 3. Input/Output Line Configurations

SERIAL/

PARALLEL

H X

L

L

Note : X = Don't Care, H = 5V, L = 0V

D3

D2

X

H

L

Parallel

Input

Parallel

Input

D1

Serial

Output

Parallel

Input

Parallel

Input

_______________________________________________________________________________________ 7

D0

Serial Input

Parallel

Input

Parallel

Input

A2-A0

X

Output

Buffer

Address

Output

Buffer

Address

COMMENT

32-Bit Serial Mode

Parallel Mode,
D0-D2 = Control Code

Parallel Mode,
D0-D2 = Input Address

8 x 8 Video Crosspoint Switch

________________Typical Application

Figure 2 shows a typical application of the MAX456 with
MAX470 quad, gain-of-two buffers at the outputs to
drive 75Ω loads. This application shows the MAX456
digital-switch control interface set up in the 7-bit paral­lel mode. The MAX456 uses 7 data lines and 2 control
lines (WR and LATCH). Two additional lines may be

MAX456

needed to control CE and LOAD when using multiple
MAX456s.

The input/output information is presented to the chip at
A2-A0 and D3-D0 by a parallel printer port. The data is
stored in the 1st-rank registers on the rising edge of
WR. When the LATCH line goes high, the switch con­figuration is loaded into the 2nd-rank registers, and all 8
outputs enter the new configuration at the same time.

CHANNELS

14

18
19
20

21
22
23
24
25

8-INPUT

VIDEO

DB-25

5

IN0

7

IN1

9

IN2

11

IN3

13

IN4

15

IN5

17

IN6

19

IN7

22
21

2

1
38
36

6

4

3

LATCH
WR

D0/SER IN
D1/SER OUT
D2
D3
A0
A1
A2

1
2
3

4
5

6

7
8

MAX456

EDGE/LEVEL

OUT0

OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7

LOAD

AGND
DGND

SER/PAR

CE

CE

V+

V+
V+

V­V-

39

37
35
33

31
29
27

25

24

14

8
40
26

28, 30, 32
10, 12

20
34
23
18
16

Each 7-bit word updates only one output buffer at a
time. If several buffers are to be updated, the data is
individually loaded into the 1st-rank registers. Then, a
single LATCH pulse is used to reconfigure all channels
simultaneously.

The short Basic program in Figure 3 loads programming
data into the MAX456 from any IBM PC or compatible.
It uses the computer’s “LPT1” output to interface to the
circuit, then automatically finds the address for LPT1
and displays a table of valid input values to be used.
The program does not keep track of previous com­mands, but it does display the last data sent to LPT1,
which is written and latched with each transmission.

MAX470

IN0 OUT0

1

3

IN1

6

IN2

8

IN3

V+ GND V-

10 2,7,15 4,5,12,13

+5V

+5V

A

V

OUT1
OUT2
OUT3

16

= 2

14
11
9

-5V

75Ω

75Ω

-5V

ALL BYPASS CAPACITORS 0.1µF CERAMIC

Figure 2. Typical Application Circuit

8 _______________________________________________________________________________________

8 x 8 Video Crosspoint Switch

Figure 3. BASIC Program for Loading Data into the MAX456 from a PC Using Figure 2's Circuit

MAX456

____________________________________________________________Timing Diagrams

A0-A2

D0-D3

WR

LATCH

Figure 4. Write Timing for Serial- and Parallel-Interface Modes

_______________________________________________________________________________________ 9

VALID DATA N-1 VALID DATA N

t

DS

t

WL

t

DH

t

WH

t

D

t

L

8 x 8 Video Crosspoint Switch

_______________________________________________Timing Diagrams (continued)

SEE FIGURE 4 FOR WR

AND LATCH TIMING

DATA (N) DATA (N + 1) DATA (N + 2)

MAX456

FIRST-RANK REGISTER DATA

SECOND-RANK REGISTER DATA

SECOND-RANK REGISTER DATA

(EDGE/LEVEL = Low)

(EDGE/LEVEL = High)

WR

LATCH

Figure 5. Parallel-Interface Mode Format (SER/–P—A—R–= Low)

SEE TABLE 2 FOR

INPUT DATA

SEE FIGURE 4 FOR WR

AND LATCH TIMING

LATCH

WR

INPUT DATA FOR OUT0

0D3 0D2 0D1 0D0 1D3 1D2 7D3 7D2 7D1 7D0

DATA (N)

DATA (N)

INPUT DATA FOR OUT1 TO OUT6

DATA (N + 1)

DATA (N)

DATA (N + 2)

DATA (N + 1)

DATA (N + 1)

INPUT DATA FOR OUT7

SECOND-RANK REGISTER DATA

(EDGE/LEVEL = Low)

SECOND-RANK REGISTER DATA

(EDGE/LEVEL = High)

Figure 6. 32-Bit Serial-Mode Interface Format (SER/–P—A—R–= High)

10 ______________________________________________________________________________________

DATA VALID

DATA VALID

8 x 8 Video Crosspoint Switch

_______________________________________________________Dynamic Test Circuits

IN0

IN1
IN2
IN3
IN4
IN5
IN6
IN7

V

= 2Vp-p @ 5MHz

IN

= 75Ω

R

S

IN0

IN1
IN2

IN3
IN4
IN5

IN6

IN7

MAX456

MAX456

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5

OUT6
OUT7

LOAD

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5

OUT6
OUT7

LOAD

+5V

+5V

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

75Ω

IN0
IN1

IN2
IN3
IN4
IN5
IN6
IN7

VIN = 2Vp-p, SWEEP FREQUENCY
R

= 75Ω

S

-

3dB Bandwidth (Notes 1-4) All-Channel Off Isolation (Notes 1, 5-8)

IN0
IN1

IN2

75Ω

7x

IN3
IN4
IN5
IN6
IN7

MAX456

MAX456

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5

OUT6
OUT7

LOAD

OUT0
OUT1
OUT2
OUT3
OUT4
OUT5

OUT6
OUT7

LOAD

V
V
V
V
V
V
V
V

+5V

V

+5V

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT

MAX456

V

= 2Vp-p @ 5MHz

IN

= 75Ω

R

S

VIN = 2Vp-p @ 5MHz

= 75Ω

R

S

All-Channel Crosstalk (Notes 1, 5, 9, 11, 12)Single-Channel Crosstalk (Notes 1, 5, 9-11)

Note 1: Connect LOAD (pin 8) to +5V (internal 400Ω loads on at all outputs).
Note 2: Program any one input to connect to any one output (see Table 1 or 2 for programming codes).
Note 3: Turn on buffer at the selected output (see Table 1 or 2).
Note 4: Drive the selected input with V
Note 5: Program each numbered input to connect to the same numbered output (IN0 to OUT0, IN1 to OUT1, etc.).

, and measure V

IN

at the -3dB frequency at the selected output.

OUT

See Table 1 or 2 for programming codes.

Note 6: Turn off all output buffers (see Table 1 or 2).
Note 7: Drive all inputs with V
Note 8: Isolation (in dB) = 20log
Note 9: Turn on all output buffers (see Table 1 or 2).
Note 10: Drive any one input with V
Note 11: Crosstalk (in dB) = 20log
Note 12: Drive all but one input with V

and measure V

IN

10(VOUT/VIN

and measure V

IN

10(VOUT/VIN

and measure V

IN

OUT

).

).

at any output.

at any undriven output.

OUT

at the undriven output.

OUT

______________________________________________________________________________________ 11

8 x 8 Video Crosspoint Switch

____Pin Configurations (continued)

TOP VIEW

IN0

MAX456

A0

7

IN1

8

LOAD

9

10

IN2

DGND

11
12

N.C.

13

IN3

14

DGND

15

IN4

EDGE/LEVEL

IN5

16
17

A1A2D0/SER IN

6

19

V+

IN6

20

SER/PAR

21 2218

IN7

D1/SER OUT

1234540414243

MAX456

23

V-

PLCC

N.C.V+OUT0D2OUT1

44

26

LATCH

28

27

CE

CE

N.C.

24

25

WR

D3

OUT7

__Ordering Information (continued)

PIN-PACKAGETEMP. RANGEPART

40 Plastic DIP-40°C to +85°CMAX456EPL
44 PLCC-40°C to +85°CMAX456EQH
40 CERDIP -40°C to +85°CMAX456EJL

39

OUT2

38

V-

37

OUT3

36

AGND

35

OUT4

34

N.C.

33

AGND

32

OUT5

31

AGND

30

OUT6

29

V+

___________________Chip Topography

IN5

EDGE/LEVEL

IN4

DGND

IN2

LOAD

IN1

OUT3

AGND

V-

AO

OUT2

IN0
A1
A2
D0/SER IN
D1/SER OUT

V+
OUT0

D2
OUT1
D3

0.167"

(4.242mm)

SER/PAR

LATCH

OUT7

V+
IN6

IN7

WR

CE
CE

DGND

IN3

V-

V+

OUT5

OUT6

OUT4

AGND

AGND

0.184"

(4.674mm)

TRANSISTOR COUNT: 3820;
SUBSTRATE CONNECTED TO V+.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

12

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© 1994 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.