The MAX44268 is an ultra-small and low-power dual
comparator ideal for battery-powered applications such
as cell phones, notebooks, and portable medical devices
that have extremely aggressive board space and power
constraints. The comparator is available in a miniature
1.3mm x 1.3mm, 9-bump WLP package, making it the
industry’s smallest dual comparator.
The IC can be powered from supply rails as low as 1.8V
and up to 5.5V. It also features a 1.236V ±1% reference
and a 0.7µA typical supply current per comparator. It has
a rail-to-rail input structure and a unique output stage that
limits supply current surges while switching. This design
also minimizes overall power consumption under dynamic conditions. The IC has open-drain outputs, making it
suitable for mixed voltage systems. The IC also features
internal filtering to provide high RF immunity. It operates
over a -40°C to +85°C temperature.
Applications
Smartphones
Notebooks
Two-Cell Battery-Powered Devices
Battery-Operated Sensors
Ultra-Low-Power Systems
Portable Medical Mobile Accessories
Features
S Ultra-Low Power Consumption
0.7µA per Comparator
SUltra-Small 1.3mm x 1.3mm WLP Package
SInternal 1.236V ±1% Reference
SGuaranteed Operation Down to VCC = 1.8V
SInput Common-Mode Voltage Range Extends
200mV Beyond-the-Rails
S6V Tolerant Inputs Independent of Supply
SOpen-Drain Outputs
SInternal Filters Enhance RF Immunity
SCrowbar-Current-Free Switching
SInternal Hysteresis for Clean Switching
SNo Output Phase Reversal for Overdriven Inputs
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX44268.related.
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Continuous Input Current into Any Pin ............................ Q20mA
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VCC = 5V, V
unless otherwise noted.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC CHARACTERISTICS
Input-Referred HysteresisV
Input Offset VoltageV
Input Bias Current I
Output-Voltage Swing
Low
Input Voltage Range V
Output Short-Circuit
Current
Output Leakage CurrentI
GND
= 0V, V
IN-
= V
= 1.236V, R
IN+
HYS
OS
B
V
OL
CM
I
SC
LEAK
= 100kI to VCC, TA = -40NC to +85NC. Typical values are at TA = +25NC,
Note 2: All devices are 100% production tested at TA = +25NC. Temperature limits are guaranteed by design.
Note 3: Hysteresis is the input voltage difference between the two switching points.
Note 4: VOS is the average of the positive and negative trip points minus V
Note 5: Overdrive is defined as the voltage above or below the switching points.
GND
= 0V, V
IN-
= V
= 1.236V, R
IN+
Input overdrive = Q100mV, VCC = 5V
Input overdrive = Q100mV, VCC = 1.8V
t
PHL
t
PLH
F
CC
PSRRVCC = 1.8V to 5.5V6080dB
I
CC
ON
REF
TC
VREF
e
N
δV
/δV
REF
δV
/δI
REF
Input overdrive = 100mV, VCC = 1.8V,
Comparator A
Input overdrive = Q20mV, VCC = 5V
Input overdrive = Q20mV, VCC = 1.8V
Input overdrive = Q100mV, VCC = 5V
Input overdrive = Q100mV, VCC = 1.8V
Input overdrive = Q20mV, VCC = 5V
Input overdrive = Q20mV, VCC = 1.8V
C
LOAD
Guaranteed from PSRR tests1.85.5V
VCC = 1.8V, TA = +25NC
VCC = 5V, -40NC P TA P +85NC
TA = +25NC, 1%
-40NC < TA < +85NC
TA = +25NC, 1%
10Hz to 1kHz, C
10Hz to 6kHz, C
CCVCC
0 < I
OUT
= 100kI to VCC, TA = -40NC to +85NC. Typical values are at TA = +25NC,
The MAX44268 is a general-purpose dual comparator for
battery-powered devices where area, power, and cost
constraints are crucial. The IC can operate with a low
1.8V supply rail typically consuming 0.7µA quiescent current per comparator. This makes it ideal for mobile and
very low-power applications. The IC’s common-mode
input voltage range extends 200mV beyond-the-rails. An
internal 4mV hysteresis ensures clean output switching,
even with slow-moving input signals.
Input Stage Structure
The input common-mode voltage range extends from
(V
- 0.2V) to (VCC + 0.2V). The comparator operates
GND
at any different input voltage within these limits with low
input bias current. Input bias current is typically 0.15nA if
the input voltage is between the supply rails. The device
also features a 1.236V reference voltage output on the
inverting input of comparator A.
The IC features a unique input ESD structure that can
handle voltages from -0.3V to +6V independent of supply
voltage. This allows for the device to be powered down
with a signal still present on the input without damaging the part. This feature is useful in applications where
one of the inputs has transient spikes that exceed the
supply rails.
No Output Phase Reversal
for Overdriven Inputs
The IC’s design is optimized to prevent output phase
reversal if both the inputs are within the input commonmode voltage range. If one of the inputs is outside the
input common-mode voltage range, then output phase
reversal does not occur as long as the other input is
kept within the valid input common-mode voltage range.
This behavior is shown in the No Output Phase Reversal
graph in the Typical Operating Characteristics section.
Open-Drain Output
The IC features an open-drain output, enabling greater
control of speed and power consumption in the circuit
design. The output logic level is also independent from
the input, allowing for simple level translation.
RF Immunity
The IC has very high RF immunity due to on-chip filtering
of RF sensitive nodes. This allows the IC to hold its output
state even in the presence of high amounts of RF noise.
This improved RF immunity makes the IC ideal for mobile
wireless devices.
Applications Information
Hysteresis
Many comparators oscillate in the linear region of operation because of noise or undesired parasitic feedback.
This tends to occur when the voltage on one input is
equal or very close to the voltage on the other input.
The hysteresis in a comparator creates two trip points:
one for the rising input voltage and one for the falling input
voltage (Figure 1). The difference between the trip points
is the hysteresis. When the comparator’s input voltages
are equal and the output trips, the hysteresis effectively
causes one comparator input to move quickly past the
other. This takes the input out of the region where oscillation occurs. This provides clean output transitions for
noisy, slow-moving input signals. The IC has an internal
hysteresis of 4mV. Additional hysteresis can be generated with three resistors using positive feedback (Figure 2).
IN+
IN-
V
HYST
OUT
Figure 1. Threshold Hysteresis Band (Not to Scale)
R2
V
IN
R4
Figure 2. Adding Hysteresis with External Resistors
Use the following procedure to calculate resistor values.
1) Select R3. Input bias current at IN_+ is less than
15nA. To minimize errors caused by the input bias
current, the current through R3 should be at least
1.5µA. Current through R3 at the trip point is (V
V
)/R3. Considering the two possible output states
OUT
REF
-
in solving for R3 yields two formulas:
R3 = V
/IR3 and R3 = [(VCC - V
REF
)/IR3] - R1
REF
Use the smaller of the two resulting resistor values.
For example, for VCC = 5V, IR3 = -1.5µA, R1 =
200kI, and a V
= 1.236V, the two resistor values
REF
are 827kI and 1.5MI. Therefore, for R3 choose the
standard value of 825kI.
2) Choose the hysteresis band required (VHB). In this
example, the VHB = 50mV.
3) Calculate R2 according to the following equation:
V
=+
R2(R1 R3 )
V
CC
HB
+
(V
REF
x R1) R 3
For this example, insert the value:
50mV
R2 (200k0.825M )9.67k
=Ω+Ω=Ω
5.3
For this example, choose standard value R2 = 9.76kI.
4) Choose the trip point for VIN rising (V
) in such a
THR
way that:
V
V V1
>+
THRREF
V
is the threshold voltage at which the com-
THR
parator switches its output from low to high, as V
HB
V
CC
IN
rises above the trip point. For this example, choose
V
= 3V.
THR
5) Calculate R4 as follows:
=
R4
V
THR
V
REF
==Ω
R46.93k
311
1.236V x 9.769.76825
1
11
--
x R2R2R3
1
--
For this example, choose a standard value of 6.98kI.
6) Verify the trip voltages and hysteresis as follows:
111
=++
VV
THRREF
=++
VV
THFREF
xR2
R2R3R4
111
x R2
R2R1 R3R4
R2
-x
R1 R3
+
+
V
CC
The hysteresis network in Figure 2 can be simplified if the
reference voltage is chosen to be at midrail and the trip
points of the comparator are chosen to be symmetrical
about the reference voltage. Use the circuit in Figure 3
if the reference voltage can be designed to be at the
center of the hysteresis band. For the symmetrical case,
follow the same steps outlined in the paragraph above
to calculate the resistor values except that in this case,
resistor R4 approaches infinity (open). So in the previous example, using comparator B with V
V
= 2.525V and V
THR
= 2.475V then using the above
THF
REF
= 2.5V, if
formulas, results in R1 = 200kI, R2 = 9.09kI, and R3 =
825kI, R4 = not installed.
Logic-Level Translator
Due to the open-drain output of the IC, the device can
translate between two different logic levels (Figure 4). If
the internal 4mV hysteresis is not sufficient, then external
resistors can be added to increase the hysteresis as
shown in Figure 2 and Figure 3.
V
CC
R3
REF
R1
is at
R2
V
IN
V
REF
Figure 3. Simplified External Hysteresis Network if V
the Center of the Hysteresis Band
The IC can be used to make a power-on-reset circuit as
displayed in Figure 5. The negative input provides the
ratiometric reference with respect to the power supply
and is created by a simple resistive divider. Choose
reasonably large values to minimize the power consumption in the resistive divider. The positive input provides
the power-on delay time set by the time constant of the
RC circuit formed by R2 and C1. This simple circuit can
be used to power up the system in a known state after
ensuring that the power supply is stable. Diode D1 provides a rapid reset in the event of unexpected power loss.
If using comparator A, R3 and R4 are not populated and
REF settles in approximately 100µs.
Relaxation Oscillator
The IC can also be used to make a simple relaxation
oscillator (Figure 6) using comparator B. By adding the
RC circuit R5 and C1, a standard Schmidt Trigger circuit
referenced to a set voltage is converted into an astable
V
CC
V
PULL
MAX44268
V
IN
V
REF
R1
OUT
multivibrator. As shown in Figure 7, IN- is a sawtooth
waveform with capacitor C1 alternately charging and
discharging through resistor R5. The external hysteresis
network formed by R1 to R4 defines the trip voltages as:
R3 x R4
R2R3 R2R4 R3R4
++
R4R5(R1 R2 R3)
R1R 3 R 4
+
++
++ +
R2(R1R3 R3R5 R1R5)
V
T_FALL
V
T_RISE
V
=
CC
V
=
CC
R4R5 (R1 R2 R3) R1R3R4
+++
Using the basic time domain equations for the charging
and discharging of an RC circuit, the logic-high time,
logic-low time, and frequency can be calculated as:
V
t
LOW
R5C1 ln
=
T_FALL
V
T_RISE
Since the comparator’s output is open drain, it goes to
high impedance corresponding to logic-high. So, when
the output is at logic-high, the C1 capacitor charges
through the resistor network formed by R1 to R5. An
accurate calculation of t
would have involved
HIGH
applying thevenin’s theorem to compute the equivalent
thevenin voltage (V
can
then be computed using the basic time domain equations for the charging RC circuit as:
The t
V-
HIGH
V
HIGH
THEVENIN
R(R2 R4) R3R1 R5
THEVENIN
THEVENIN
= ++
[]
V(R2 R4) R3
[]
CC
=+
(R2 R4) R3 R1R2 R4
x
(R2 R4) R3 R1
calculation can be simplified by selecting the
RC1 ln
=
t
THEVENIN
V-
THEVENIN
+
+++
R1
++
V
T_RISE
V
T_FALL
Vx R4
CC
component values in such a way that R3 >> R1 and R5
>> R1. This ensures that the output of the comparator
goes close to VCC when at logic-high (that is, V
~ VCC and R
THEVENIN
~ R5). With this selection, t
THEVENIN
HIGH
can be approximated as:
V-
V
T_RISE
t
HIGH
R5C1 ln
=
CC
V-
V
CC
T_FALL
The frequency of the relaxation oscillator is:
Window Detector Circuit
The IC is ideal for window detectors (undervoltage/overvoltage detectors). Typical Application Circuit shows a
simple window detector circuit. By changing the values
of R1, R2, and R3 different voltage threshold values can
be chosen. For this example, assume a single-cell Li+
battery with a 2.9V end-of-life charge, a peak charge of
4.2V, and a nominal value of 3.6V. OUTA provides an
active-low undervoltage indication, and OUTB provides
an active-low overvoltage indication. The open-drain outputs of both the comparators are wired ORed to give an
active-high power-good signal.
The design procedure is as follows:
1) Select R1. The input bias current into INB- is less than
15nA, so the current through R1 should exceed 1.5µA
for the thresholds to be accurate. In this example,
choose R1 = 825kI (1.236V/1.5µA).
2) Calculate R2 + R3. The overvoltage threshold should
be 4.2V when VIN is rising. The design equation is as
follows:
3) Calculate R2. The undervoltage threshold should be
2.9V when VIN is falling. The design equation is as
follows:
V
R2 (R1 R2 R3)x- R1
=++
825 1969 x 1.236/2.9 - 825
=+
()()
()
370k
=Ω
REF
V
UTH
For this example, choose a 374kI standard value 1%
resistor.
4) Calculate R3:
R3 (R2 R3) - R2
=+
1969k - 374k
=ΩΩ
=1.595M
Ω
For this example, choose a 1.58MI standard value 1%
resistor.
1.3mm x 1.3mm, Low-Power
Dual Comparator with Reference
Board Layout and Bypassing
Use 1.0FF bypass capacitors from VCC to GND. To maximize performance, minimize stray inductance by putting
this capacitor close to the VCC pin and reducing trace
lengths. Use 1nF bypass capacitors from REF/INA- to
GND as close as possible to the IC. Do not route noisy
traces near REF/INA-.
Jack Detect
The IC can be used to detect peripheral devices
connected to a circuit using comparator B. This includes
a simple jack-detect scheme for cell phone applications. Figure 8 shows how the device can be used in
conjunction with an external reference to detect an
accessory ID input. The open-drain output of
the devices allows the output logic level to be controlled independent of the peripheral device’s
making interfacing and controlling external devices
as simple as monitoring a few digital inputs on a
microcontroller or codec.
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains
to the package regardless of RoHS status.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 15