MAXIM MAX3945 User Manual

19-5144; Rev 0; 2/10

可提供评估板

1.0625Gbps至11.3Gbps、



MAX3945

电，优化用于光纤通道以及以太网发送系统，数据速率高
达

11.3Gbps

号进行限幅，产生
和输出
双通 道限幅放 大器带有可编程滤波器，能够针对不同数据
速率下的敏感度进行优化，抑制光学系统可能产生的驰豫
振荡。
个可编程时间屏蔽的

线数字接口减少了引脚数，无需外部器件即可实现

3

限、
接收

多速率、低功耗 限幅放 大器采用

。高灵敏度限幅放大器对互阻放大器产生的信

电平差分输出信号。所有差分输入

CML

都优化于

(I/O)

MAX3945

极性、

LOS

极性、Rx输入滤波器以及Rx去加重的控制。

(Rx)

集成了两路信号丢失

LOS

背向端接

50

Ω

输出。

LOS

模式、

传输线。

PCB

(LOS)

输出电平、输入失调修正、

CML

+3.3V

检测电路和一

MAX3945采用3mmx3mm、16引脚TQFN



1x/2x/4x/8xSFF/SFP/SFP+MSA
10GBASE-SR/LRSFP+

光收发器

光纤通道光收发器

电源供

MAX3945

LOS

封装。

概述

门

应用

10GPONONU



PART TEMP RANGE PIN-PACKAGE

MAX3945ETE+

表示无铅

+

*

EP=

典型应用电路在数据资料的最后给出。

(Pb)/符合RoHS

裸焊盘。

-40NC to +85NC

标准的封装。

定购信息

16 TQFN-EP*

SFP+

双通道限幅放大器



S

130mW

S

单模块设计兼容于

LR

S

采用10.32Gbps ROSA，在1.25Gbps

度为

S

RATE_SEL = 0

3GHz

S

支持SFF-8431 SFP+ MSA和SFF-8472

S

3.3V
130mW

S

3.3V
154mW

S

11.3Gbps

S

RATE_SEL = 1、11.3Gbps

S

RATE_SEL = 1、8.5Gbps

S

RATE_SEL = 0、BW1 = 1、BW0 = 1、4.25Gbps

下具有

S

RATE_SEL = 0、BW1 = 0、BW0 = 0、1.25Gbps

下具有

S

RATE_SEL = 1

S

RATE_SEL = 0

S

CML

S

可编程

S

CML

S

LOS

S

LOS

S

可调节

S

可选择基于Rx输入的

S

3

功耗支持低于1W的

1000BASE-SX/LX和10GBASE-SR/

标准

-25.3dBm

时，可选择

输入滤波器

供电并提供基于

供电并提供基于Rx输入的

5ps

9.0ps

输出具有电平调节和禁止模式

CML

输出极性选择

极性选择

输出带有可编程屏蔽时间

LOS触发/

速率下具有

DJ

P-P

DJ

P-P

时，具有

时，具有

输出去加重

清除电平

RSSI

4mV

LOS

线数字接口与

Maxim SFP+

模块设计

SFP+

下光信号检测灵敏

1GHz/2.1GHz/2.5GHz/

数字诊断

监测的

输入灵敏度

P-P

速率下具有

速率下具有

26ps

52ps

功能时，总功耗为

LOS

功能时，总功耗为

LOS

4ps

P-P

4ps

P-P

上升和下降时间

上升和下降时间

或基于

系列产品兼容

RSSI

监测的

DJ

DJ

LOS

特性

速率

速率

MAX3945

_______________________________________________________________ Maxim Integrated Products 1

本文是英文数据资料的译文，文中可能存在翻译上的不准确或错误。如需进一步确认，请在您的设计中参考英文资料。

有关价格、供货及订购信息，请联络
或访问

Maxim

的中文网站：

china.maxim-ic.com

Maxim

亚洲销售中心：

。

10800 852 1249 (

北中国区)，

10800 152 1249 (

南中国区)，

1.0625Gbps至11.3Gbps、
SFP+

双通道限幅放大器

ABSOLUTE MAXIMUM RATINGS

VCC ....................................................................... -0.3V to +4.0V

Voltage Range at SDA, SCL, CSEL,

LOS, CAZ, RPMIN ................................. -0.3V to (V

Voltage Range at ROUT+, ROUT- ........(V

Voltage Range at RIN+, RIN- ........ (V

Current Range Into LOS ...................................... -1mA to +5mA

Current Range Into SDA ..................................... -1mA to +1mA

MAX3945

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

- 2V) to (VCC + 0.3V)

CC

- 1.7V) to (VCC + 0.3V)

CC

+ 0.3V)

CC

Current Out of ROUT+, ROUT- ..........................................40mA

Continuous Power Dissipation (T

16-Pin TQFN (derate 14.7mW/NC above +70NC) ......... 1.176W

Operating Junction Temperature Range ......... -55NC to +150NC

Storage Temperature Range ............................ -65NC to +160NC

Lead Temperature (soldering, 10s) ................................+300NC

Soldering Temperature (reflow) ......................................+260NC

= +70NC)

A

ELECTRICAL CHARACTERISTICS

(VCC = 2.85V to 3.63V, CML receiver output is AC-coupled to differential 100I load, C
are set to default values, unless otherwise noted. Typical values are at V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUPPLY

Includes the CML output current,
V

DIFF_ROUT

Power-Supply Current I

Power-Supply Voltage V

Power-Supply Noise

GENERAL

Input Data Rate 1.06 10.32 11.3 Gbps
Input/Output SNR 14.1
BER 10E-12

POWER-ON RESET (POR)

POR Deassert Threshold 2.55 2.75 V
POR Assert Threshold 2.3 2.45 V

INPUT SPECIFICATIONS

Differential Input Resistance
RIN+/RIN-

Input Sensitivity
(Note 1)

Input Overload V

Input Return Loss

RPMIN Input-Current High I

CC

CC

R

IN_DIFF

V

INMIN

INMAX

SDD11

SCC11

IH

LOS1_EN = 1, LOS2_EN = 0

Includes the CML output current,
V

DIFF_ROUT

LOS1_EN = 0, LOS2_EN = 1

f < 10MHz 100
10MHz < f < 20MHz 10

RATE_SEL = 1, input transition time 25ps,

10.32Gbps, PRBS23-1 pattern

RATE_SEL = 0, input transition time 260ps,

1.25Gbps, K28.5 pattern

DUT is powered on, f P 5GHz
DUT is powered on, f P 16GHz
DUT is powered on, 1GHz < f P 5GHz
DUT is powered on, 1GHz < f P 16GHz

LOS1_EN = 0 and LOS2_EN = 1,
V

RPMIN

= 400mV

= 400mV

= 2V

= 3.3V, TA = +25NC, unless otherwise noted.)

CC

, RXDE_EN = 0,

P-P

, RXDE_EN = 0,

P-P

= 0.1FF, TA = -40NC to +85NC. Registers

CAZ

46.6 62

39.4 52.5

2.85 3.63 V

75 100 125

4 8

1 2

1.2 V
10

7

13

5

50 nA

mV

mV

mA

P-P

I

P-P

P-P

dB

dB

2 ______________________________________________________________________________________

1.0625Gbps至11.3Gbps、
SFP+

双通道限幅放大器

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 2.85V to 3.63V, CML receiver output is AC-coupled to differential 100I load, C
are set to default values, unless otherwise noted. Typical values are at V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

External RPMIN Filter Capacitor 100 pF

OUTPUT SPECIFICATIONS

Differential Output Resistance
ROUT+/ROUT-

Output Return Loss

Differential Output-Voltage High

Differential Output-Voltage
Medium

SET_CML DAC Range 60 255 Decimal

Differential Output Signal When
Squelched (Note 1)

Data Output Transition Time
(20% to 80%) (Note 1)

TRANSFER CHARACTERISTICS

Deterministic Jitter
(Notes 1, 2)

R

OUTDIFF

SDD22

SCC22

t

R/tF

DJ

DUT is powered on, f P 5GHz
DUT is powered on, f P 16GHz
DUT is powered on, 1GHz < f P 5GHz
DUT is powered on, 1GHz < f P 16GHz

5mV

P VIN P 1200mV

P-P

SET_CML[7:0] = 169d (decimal)

10mV
SET_CML[7:0] = 181d

10mV
RATE_SEL = 1, SET_CML[7:0] = 91d

Outputs AC-coupled, SET_CML[7:0] =
181d, at 8.5Gbps, SQ_EN = 1

60mV
RATE_SEL = 1, V
RXDE_EN = 0, input transition time 25ps,
pattern 11110000

10mV
RATE_SEL = 0, V
input transition time 260ps, pattern 11110000

10mV
RATE_SEL = 1, V
RXDE_EN = 0, input transition time 28ps

60mV
RATE_SEL = 1, V
RXDE_EN = 0, input transition time 28ps

60mV
RATE_SEL = 1, V
RXDE_EN = 0, input transition time 28ps

10mV
RATE_SEL = 0, BW1 = 0, BW0 = 0,
V
time 260ps

10mV
RATE_SEL = 0, BW1 = 1, BW0 = 1,
V
time 28ps

P VIN P 1200mV, RATE_SEL = 1,

P-P

P VIN P 1200mV

P-P

P VIN P 400mV

P-P

DIFF_ROUT

P VIN P 1200mV

P-P

DIFF_ROUT

P VIN P 1200mV

P-P

DIFF_ROUT

P VIN P 400mV

P-P

DIFF_ROUT

P VIN P 400mV

P-P

DIFF_ROUT

P VIN P 1200mV

P-P

DIFF_ROUT

DIFF_ROUT

= 800mV

P VIN P 1200mV

P-P

= 800mV

= 3.3V, TA = +25NC, unless otherwise noted.)

CC

, RATE_SEL = 0,

P-P

P-P,

at 10.32Gbps,

P-P

= 400mV

at 1.25Gbps,

P-P

= 800mV

at 8.5Gbps,

P-P

= 400mV

at 10.32Gbps,

P-P

= 400mV

at 11.3Gbps,

P-P

= 400mV

at 1.25Gbps,

P-P

, input transition

P-P

at 4.25Gbps,

P-P

, input transition

P-P

= 0.1FF, TA = -40NC to +85NC. Registers

CAZ

75 100 125

13

7

10

6

595 800 1005

595 800 1005

300 400 515 mV

6 15 mV

,

P-P

P-P

P-P

P-P

P-P

,

,

,

,

26 35

52 90

4 8

4 9

4 9

9 30

5 10

mV

ps

I

dB

P-P

P-P

P-P

ps

P-P

MAX3945

_______________________________________________________________________________________ 3

1.0625Gbps至11.3Gbps、
SFP+

双通道限幅放大器

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 2.85V to 3.63V, CML receiver output is AC-coupled to differential 100I load, C
are set to default values, unless otherwise noted. Typical values are at V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Input = 60mV
Random Jitter
(Note 1)

MAX3945

Low-Frequency Cutoff
(Simulated Value)

Small-Signal Bandwidth
(Simulated Value)

Rx INPUT-BASED LOS SPECIFICATIONS (LOS1_EN = 1 and LOS2_EN = 0) (Note 1)

LOS Assert Sensitivity Range (Note 3) 14 77 mV
SET_LOS DAC Range 7 63 Decimal
LOS Hysteresis 10log(V
LOS Assert/Deassert Time (Note 4) 2.3 20 80
Low Assert Level
Low Deassert Level 14 18 22
Medium Assert Level
Medium Deassert Level 65 82 95
High Assert Level
High Deassert Level 127 158 182

LOS Output Masking Time
Range

LOS Output Masking DAC
Resolution

RSSI MONITOR-BASED LOS SPECIFICATIONS (LOS1_EN = 0 and LOS2_EN = 1) (Note 1)

LOS Assert Sensitivity Range (Note 5) 8.3 90 mV
SET_LOS DAC Range 4 63 Decimal
LOS Hysteresis 10log(V
LOS Assert/Deassert Time (Note 4) 2.3 20 80
Low Assert Level
Low Deassert Level 9.0 10.8 12.7
Medium Assert Level
Medium Deassert Level 77 85 92
High Assert Level
High Deassert Level 153 167 180

LOS Output Masking Time
Range

LOS Output Masking DAC
Resolution

RJ

f

3dB

RATE_SEL = 1, RXDE_EN = 0, input transi-

tion time 28ps, pattern 11110000,

V

DIFF_ROUT

RATE_SEL = 0, C

RATE_SEL = 1, C

RATE_SEL = 0, BW1 = 0, BW0 = 0 1.0

RATE_SEL = 0, BW1 = 0, BW0 = 1 2.1

RATE_SEL = 0, BW1 = 1, BW0 = 0 2.5

RATE_SEL = 0, BW1 = 1, BW0 = 1 3.0

RATE_SEL = 1 9

DEASSERT/VASSERT

SET_LOS[5:0] = 7d (Note 3)

SET_LOS[5:0] = 32d (Note 3)

SET_LOS[5:0] = 63d (Note 3)

SET_LOSTIMER[6:0] = 0d for minimum and

SET_LOSTIMER[6:0] = 127d for maximum

SET_LOSTIMER[6:0] = 1d to 127d 23 35 50

DEASSERT/VASSERT

SET_LOS[5:0] = 4d (Note 5)

SET_LOS[5:0] = 32d (Note 5)

SET_LOS[5:0] = 63d (Note 5)

SET_LOSTIMER[6:0] = 0d for minimum and

SET_LOSTIMER[6:0] = 127d for maximum

SET_LOSTIMER[6:0] = 1d to 127d 23 35 50

at 10.32Gbps,

P-P

= 800mV

CAZ

CAZ

= 3.3V, TA = +25NC, unless otherwise noted.)

CC

P-P

= 0.1FF
= 0.1FF

) 1.25 2.1 dB

) 1.25 2.1 dB

= 0.1FF, TA = -40NC to +85NC. Registers

CAZ

0.28 0.51 ps

2

0.7

8 11 14

39 49 58

77 96 112

0 2920

5.1 6.7 8.3

45 50 55

90 98 106

0 2920

kHz

GHz

mV

mV

mV

RMS

P-P

Fs

P-P

P-P

P-P

Fs

Fs

Fs

mV

mV

mV

Fs

Fs

4 ______________________________________________________________________________________

1.0625Gbps至11.3Gbps、
SFP+

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 2.85V to 3.63V, CML receiver output is AC-coupled to differential 100I load, C
are set to default values, unless otherwise noted. Typical values are at V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

OUTPUT LEVEL VOLTAGE DAC (SET_CML)

100I differential resistive load,
RXDE_EN = 0

Full-Scale Voltage V

Resolution

Integral Nonlinearity INL SET_CML[7:0] > 60d

LOS THRESHOLD VOLTAGE DAC (SET_LOS)

Full-Scale Voltage V

Resolution

Integral Nonlinearity INL SET_LOS[5:0] > 3d

CONTROL I/O SPECIFICATIONS

LOS Output High Voltage V

LOS Output Low Voltage V

3-WIRE DIGITAL I/O SPECIFICATIONS (SDA, CSEL, SCL)

Input High Voltage V
Input Low Voltage V
Input Hysteresis V

Input Leakage Current I

Output High Voltage V

Output Low Voltage V

3-WIRE DIGITAL INTERFACE TIMING CHARACTERISTICS (see Figure 5)

SCL Clock Frequency f
SCL Pulse-Width High t
SCL Pulse-Width Low t
SDA Setup Time t
SDA Hold Time t

SCL Rise to SDA Propagation
Time

CSEL Pulse-Width Low t

FS

FS

OH

OL

IH

IL

HYST

IL,IH

OH

OL

SCL

CH

CL

DS

DH

t

D

CSW

100I differential resistive load,
RATE_SEL = 1, RXDE_EN = 1, RXDE1 = 1,
RXDE0 = 1 (maximum deemphasis)

100I differential resistive load,
RXDE_EN = 0

100I differential resistive load,
RATE_SEL = 1, RXDE_EN = 1, RXDE1 = 1,
RXDE0 = 1 (maximum deemphasis)

LOS1_EN = 1, LOS2_EN = 0 96 mV
LOS1_EN = 0, LOS2_EN = 1 98 mV
LOS1_EN = 1, LOS2_EN = 0 1.52 mV
LOS1_EN = 0, LOS2_EN = 1 1.56 mV

R

= 4.7kI to 10kI to V

LOS

R

= 4.7kI to 10kI to V

LOS

VIN = 0V or VCC, internal pullup or
pulldown (75kI typ)

External pullup of 4.7kI to V

External pullup of 4.7kI to V

= 3.3V, TA = +25NC, unless otherwise noted.)

CC

CC

CC

CC

CC

双通道限幅放大器

= 0.1FF, TA = -40NC to +85NC. Registers

CAZ

1192

828

4.5

3.3

Q0.9

Q0.7

VCC -

0.5

0 0.4 V

2.0 V

0.082 V

VCC -

0.5

0 0.4 V

0 400 1000 kHz
500 ns
500 ns

100 ns
100 ns

500 ns

V

CC

CC

0.8 V

85

V

CC

5 ns

mV

mV

LSB

LSB

MAX3945

P-P

P-P

P-P

P-P

V

V

FA

V

_______________________________________________________________________________________ 5

1.0625Gbps至11.3Gbps、
SFP+

双通道限幅放大器

ELECTRICAL CHARACTERISTICS (continued)

(VCC = 2.85V to 3.63V, CML receiver output is AC-coupled to differential 100I load, C
are set to default values, unless otherwise noted. Typical values are at V

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

CSEL Leading Time Before the
First SCL Edge

MAX3945

CSEL Trailing Time After the Last
SCL Edge

SDA, SCL External Load C

Note 1: Guaranteed by design and characterization, T
Note 2: Deterministic jitter is measured with a repeating K28.5 pattern [00111110101100000101] for 1.25Gbps to 8.5Gbps data.

At 10.32Gbps and 11.3Gbps, a repeating K28.5 plus 59 0s and K28.5 plus 59 1s pattern is used. Deterministic jitter is
defined as the arithmetic sum of pulse-width distortion (PWD) and pattern-dependent jitter (PDJ).

Note 3: LOS1_EN = 1, data rates of 1.25Gbps to 8.5Gbps with K28.5 pattern, and 6.4GHz input filter. For data rates of 10.32Gbps

to 11.3Gbps, the input filter is 12.5GHz and the pattern is PRBS23-1.

Note 4: Measurement includes an input AC-coupling capacitor of 100nF and C

is switched between two amplitudes: Signal_ON and Signal_OFF.

1) Receiver operates at sensitivity level plus 1dB power penalty
a) Signal_OFF = 0
Signal_ON = (+8dB) + 10log(min_assert_level)
b) Signal_ON = (+1dB) + 10log(max_deassert_level)
Signal_OFF = 0

2) Receiver operates at overload
Signal_OFF = 0
Signal_ON = 1.2V
max_deassert_level and min_assert_level are measured for one SET_LOS setting
Note 5: LOS1_EN = 0, LOS2_EN = 1, DC voltage applied to the RPMIN input.

P-P

t

L

t

T

Total bus capacitance on one line with

B

4.7kI to V

CC

= -40NC to +95NC.

A

= 3.3V, TA = +25NC, unless otherwise noted.)

CC

CAZ

= 0.1FF, TA = -40NC to +85NC. Registers

CAZ

500 ns

500 ns

20 pF

of 100nF. The signal at the RIN or RPMIN input

6 ______________________________________________________________________________________

1.0625Gbps至11.3Gbps、

MAX3945 toc04

-21

SFP+



双通道限幅放大器

典型工作特性

(VCC = 3.3V, TA = +25NC, unless otherwise noted. Registers are set to default values, unless otherwise noted, and the 3-wire interface
is static during measurements.)

RECEIVE OUTPUT FROM OPTICAL SYSTEM,

10.32Gbps, OPTICAL INPUT -10dBm,
RXDE1 = 1, RXDE0 = 0

MAX3945 toc01

OPTICAL BER CURVES (NEC NR3312)

1.00E-01

1.00E-02

1.00E-03

1.00E-04

1.00E-05

1.00E-06

BER

1.00E-07

1.00E-08

1.00E-09

1.00E-10

1.00E-11

1.00E-12

-27

10.3Gbps, PRBS31, RATE_SEL = 1

8.5Gbps, PRBS9, RATE_SEL = 1

4.5Gbps, PRBS9, RATE_SEL = 1

4.5Gbps, PRBS9, RATE_SEL = 0,
BW1 = 1, BW0 = 1

1.25Gbps, PRBS9, RATE_SEL = 0,
BW1 = 1, BW0 = 1

1.25Gbps, PRBS9, RATE_SEL = 0, BW1 = 0, BW0 = 0

-22-23-26 -25 -24

AVERAGE POWER dBm (Er~12dB)

K28.5 PATTERN AT 8.5Gbps, SET_CML[7:0] = 148d,

RATE_SEL = 1, RXDE_EN = 0

MAX3945 toc07

RECEIVE OUTPUT FROM OPTICAL SYSTEM,

10.32Gbps, OPTICAL INPUT -15dBm,
RXDE1 = 1, RXDE0 = 0

MAX3945 toc02

K28.5 PATTERN AT 1.25Gbps,

SET_CML[7:0] = 169d,

RATE_SEL = 0, BW0 = 0, BW1 = 0

100mV/div

200ps/div

MAX3945 toc05

K28.5 PATTERN AT 10.3Gbps,

SET_CML[7:0] = 148d,

RATE_SEL = 1, RXDE_EN = 0

MAX3945 toc08

RECEIVE OUTPUT FROM OPTICAL SYSTEM,

10.32Gbps, OPTICAL INPUT -20dBm,
RXDE1 = 1, RXDE0 = 0

MAX3945 toc03

K28.5 PATTERN AT 4.25Gbps,

SET_CML[7:0] = 169d,

RATE_SEL = 0, BW0 = 1, BW1 = 1

100mV/div

50ps/div

MAX3945 toc06

K28.5 PATTERN AT 11.3Gbps,

SET_CML[7:0] = 148d,

RATE_SEL = 1, RXDE_EN = 0

MAX3945 toc09

MAX3945

P-P

100mV

20ps/div

P-P

100mV

18ps/div

P-P

100mV

18ps/div

_______________________________________________________________________________________ 7

1.0625Gbps至11.3Gbps、
SFP+



双通道限幅放大器

典型工作特性(续

(VCC = 3.3V, TA = +25NC, unless otherwise noted. Registers are set to default values, unless otherwise noted, and the 3-wire interface
is static during measurements.)

DEEMPHASIS VALUE

DIFFERENTIAL OUTPUT SIGNAL LEVEL

vs. SET_CML DAC SETTING

1200

)

P-P

MAX3945

1100

1000

900

800

700

600

500

DIFFERENTIAL OUTPUT AMPLITUDE (mV

400

RXDE1 = 0, RXDE0 = 0

RXDE1 = 0, RXDE0 = 1

RXDE1 = 1,
RXDE0 = 0

50 300

RSSI MONITOR-BASED LOS THRESHOLDS

(LOS1_EN = 0 AND LOS2_EN = 1)

180

160

140

120

100

80

60

LOS THRESHOLD (mV)

40

20

0

0 70

RXDE_EN = 0

RXDE1 = 1,
RXDE0 = 1

SET_CML DAC SETTING

DEASSERT

ASSERT

SET_LOS[5:0] DAC CODE

vs. SET_CML DAC SETTING

(RATE_SEL = 1)

MAX3945 toc10

250200100 150

6

RXDE1 = 0, RXDE0 = 1

4

RXDE1 = 0,
RXDE0 = 0

2

DEEMPHASIS LEVEL (dB)

RXDE_EN = 0

0

50 250

RXDE1 = 1, RXDE0 = 1

RXDE1 = 1, RXDE0 = 0

SET_CML DAC SETTING

MAX3945 toc11

200150100

LOS MASKING TIME vs. DAC SETTING

5000

MAX3945 toc13

4000

3000

2000

MASKING TIME (µs)

1000

605030 402010

0

0

SET_LOSTIMER[6:0] DAC CODE

MAX3945 toc14

12010080604020

Rx INPUT-BASED LOS THRESHOLD vs. DAC

CODE (LOS1_EN = 1 AND LOS2_EN = 0)

160

140

)

120

P-P

100

80

60

LOS THRESHOLD (mV

40

20

0

0 70

DEASSERT

ASSERT

SET_LOS[5:0] DAC CODE

DETERMINISTIC JITTER vs. INPUT AMPLITUDE AT 1.25Gbps

(K28.5 PATTERN, 933MHz INPUT FILTER)

25

RATE_SEL = 0, BW1 = 0, BW2 = 0

20

15

DJ (ps)

10

5

0 1200

SIGNAL AMPLITUDE (mV

1000800600400200

)

P-P

)

MAX3945 toc12

605010 20 30 40

MAX3945 toc15

DETERMINISTIC JITTER AT 10.32Gbps

(PRBS7 PATTERN WITH 100 CIDs, RATE_SEL = 1)

10

9

8

7

6

5

DJ (ps)

4

3

2

1

0

0 1200

INPUT SIGNAL AMPLITUDE (mV

1000800200 400 600

)

P-P

MAX3945 toc16

DETERMINISTIC JITTER vs. DATA RATE

(INPUT = 100mV

25

K28.5 PATTERN, RATE_SEL = 1

20

15

DJ (ps)

10

5

0

0 12

DJ WITH 100mV

ON POWER SUPPLY

DJ WITH NO NOISE ON POWER SUPPLY

DATA RATE (Gbps)

P-P

P-P

NOISE

)

963

POWER-SUPPLY CURRENT vs. TEMPERATURE

(SET_CML[7:0] = 91d)

80

70

MAX3945 toc17

60

LOS2_EN = 0 AND LOS1_EN = 1

50

40

POWER-SUPPLY CURRENT (mA)

30

20

-40 100

LOS2_EN = 1 AND LOS1_EN = 0

TEMPERATURE (°C)

8 ______________________________________________________________________________________

MAX3945 toc18

806040200-20