MAXIM MAX3816A Technical data

MAX3816A

I2C 2-Wire Extender for DDC in DVI,

HDMI, and VGA Interfaces

________________________________________________________________

Maxim Integrated Products

19-4109; Rev 0; 7/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

General Description

The MAX3816A DDC*/I2C extender automatically compensates for excess load capacitance of long DVI™, HDMI™, and VGA cables. A single MAX3816A placed at the display side of the link restores signal integrity bidirectionally for both DDC clock and data over 0 to 60 meters of cable.

The MAX3816A features compensation for cable capacitance with a guaranteed range up to 3000pF, typically beyond 5000pF. The MAX3816A detects statechange assertion by the logical “AND” of the source side and display side. It asserts the new state with a rail-to-rail slew-rate-limited driver capable of meeting I2C rise- and fall-time requirements under the full load of the cable. After assertion of the new state, a holdoff period of 2.5µs prevents a subsequent state change while the cable channel settles.

Under full load at 100kbps, the MAX3816A consumes 25mW, excluding pullup resistors. It is available in a 16-pin TSSOP package and operates from 0°C to +70°C.

Applications

Front-Projector DVI/HDMI Inputs

High-Definition Televisions, Displays, and Computer Monitors

DVI/HDMI Cable-Extender Modules and Active Cable Assemblies

Features

♦ DDC or I2C Cable Extension Up to 60 Meters at

100kbps for Both Clock and Data Channels

♦ Single-Sided Solution Requires Only One

MAX3816A at the Display Side

♦ Compensates for Cable Capacitance, 0 to 3000pF

Guaranteed (8x I2C Specification), or Beyond 5000pF Typical

♦ Parallel and Serial Operating Modes

♦ Prevents Ringing Due to Reflections by

Terminating Transmission Line Impedance After Transitions

♦ Use with MAX3815 TMDS®Equalizer to Form a

Complete Digital Video Extension Solution

♦ 3.0V to 5.5V Power Supply

♦ Optional Voltage Translation Between 5V Cable

DDC and 3.3V Display DDC Levels

Typical Application Circuit (Parallel Mode)

Ordering Information

Denotes a lead-free/RoHS-compliant package.

Pin Configuration appears at end of data sheet.

*DDC (Display Data Channel) is part of the VESA Standard. TMDS is a registered trademark of Silicon Image, Inc.

DVI is a trademark of Digital Display Working Group. HDMI is a trademark of HDMI Licensing, LLC.

LONG CABLE FROM VIDEO SOURCE:

DVI, HDMI, OR CAT-5 CABLE UP TO 60m

SHIELD GNDS

DDC +5V

DDC SCL

DDC SDA

DDC GND

(200ft)

47kΩ47kΩ

10μF

MAX3816ACUE+ 0°C to +70°C 16 TSSOP

5V*

MAX3816A

CLOCK_C

DATA_C

GND_REF

CABLE HEAD OR EXTENDER BOX

CLOCK_D

DATA_D

MODE

DRVR_EN

PART TEMP RANGE PIN-PACKAGE

CONNECTOR TO DISPLAY

DVI, HDMI, OR M1 CONNECTOR, < 3m

DDC +5V

DDC SCL

DDC SDA

VDD OR VSS (SEE DESCRIPTION)

DDC GND

SHIELD GNDS

*TO MEET DVI/HDMI SPECIFICATIONS FOR THE DDC +5V LINK, THE VDD SIDE OF THE MAX3816A MUST BE EXTERNALLY POWERED. IF NOT APPLICABLE, CONNECT TO DDC +5V.

MAX3816A

I2C 2-Wire Extender for DDC in DVI, HDMI, and VGA Interfaces

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VCC= +3.0V to +5.5V, VDD= +3.0V to +5.5V, TA= 0°C to +70°C. Typical values are at TA= +25°C, VCC= +5.0V, VDD= +3.3V, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Voltage Range (relative to VSS) at VDD, VCC,

CLOCK_D, DATA_D, CLOCK_C, DATA_C,

DRVR_EN, MODE ..................................................-0.5V to +6.0V

Continuous Power Dissipation (T

= +70°C)

(derate 11.1mW/°C above +70°C)..............................889mW

Voltage Range (relative to V

) at GND_REF .......-0.5V to +0.5V

Operating Junction Temperature (T

) Range ....-55°C to +150°C

Storage Ambient Temperature (T

) Range .......-40°C to +150°C

Electrostatic Discharge (ESD)

Human Body Model......................................................> ±3kV

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUP PLY

Supply Voltage VCC or V

Supply Current

Supply Noise Tolerance

CLOCK_C, DATA_C, CLOCK_D, DATA_D (Notes 2, 3)

Output-High Voltage V

Output-Low Voltage

High-to-Low Threshold V

Low-to-High Threshold V

Output-High-State Current Lim it Output in ramp-up mode for DATA_C 5.0 16.5 mA

HOLD

TRI GIH

TRI GIL

See the Applications Information section

(Note 1)

VCC = 5.5V, VDD = 5.5V, 100kbp s, 60pF load on cable, 10pF load on displa y, current into V

DC to 500kHz 100

DC to 60Hz (series mode) 700

Cable side (CLOCK_C, DATA_C) VCC - 0.1 V

Display side (CLOCK_D, DATA_D) VDD - 0.1 V

VOL achieved within 1μ s of negative transition (see Figure 1a, State 2)

After VOL is achieved, V the most positive leve l allowed if logic level is 0 and no other driver is asserting low on the same node (series mode)

Threshold u sed to detect high-to-low transition relative to supply (V side, V

Threshold u sed to detect low-tohigh transition relative to supply (V

for cable side, VDD for

display side)

HOLD

for display side)

for cable

Cable side

Display side

Cable side

Display side

3.0 5.5 V

1.3 3.0

4.3 7.0

0.2 0.4 V

12.5

17.5

P-P

% of

Supply

% of

Supply

% of

Supply

MAX3816A

I2C 2-Wire Extender for DDC in DVI,

HDMI, and VGA Interfaces

_______________________________________________________________________________________ 3

Note 1: While the MAX3816A is operable over the continuous range of 3.0V to 5.5V, the DDC application requires VCCconnection to

DDC +5V.

Note 2: All levels in the cable side clock and data I/O are referenced to GND_REF, unless otherwise noted. Note 3: All levels in the display side clock and data I/O are referenced to V

, unless otherwise noted.

Note 4: Rise time measured 30% to 70%; fall time measured 70% to 30%. Load range is 60pF to 3000pF on source side, and 10pF

to 400pF on display side. Pullup resistors are chosen to supply I

C maximum of 3mA when asserting low state.

ELECTRICAL CHARACTERISTICS (continued)

(VCC= +3.0V to +5.5V, VDD= +3.0V to +5.5V, TA= 0°C to +70°C. Typical values are at TA= +25°C, VCC= +5.0V, VDD= +3.3V, unless otherwise noted.)

ICC vs. V

MAX3816A toc01

VCC (V)

(mA)

5.255.004.75

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

4.50 5.50

100kbps DATA, 100kHz CLOCK, INCLUDES 3.3kΩ PULLUP RESISTORS

CABLE C

LOAD

= 3000pF

CABLE C

LOAD

= 60pF

IDD vs. V

MAX3816A toc02

VDD (V)

(mA)

5.04.54.03.5

3.0 5.5

100kbps DATA, 100kHz CLOCK, INCLUDES

3.3kΩ PULLUP RESISTORS FOR 5V SUPPLY RANGE AND 2.2kΩ PULLUP RESISTORS FOR

3.3V SUPPLY RANGE

DISPLAY C

LOAD

= 330pF

DISPLAY C

LOAD

= 10pF

MAX3816A toc03

1V/div

2μs/div

3.3kΩ PULLUP RESISTOR AT EACH END OF CABLE. PULLDOWN SOURCE: 25Ω CMOS SWITCH SIGNAL INITIATED AND MEASURED AT REMOTE SOURCE.

CLOCK_C TRANSIENT RESPONSE

WITH AND WITHOUT MAX3816A, 30m CABLE LOAD

(2350pF)

WITH

MAX3816A

WITHOUT MAX3816A

Typical Operating Characteristics

(VCC= +5.0V, V

= +3.3V, TA= +25°C, unless otherwise noted.)

Rise T ime (Note 4) t

Fal l Time (Note 4) t

Driver On-Time Driver asserting high or low 1750 ns

Driver Acti ve Termination Driver asserting high or low 60 

TRANSITION SENSING

Level-Sense Filter Delay Time to transition decision and assert 300 ns

Holdoff Time t

LVTTL/LVCMOS CONTROL INPUTS (DRVR_EN, MODE)

Input-High Voltage VIH 2.0 V

Input-Low Voltage VIL 0.8 V

Input-High Current IIH V

Input-Low Current IIL VIN < V

PARAMETER S YMBOL CONDITIONS MIN TYP MAX UNITS

3.0V to 3.6V supply 700 1000

4.5V to 5.5V supply 700

3.0V to 3.6V supply 200 300

4.5V to 5.5V supply 300

HOLDOFF

Data/clock sensing off during this period 2.5 μs

< VIN -1 +1 μA

IH(MIN)

-1 +1 μA

IL(MAX)

MAX3816A

I2C 2-Wire Extender for DDC in DVI, HDMI, and VGA Interfaces

4 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(VCC= +5.0V, V

= +3.3V, TA= +25°C, unless otherwise noted.)

MAX3816A toc04

1V/div

2μs/div

3.3kΩ PULLUP RESISTOR AT EACH END OF CABLE. PULLDOWN SOURCE: 25Ω CMOS SWITCH SIGNAL INITIATED AND MEASURED AT REMOTE SOURCE.

CLOCK_C TRANSIENT RESPONSE

WITH AND WITHOUT MAX3816A, 30m CABLE LOAD

(3100pF)

WITH

MAX3816A

WITHOUT MAX3816A

MAX3816A toc05

1V/div

2μs/div

3.3kΩ PULLUP RESISTOR AT EACH END OF CABLE. PULLDOWN SOURCE: 25Ω CMOS SWITCH SIGNAL INITIATED AND MEASURED AT REMOTE SOURCE.

CLOCK_C TRANSIENT RESPONSE

WITH AND WITHOUT MAX3816A, 60m CABLE LOAD

(4700pF)

WITH

MAX3816A

WITHOUT MAX3816A

MAX3816A toc06

1V/div

2μs/div

3.3kΩ PULLUP RESISTOR AT EACH END OF CABLE. PULLDOWN SOURCE: 25Ω CMOS SWITCH SIGNAL INITIATED AND MEASURED AT REMOTE SOURCE.

DATA_C TRANSIENT RESPONSE

WITH AND WITHOUT MAX3816A, 60m CABLE LOAD

(4700pF)

WITH

MAX3816A

WITHOUT MAX3816A

MAX3816A toc07

1V/div

2μs/div

PULLUP RESISTORS: TWO 3.3kΩ IN PARALLEL. PULLDOWN SOURCE: 25Ω CMOS SWITCH.

CLOCK_C TRANSIENT RESPONSE

WITH AND WITHOUT MAX3816A, 62pF CABLE LOAD

WITH MAX3816A

WITHOUT MAX3816A

CABLE SIDE TRANSITION TIME

vs. CABLE CAPACITANCE

MAX3816A toc08

CAPACITANCE (pF)

30% TO 70% RISE OR FALL (ns)

50004000300020001000

200

400

600

800

1000

1200

0 6000

VCC = 5V, 3.3kΩ PULLUP RESISTOR AT EACH END OF CABLE

RISE TIME

FALL TIME

MAX3816A

I2C 2-Wire Extender for DDC in DVI,

HDMI, and VGA Interfaces

_______________________________________________________________________________________ 5

Typical Operating Characteristics (continued)

(VCC= +5.0V, V

= +3.3V, TA= +25°C, unless otherwise noted.)

SERIES MODE TRANSIENT RESPONSE

(3000pF CABLE CAPACITANCE)

REFLECTION ABSORBED BY MAX3816A

VIDEO SOURCE

CLOCK

5V/div

VIDEO SOURCE

DATA

5V/div

DISPLAY CLOCK

5V/div

DISPLAY DATA

5V/div

(% OF SUPPLY VOLTAGE)

HOLD

2μs/div

50m CABLE ON SOURCE SIDE, 330pF CAPACITANCE ON DISPLAY SIDE, V DATA INITIATED AT VIDEO SOURCE AND MEASURED AT MAX3816A

HOLD

DISPLAY SIDE (REFERENCED

TO V

CABLE SIDE (REFERENCED

TO V

-0.6 0.6

= 5V, VDD = 5V CLOCK AND

vs. (VSS - GND_REF)

RELATIVE TO VSS)

RELATIVE TO GND_REF)

VSS - GND_REF (V)

0.40.2-0.4 -0.2 0

MAX3816A toc09

MAX3816A toc11

CLOCK_C AT

MAX3816A

2V/div

CLOCK_C AT

REMOTE CLIENT

2V/div

(% OF SUPPLY VOLTAGE)

TRIGIL

REFLECTION

ABERRATION AT

CLOCK_C PIN

NOT SEEN AT SOURCE

ACTUAL SIGNAL

AT VIDEO SOURCE

1μs/div

60m CABLE, SIGNAL INITIATED AT DISPLAY SIDE

vs. (VSS - GND_REF)

TRIGIL

DISPLAY SIDE

(REFERENCED TO V

-0.6 0.6 VSS - GND_REF (V)

)

CABLE SIDE

)

0.40.20-0.2-0.4

MAX3816A toc10

MAX3816A toc12

MAX3816A

I2C 2-Wire Extender for DDC in DVI, HDMI, and VGA Interfaces

6 _______________________________________________________________________________________

Pin Description

Theory of Operation

The MAX3816A has parallel and series modes. The parallel mode is preferred for applications where high tolerance to noncompliant source and sink devices is desired (noncompliant VOLfrom displays and noncompliant VIHfrom sources are common). Further, the parallel mode can be operated with other speed-up devices on the same bus, either active (DRVR_EN = HI) or in bypass (DRVR_EN = LO).

Series mode is preferred for applications where high tolerance to ground offset or noise between and source and sink is needed. Series mode also isolates display circuits from transmission line reflections in very long cables, providing full isolation between cable and display buses. For in-display applications, series mode can provide level shifting between the 5V cable DDC and 3.3V display internal DDC.

A single MAX3816A is applied at the display side of the video link to compensate for excessive cable capacitance. The overall operation of the MAX3816A, for

either the DATA or CLOCK signal, can be summarized as follows (Figures 1a and 1b).

1) High state. Drivers off. Level sensing on.

If no client device is controlling the “wired-AND” bus from either the source or display side, all device drivers are off and the bus (including the MAX3816A) is waiting in the high state. The pullup resistors on each side are holding the bus up to V

on the

source side and VDDon the display side.

2) High-to-low transition. Drivers assert low. Level

sensing off (Holdoff).

A change of state is initiated by any device driver pulling low. Once the signal transitions below 75% of the power supply, the MAX3816A drives both the source and display sides toward ground with a lowimpedance driver, level sensing is turned off, and the holdoff timer is started. The source side is pulled down to the level of the VSS. This is accomplished using a low-impedance n-channel buffer that is designed to drive a 1 meter (60pF) to 60

PIN NAME FUNCTION

1 DRVR_EN

2 V

3 CLOCK_C I2C Cable-Side Cloc k w ith Cable Dri ver, CMOS Input/Output. Connect a 47k pullup resistor to VCC.

4 GND_REF

5 DATA _C I2C Cable-Side Data with Cable Driver, CMOS Input/Output. Connect a 47k pullup resistor to VCC.

6 GND_REF Cable-Side Ground Return (Alternate). Connected internal ly to pin 4 above.

7 VCC Power Supply for Cable Side (Alternate). Connected internally to pin 2 above.

8, 9, 10 DNC Do Not Connect

11 VDD Power Supply for Display Side and Core Circuitry. Connect bypass capacitor as shown in Figure 6.

12 DATA _D

13 VSS Ground for Display Side and Core Circuitr y. Connect bypass capacitor s as s hown in Figure 6.

14 CLOCK_D

15 V

16 MODE

SS_T

Driver Enable Input, LVTTL/LVCMOS. Set h igh to enable all data and clock drivers for normal operation. Set low to disable drivers, permitting isolation of cable bus from disp lay bus.

Power Supply for Cable Side. In the DDC application, connect to DDC +5V. Connect 10μF or larger bypass capacitor as shown in Figure 6.

Cable-Side Ground Return. Connect directly to cable DDC ground wire. The MAX3816A circuitry use s the video source DDC GND as a threshold reference. Also connect 10μF or larger bypass capacitors as shown in Figure 6.

C Display-Side Data, CMOS Input/Output. Connect a 2.2k pullup res istor to VDD for VDD = 3.3V,

or a 3.3 k pullup resistor to V

C Display-Side Clock, CMOS Input/Output. Connect a 2.2k pullup resistor to VDD for VDD = 3.3V,

or a 3.3 k pullup resistor to V

Must Be Connected to VSS for Normal Operation

Mode Setting Input, LVTTL/LVCMOS. Force high for parallel mode (normal operation) and force low for serial operation.

for VDD = 5V.

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