General Description
The MAX3803 equalizer automatically provides compensation for transmission-medium losses encountered
with FR4 stripline and cable in an incredibly small 2mm
× 2.5mm package. It is ideal for backplane applications
requiring up to 40in between the line card and the
switch card or up to 10m of twin ax cable between
racks. Its small size provides placement and routing
flexibility. The CML inputs and outputs are DC-coupled
and can be terminated to a supply as low as +1.1V.
The MAX3803 operates from 0°C to +85°C and consumes 160mW at +3.3V.
Applications
Backplane Interconnect
Rack-to-Rack Interconnect
Common-Mode Voltage Translation
(LVDS, PECL, or CML)
Features
♦ DC-Coupled Input and Output to Terminations
as Low as +1.1V
♦ 2mm × 2.5mm UCSP
TM
♦ 1Gbps to 3.2Gbps Operating Range
♦ Spans 40in (1m) of FR4
♦ Spans 10m, 28AWG Twin Ax
♦ Receive Equalization to Reduce ISI
MAX3803
DC-Coupled, UCSP 3.125Gbps Equalizer
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
MAC
WITH
SERDES
Rx Tx
Tx Rx
+1.1V ≤ V ≤ V
CC
+3.3V
+1.1V ≤ V ≤ V
CC
SWITCH
ASIC
WITH
SERDES
Rx
Tx
+1.1V ≤ V ≤ V
CC
+1.1V ≤ V ≤ V
CC
2222
IN
V
TIVCC
+3.3V
V
CC
V
TO
OUT
OUT
V
TO
V
TI
IN
22 22
≤40in (1m)
FR4 STRIPLINE
FR4 STRIPLINE
PC BOARD
BACKPLANE
LINE CARD SWITCH CARD
MAX3803
MAX3803
Typical Application Circuit
19-2699; Rev 1; 6/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
UCSP is a trademark of Maxim Integrated Products, Inc.
PART TEMP RANGE PIN-PACKAGE
MAX3803
DC-Coupled, UCSP 3.125Gbps Equalizer
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC, VTI, and VTO..........................-0.5V to +6V
Continuous Output Current ...............................-25mA to +25mA
IN±, OUT±, EN............................................-0.5V to (V
CC
+ 0.5V)
Operating Ambient Temperature Range ................0°C to +85°C
Storage Ambient Temperature Range...............-55°C to +150°C
Supply Voltage V
CC
3.0 3.3 3.6 V
Input Termination Voltage V
TI
1.1
V
Output Termination Voltage V
TO
1.1
100Hz ≤ f < 1MHz 40Supply Noise Tolerance
1MHz ≤ f ≤ 2.5GHz 10
02585°C
Bit Rate NRZ data
CID Consecutive identical digits 100 bits
ELECTRICAL CHARACTERISTICS
(Typical values are at +3.3V and at TA= +25°C, unless otherwise noted. Specifications guaranteed over specified operating conditions.)
EN = high 45 67
Supply Current (Note 1)
EN = low 14 32
mA
Output Driver Supply Current (Note 2) 9 14 mA
Input Swing (Note 1)
Input Common-Mode Voltage
Range
(Note 1)
V
TI
-
Input Return Loss 100MHz to 2.5GHz 10 dB
Input Resistance Single ended (Note 1)
680
Output Swing (Notes 1, 3)
EN = low 30
Output Common-Mode Voltage
V
TO
V
Output Resistance Single ended (Note 1)
Ω
Output Return Loss 100MHz to 2.5GHz 10 dB
Output Transition Time tr, t
f
20% to 80% (Notes 2, 4) 40 70 100 ps
Differential Skew
Difference in 50% crossing between OUT+
and OUT-
10 ps
Operating Ambient Temperature
SYMBOL
MIN TYP MAX
100
2.488 3.125
Measured differentially at point A (Figure 1)
0.25V
42.5
42.5
525
0.112V
V
CC
V
CC
1000
0.10V
57.5
57.5
MAX3803
DC-Coupled, UCSP 3.125Gbps Equalizer
_______________________________________________________________________________________ 3
Note 1: Production tested at TA= +25°C. Specifications over temperature are guaranteed by design and characterization.
Note 2: Specifications are guaranteed by design and characterization.
Note 3: Measured differentially at point C with 50Ω±1% at each side (Figure 1).
Note 4: Using a 0000011111 or equivalent pattern at selected bit rate. Measured at 600mV
P-P
input voltage, 10m cable or 40in FR4,
at 2.5Gbps and within 2in of output pins.
Note 5: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 2.5Gbps with CJTPAT.
Note 6: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 2.5Gbps with a
PRBS 2
7
with 100 CIDs input pattern.
Note 7: Difference in peak-to-peak deterministic jitter between reference points A and C in Figure 1. Evaluated at 3.125Gbps with
CJTPAT.
ELECTRICAL CHARACTERISTICS (continued)
(Typical values are at +3.3V and at TA= +25°C, unless otherwise noted. Specifications guaranteed over specified operating conditions.)
Resi d ual D eter m i ni sti c Ji tter Outp ut
( 2.5Gb p s, C JTP AT) ( N otes 2, 5)
10m Tensolite cable
Resi d ual D eter m i ni sti c Ji tter Outp ut
( 2.5Gb p s, 2
7
P RBS + 100 C ID )
( N otes 2, 6)
3m Tensolite cable
Resi d ual D eter m i ni sti c Ji tter Outp ut
( 3.125Gb p s, C JT P AT) ( N otes 2, 7)
UI
Random Jitter Output (Notes 2, 4) 2 3
Latency From IN to OUT 0.3 ns
Low-Frequency Cutoff 15 kHz
LV TTL Inp ut H i g h V ol tag eV
IH
( N ote 1) 1.5 V
LVTTL Input Low Voltage V
IL
( N ote 1) 0.5 V
LV TTL Inp ut H i g h C ur r ent I
IH
( N ote 1) 10 µA
LVTTL Input Low Current I
IL
( N ote 1) 10 µA
SYMBOL
TYP MAX
0.01 0.10
0.04 0.10
0.05 0.10
0.05 0.15
0.07 0.15
0.03 0.10
0.14 0.25
0.01 0.10
0.06 0.10
0.11 0.15
0.15 0.20
0.09 0.15
0.01 0.10
0.02 0.10
0.03 0.15
0.06 0.15
0.11 0.25
0.05 0.10
0.16 0.25
0.20