MAX3668
+3.3V, 622Mbps SDH/SONET
Laser Driver with Automatic Power Control
8 _______________________________________________________________________________________
Programming the APC Loop
When the MAX3668’s APC feature is used, program the
average optical power by adjusting the APCSET resistor. To select this resistor, determine the desired monitor current to be maintained over temperature and life.
Refer to the Monitor Diode Current vs. APC Set Resistor
graph in the Typical Operating Characteristics and
select the value of R
APCSET
that corresponds to the
required current.
Interfacing with the Laser Diode
To minimize optical output aberrations due to the laser
parasitic inductance, an RC shunt network may be
used (see Typical Operating Circuit). If RLrepresents
the laser diode resistance, the recommended total
resistance for RD+ RLis 10Ω. Starting values for coaxi-
al lasers are R
FILT
= 20Ω and C
FILT
= 5pF. R
FILT
and
C
FILT
should be experimentally adjusted to optimize
the output waveform. A bypass capacitor should also
be placed as close to the laser anode as possible for
best performance.
Pattern-Dependent Jitter (PDJ)
When transmitting NRZ data with long strings of consecutive identical digits (CID), LF droop can contribute to
pattern-dependent jitter. To minimize this pattern-dependent jitter, two external components must be properly
chosen: capacitor C
APC
, which dominates the APC loop
time constant; and AC-coupling capacitor CD.
To filter out noise effects and guarantee loop stability,
the recommended value for C
APC
is 0.1µF. This results
in an APC loop bandwidth of 20kHz. Consequently, the
pattern-dependent jitter associated with an APC loop
time constant can be ignored.
The time constant associated with the DC blocking
capacitor on I
MOD
will have an effect on PDJ. It is
important that this time constant produce minimum
droop for long consecutive bit streams.
Referring to Figure 4, the droop resulting from long time
periods without transitions can be represented by the
following equation:
AC coupling of I
MOD
results in a discharge level for τ
that is equal to P
AVG
. An overall droop of 6% relative to
P
p-p
equates to a 12% droop relative to P
AVG
. To
ensure a droop of less than 12% (6% relative to P
p-p
),
this equation can be solved for τ as follows:
If t
1
equals 80 consecutive unit intervals without a transition, the time constant associated with the DC blocking capacitor needs to be longer than:
τAC≥ RACCD= 7.8 (80 bits) (1.6ns/bit) = 1.0µs
R
FILT
can be ignored for C
FILT
<< CD, therefore the
estimated value of RACis:
RAC= 20Ω (RD+ r
LASER
)
Assuming RD= 5Ω, and r
LASER
= 5Ω:
RAC= 6.7Ω
with CD= 1.0µF, τAC= 6.7µs.
Input Termination Requirement
The MAX3668 data inputs are PECL-compatible.
However, it is not necessary to drive the MAX3668 with
a standard PECL signal. As long as the specified common-mode voltage and differential voltage swings are
met, the MAX3668 will operate properly.
Calculate Power Consumption
The total power dissipation of the MAX3668 can be estimated by the following:
P = V
CC
× I
CC
+ (VCC- V
f
) × I
BIAS
+ I
MOD(VCC
- 20Ω × I
MOD
/ 2)
where I
BIAS
is the maximum bias current set by R
BIAS-
MAX
, I
MOD
is the modulation current, and Vfis the typi-
cal laser forward voltage.
Applications Information
The following is an example of how to set up the
MAX3668.
Select Laser
A communication-grade laser should be selected for
622Mbps applications. Assume the laser output average power is P
AVE
= 0dBm, the minimum extinction