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MAX3372E
Datasheet (MAXIM)
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Datasheet (MAXIM)
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Datasheet MAX3372E, MAX3379E, MAX3390E Datasheet (MAXIM)

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General Description
The MAX3372E–MAX3379E and MAX3390E–MAX3393E ±15kV ESD-protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCCand VL, set the logic levels on either side of the device. A low-voltage logic signal present on the VLside of the device appears as a high-voltage logic signal on the VCCside of the device, and vice-versa. The MAX3374E/MAX3375E/ MAX3376E/MAX3379E and MAX3390E–MAX3393E unidi­rectional level translators level shift data in one direction (VL→ VCCor VCC→ VL) on any single data line. The MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi­rectional level translators utilize a transmission-gate­based design (Figure 2) to allow data translation in either direction (VL↔ VCC) on any single data line. The MAX3372E–MAX3379E and MAX3390E–MAX3393E accept VLfrom +1.2V to +5.5V and VCCfrom +1.65V to +5.5V, making them ideal for data transfer between low­voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E– MAX3393E family feature a three-state output mode that reduces supply current to less than 1µA, thermal short­circuit protection, and ±15kV ESD protection on the V
CC
side for greater protection in applications that route sig­nals externally. The MAX3372E/MAX3377E operate at a guaranteed data rate of 230kbps. Slew-rate limiting reduces EMI emissions in all 230kbps devices. The MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E operate at a guaranteed data rate of 8Mbps over the entire specified operating voltage range. Within specific voltage domains, higher data rates are possible. (See the Timing Characteristics table.)
The MAX3372E–MAX3376E are dual level shifters available in 3 x 3 UCSP™, 8-pin TDFN, and 8-pin SOT23-8 packages. The MAX3377E/MAX3378E/ MAX3379E and MAX3390E–MAX3393E are quad level shifters available in 3 x 4 UCSP, 14-pin TDFN, and 14­pin TSSOP packages.
________________________Applications
SPI™, MICROWIRE™, and I2C Level
Translation Low-Voltage ASIC Level Translation Smart Card Readers Cell-Phone Cradles Portable POS Systems Portable Communication Devices Low-Cost Serial Interfaces Cell Phones GPS Telecommunications Equipment
Features
♦ Guaranteed Data Rate Options
230kbps 8Mbps (+1.2V ≤ VL≤ VCC≤ +5.5V) 10Mbps (+1.2V ≤ VL≤ VCC≤ +3.3V) 16Mbps (+1.8V ≤ VL≤ VCC≤ +2.5V and +2.5V ≤
VL≤ VCC≤ +3.3V)
♦ Bidirectional Level Translation
(MAX3372E/MAX3373E and MAX3377E/MAX3378E)
♦ Operation Down to +1.2V on V
L
♦ ±15kV ESD Protection on I/O VCCLines ♦ Ultra-Low 1µA Supply Current in Three-State
Output Mode
♦ Low-Quiescent Current (130µA typ) ♦ UCSP, TDFN, SOT23, and TSSOP Packages ♦ Thermal Short-Circuit Protection
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
________________________________________________________________ Maxim Integrated Products 1
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I/0 VCC1
I/0 V
CC
2
N.C.N.C.
I/O V
L
2
I/O V
L
1
MAX3377E/
MAX3378E
V
L
I/0 VCC3
GND
I/O V
L
4
I/O V
L
3
TDFN-14
(3mm x 3mm)
THREE-STATE
I/0 VCC4
TOP VIEW
Pin Configurations
19-2328; Rev 1; 12/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
UCSP is a trademark of Maxim Integrated Products, Inc. SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
Ordering Information continued at end of data sheet. Selector Guide appears at end of data sheet.
Pin Configurations continued at end of data sheet.
PART
TEMP
RANGE
PIN-
PKG
CODE
MAX3372EEKA-T
-40°C to +85°C
8 SOT23
K8S-3
PACKAGE
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, I/O VL_and I/O V
CC_
unconnected, TA= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at V
CC
= +3.3V, VL= +1.8V, TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.) V
CC
...........................................................................-0.3V to +6V
I/O V
CC_
......................................................-0.3V to (VCC+ 0.3V)
I/O V
L_
...........................................................-0.3V to (VL+ 0.3V)
THREE-STATE...............................................-0.3V to (VL+ 0.3V)
Short-Circuit Duration I/O V
L
, I/O VCCto GND...........Continuous
Short-Circuit Duration I/O V
L
or I/O VCCto GND Driven from 40mA Source
(except MAX3372E and MAX3377E) .....................Continuous
Continuous Power Dissipation (T
A
= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)...........714mW
8-Pin TDFN (derate 18.2mW/°C above +70°C) ........1455mW
3 x 3 UCSP (derate 4.7mW/°C above +70°C) ............379mW
3 x 4 UCSP (derate 6.5mW/°C above +70°C) ............579mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) ........727mW
14-Pin TDFN (derate 18.2mW/°C above +70°C) ......1454mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS
UNITS
POWER SUPPLIES
VL Supply Range V
L
V
VCC Supply Range V
CC
V
Supply Current from V
CC
I
QV
CC
µA
Supply Current from V
L
I
QV
L
16
µA
V
CC
Three-State Output Mode
Supply Current
TA = +25°C, THREE-STATE = GND
1µA
V
L
Three-State Output Mode
Supply Current
TA = +25°C, THREE-STATE = GND
1µA
Three-State Output Mode Leakage Current I/O V
L_
and I/O V
CC_
TA = +25°C, THREE-STATE = GND
1µA
THREE-STATE P in Inp ut Leakag eT
A
= +25°C
1µA
ESD PROTECTION
IEC 1000-4-2 Air-Gap Discharge ±8
IEC 1000-4-2 Contact Discharge ±8I/O VCC (Note 3)
Human Body Model
kV
LOGIC-LEVEL THRESHOLDS (MAX3372E/MAX3377E)
I/O VL_ Input-Voltage High V
IHL
VL - 0.2 V
I/O VL_ Input-Voltage Low V
ILL
V
MIN TYP MAX
1.2 5.5
1.65 5.50
130 300
100
I
THREE-STATE-VCC
I
THREE-STATE-VL
I
THREE-STATE-LKG
0.03
0.03
0.02
0.02
±15
0.15
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, I/O VL_and I/O V
CC_
unconnected, TA= T
MIN
to T
MAX
, unless other-
wise noted. Typical values are at V
CC
= +3.3V, VL= +1.8V, TA= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS
UNITS
I/O V
CC_
Input-Voltage High V
IHC
VCC - 0.4 V
I/O V
CC_
Input-Voltage Low V
ILC
V
I/O VL_ Output-Voltage High V
OHL
I/O V
L_
source current = 20µA,
I/O V
CC_
>
VCC - 0.4V
0.67
✕
V
L
V
I/O VL_ Output-Voltage Low V
OLL
I/O V
L_
sink current = 20µA,
I/O V
CC_
<
0.15V
V
I/O V
CC_
Output-Voltage High V
OHC
I/O V
CC_
source current = 20µA,
I/O V
L _
>
V
L
- 0.2V
0.67
✕
V
CC
V
I/O V
CC_
Output-Voltage Low V
OLC
I/O V
CC_
sink current = 20µA,
I/O V
L_
<
0.15V
V
THREE-STATE Input-Voltage High
VL - 0.2 V
THREE-STATE Input-Voltage Low
V
LOGIC-LEVEL THRESHOLDS (MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E)
I/O VL_ Input-Voltage High V
IHL
VL - 0.2 V
I/O V
L_
Input-Voltage Low V
ILL
V
I/O V
CC_
Input-Voltage High V
IHC
VCC - 0.4 V
I/O V
CC_
Input-Voltage Low V
ILC
V
I/O VL_ Output-Voltage High V
OHL
I/O V
L_
source current = 20µA,
I/O V
CC_
≥ VCC - 0.4V
0.67
✕
V
L
V
I/O VL_ Output-Voltage Low V
OLL
I/O V
L_
sink current = 1mA,
I/O V
CC_
≤ 0.15V
V
I/O V
CC_
Output-Voltage High V
OHC
I/O V
CC_
source current = 20µA,
I/O V
L_
≥ V
L
- 0.2V
0.67
✕
V
CC
V
I/O V
CC_
Output-Voltage Low V
OLC
I/O V
CC_
sink current = 1mA,
I/O V
L_
≤ 0.15V
V
THREE-STATE Input-Voltage High
VL - 0.2 V
THREE-STATE Input-Voltage Low
V
V
IL-THREE-STATE
V
IL-THREE-STATE
V
IH-THREE-STATE
V
IL-THREE-STATE
MIN TYP MAX
0.15
0.4
0.4
0.15
0.15
0.15
0.4
0.4
0.15
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
4 _______________________________________________________________________________________
TIMING CHARACTERISTICS
(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, R
LOAD
= 1MΩ, I/O test signal of Figure 1, TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.3V, VL= +1.8V, TA= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
MAX3372E/MAX3377E (C
LOAD
= 50pF)
I/O VCC_ Rise Time (Note 4) t
RVCC
ns
I/O VCC_ Fall Time (Note 5) t
FVCC
ns
I/O VL _ Rise Time (Note 4) t
RVL
ns
I/O VL _ Fall Time (Note 5) t
FVL
ns
Driving I/O VL _
Propagation Delay
Driving I/O VCC_
µs
Channel-to-Channel Skew t
SKEW
Each translator equally loaded
ns
Maximum Data Rate CL = 25pF
kbps
M A X3 3 7 3 E– M A X3 3 7 6 E/M A X3 3 7 8 E/ M A X3 3 7 9 E a n d M A X3 3 9 0 E– M A X3 3 9 3 E ( C
LOA D
= 15 p F , Dr iv e r O u t p u t Im p e d a n c e ≤ 5 0 Ω)
+1.2V ≤ VL ≤ VCC ≤ +5.5V
725
I/O VCC_ Rise Time (Note 4) t
RVCC
Open-drain driving
ns
637
I/O VCC_ Fall Time (Note 5) t
FVCC
Open-drain driving 20 50
ns
830
I/O VL _ Rise Time (Note 4) t
RVL
Open-drain driving
ns
330
I/O VL _ Fall Time (Note 5) t
LFV
Open-drain driving 30 60
ns
530
Driving I/O VL _
Open-drain driving
430
Propagation Delay
Driving I/O VCC_
Open-drain driving
ns
20
Channel-to-Channel Skew t
SKEW
Each translator equally loaded
Open-drain driving 50
ns
8
Mbps
Maximum Data Rate
Open-drain driving
kbps
I/O
VL-VCC
I/O
VCC-VL
230
1100
1000
600
1100
1.6
1.6
500
170 400
180 400
I/O
VL-VCC
I/O
VCC-VL
210 1000
190 1000
500
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
_______________________________________________________________________________________ 5
Note 1: All units are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 2: For normal operation, ensure V
L
< (VCC+ 0.3V). During power-up, VL> (VCC+ 0.3V) will not damage the device.
Note 3: To ensure maximum ESD protection, place a 1µF capacitor between V
CC
and GND. See Applications Circuits.
Note 4: 10% to 90% Note 5: 90% to 10%
TIMING CHARACTERISTICS (continued)
(VCC= +1.65V to +5.5V, VL= +1.2V to (VCC+ 0.3V), GND = 0, R
LOAD
= 1MΩ, I/O test signal of Figure 1, TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.3V, VL= +1.8V, TA= +25°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER
CONDITIONS
UNITS
+1.2V ≤ VL ≤ VCC ≤ +3.3V
I/O VCC_ Rise Time (Note 4) t
RVCC
25 ns
I/O VCC_ Fall Time (Note 5) t
FVCC
30 ns
I/O VL _ Rise Time (Note 4) t
RVL
30 ns
I/O VL _ Fall Time (Note 5) t
FVL
30 ns
Driving I/O VL _20
Propagation Delay
Driving I/O VCC_20
ns
Channel-to-Channel Skew t
SKEW
Each translator equally loaded
10 ns
Maximum Data Rate
10
Mbps
+2.5V ≤ VL ≤ VCC ≤ +3.3V
I/O VCC_ Rise Time (Note 4) t
RVCC
15 ns
I/O VCC_ Fall Time (Note 5) t
FVCC
15 ns
I/O VL _ Rise Time (Note 4) t
RVL
15 ns
I/O VL _ Fall Time (Note 5) t
FVL
15 ns
Driving I/O VL _15
Propagation Delay
Driving I/O VCC_15
ns
Channel-to-Channel Skew t
SKEW
Each translator equally loaded 10 ns
Maximum Data Rate 16
Mbps
+1.8V ≤ VL ≤ VCC ≤ +2.5V
I/O VCC_ Rise Time (Note 4) t
RVCC
15 ns
I/O VCC_ Fall Time (Note 5) t
FVCC
15 ns
I/O VL _ Rise Time (Note 4) t
RVL
15 ns
I/O VL _ Fall Time (Note 5) t
FVL
15 ns
Driving I/O VL _15
Propagation Delay
Driving I/O VCC_15
ns
Channel-to-Channel Skew t
SKEW
Each translator equally loaded 10 ns
Maximum Data Rate 16
Mbps
SYM B O L
I/O
VL-VCC
I/O
VCC-VL
I/O
VL-VCC
I/O
VCC-VL
I/O
VL-VCC
I/O
VCC-VL
MIN TYP MAX
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
6 _______________________________________________________________________________________
Typical Operating Characteristics
(R
LOAD
= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
VL SUPPLY CURRENT vs. SUPPLY VOLTAGE
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc01
V
CC
(V)
SUPPLY CURRENT (μA)
4.954.403.853.302.752.20
100
200
300
400
500
600
0
1.65 5.50
8Mbps, C
LOAD
= 15pF
230kbps, C
LOAD
= 50pF
500kbps, OPEN-DRAIN, C
LOAD
= 15pF
VCC SUPPLY CURRENT vs. SUPPLY VOLTAGE
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc02
V
CC
(V)
SUPPLY CURRENT (mA)
4.954.403.853.302.752.20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
1.65 5.50
8Mbps, C
LOAD
= 15pF
230kbps, C
LOAD
= 50pF
500kbps, OPEN-DRAIN, C
LOAD
= 15pF
VL SUPPLY CURRENT vs. TEMPERATURE
(DRIVING I/O V
CC
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc03
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
6035-15 10
50
100
150
200
250
300
350
400
0
-40 85
8Mbps, C
LOAD
= 15pF
230kbps, C
LOAD
= 50pF
500kbps, OPEN-DRAIN, C
LOAD
= 15pF
V
CC
SUPPLY CURRENT vs. TEMPERATURE
(DRIVING I/O V
CC
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc04
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
6035-15 10
200
400
600
800
1000
1200
1400
1600
0
-40 85
8Mbps, C
LOAD
= 15pF
230kbps, C
LOAD
= 50pF
500kbps, OPEN-DRAIN, C
LOAD
= 15pF
VL SUPPLY CURRENT vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc05
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (μA)
8570554025
50
100
150
200
250
300
350
0
10 100
8Mbps
230kbps
500kbps, OPEN-DRAIN
VCC SUPPLY CURRENT vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc06
CAPACITIVE LOAD (pF)
SUPPLY CURRENT (μA)
8570554025
500
1000
1500
2000
2500
0
10 100
8Mbps
230kbps
500kbps, OPEN-DRAIN
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc07
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
90807060504030
500
1000
1500
2000
2500
0
20 100
DATA RATE = 230kbps
t
HL
t
LH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc08
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
454030 3520 2515
2
4
6
8
10
12
14
16
18
0
10 50
DATA RATE = 8Mbps
t
HL
t
LH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc09
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
45403530252015
50
100
150
200
250
0
10 50
t
LH
t
HL
DATA RATE = 500kbps,
OPEN-DRAIN
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
_______________________________________________________________________________________ 7
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc10
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
90807060504030
100
200
300
400
500
600
700
0
20 100
DATA RATE = 230kbps
t
PHL
t
PLH
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc11
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
45403530252015
3
6
9
12
15
0
10 50
DATA RATE = 8Mbps
t
PLH
t
PHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc12
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
45403530252015
50
100
150
200
250
300
0
10 50
DATA RATE = 500kbps,
OPEN-DRAIN
t
PHL
t
PLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, V
CC
= +2.5V, VL = +1.8V)
MAX3372E toc13
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
90807060504030
500
1000
1500
2000
2500
0
20 100
DATA RATE = 230kbps
t
HL
t
LH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
L
, VCC = +2.5V, VL = +1.8V)
MAX3372E toc14
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
45403530252015
2
4
6
8
10
12
14
0
10 50
DATA RATE = 8Mbps
t
LH
t
HL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +2.5V, VL = +1.8V)
MAX3372E toc15
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
45403530252015
50
100
150
200
250
300
0
10 50
DATA RATE = 500kbps,
OPEN-DRAIN
t
HL
t
LH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc16
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
90807060504030
500
1000
1500
2000
2500
0
20 100
DATA RATE = 230kbps
t
LH
t
HL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc17
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
45403530252015
2
4
6
8
10
12
0
10 50
DATA RATE = 8Mbps
t
HL
t
LH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc18
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
45403530252015
50
100
150
200
250
300
0
10 50
DATA RATE = 500kbps,
OPEN-DRAIN
t
HL
t
LH
Typical Operating Characteristics (continued)
(R
LOAD
= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(R
LOAD
= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, VCC = +3.3V, VL = +1.8V)
MAX3372E toc19
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
90807060504030
100
200
300
400
500
600
700
0
20 100
DATA RATE = 230kbps
t
PHL
t
PHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc20
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
45403530252015
1
2
3
4
5
6
0
10 50
DATA RATE = 8Mbps
t
PLH
t
PHL
PROPAGATION DELAY vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +3.3V, VL = +1.8V)
MAX3372E toc21
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
45403530252015
50
100
150
200
250
300
0
10 50
DATA RATE = 500kbps,
OPEN-DRAIN
t
PHL
t
PLH
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +2.5V, VL = +1.8V)
MAX3372E toc22
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
90807060504030
500
1000
1500
2000
2500
0
20 100
DATA RATE = 230kbps
t
LH
t
HL
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +2.5V, VL = +1.8V)
MAX3372E toc23
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
403020
2
4
6
8
10
12
0
10 50
t
LH
t
HL
DATA RATE = 8Mbps
RISE/FALL TIME vs. CAPACITIVE LOAD
(DRIVING I/O V
CC
, V
CC
= +2.5V, VL = +1.8V)
MAX3373E toc24
CAPACITIVE LOAD (pF)
RISE/FALl TIME (ns)
403020
50
100
150
200
250
300
350
0
10 50
DATA RATE = 500kbps,
OPEN-DRAIN
t
LH
t
HL
RAIL-TO-RAIL DRIVING
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V,
C
LOAD
= 50pF, DATA RATE = 230kbps)
MAX3372E toc25
I/O V
L_
I/O V
CC_
1V/div
2V/div
1μs/div
RAIL-TO-RAIL DRIVING
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V,
C
LOAD
= 15pF, DATA RATE = 8Mbps)
MAX3372E toc26
I/O V
L_
I/O V
CC_
1V/div
2V/div
200ns/div
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(R
LOAD
= 1MΩ, TA = +25°C, unless otherwise noted. All 230kbps TOCs apply to MAX3372E/MAX3377E only. All 8Mbps and
500kbps TOCs apply to MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E only.)
EXITING THREE-STATE OUTPUT MODE
(V
CC
= +3.3V, VL = +1.8V, C
LOAD
= 50pF)
MAX3372E toc28
I/O V
L_
I/O V
CC_
2μs/div
THREE-STATE
2V/div
1V/div
1V/div
Pin Description
PIN
3 x 4
UCSP
3 x 3
TDFN8TDFN
14
NAME FUNCTION
A1 2 5 C2 6 1 I/O VL1 Input/Output 1. Referenced to VL. (Note 6)
A2 3 4 C3 8 2 I/O VL2 Input/Output 2. Referenced to VL. (Note 6)
A3 4 — — — 5 I/O VL3 Input/Output 3. Referenced to VL. (Note 6)
A4 5 — — — 6 I/O VL4 Input/Output 4. Referenced to VL. (Note 6)
B1 14 7 A1 4 14 V
CC
VCC Input Voltage +1.65V ≤ VCC ≤ +5.5V.
B2 1 3 C1 7 10 V
L
Logic Input Voltage +1.2V ≤ VL ≤ (VCC + 0.3V)
B3 8 6 B1 5 3
THREE-
STATE
Thr ee- S tate Outp ut M od e E nab l e. P ul l THRE E - S TATE l ow
to p l ace d evi ce i n thr ee- state outp ut m od e. I/O V
C C _
and
I/O V L_ ar e hi g h i m p ed ance i n thr ee- state outp ut m od e.
N OTE : Log i c r efer enced to V L ( for l og i c thr eshol d s see
the E l ectr i cal C har acter i sti cs tab l e) .
B4 7 2 B3 2 7 GND Ground
C1 13 8 A2 3 13 I/O VCC1 Input/Output 1. Referenced to VCC. (Note 6)
C2 12 1 A3 1 12 I/O VCC2 Input/Output 2. Referenced to VCC. (Note 6)
C3 11 — — — 9 I/O VCC3 Input/Output 3. Referenced to VCC. (Note 6)
C4 10 — — — 8 I/O VCC4 Input/Output 4. Referenced to VCC. (Note 6)
— 6, 9 — B2 —
N.C. No Connection. Not internally connected.
— — — — EP EP EP Exposed Pad. Connect to ground.
Note 6: For unidirectional devices (MAX3374E/MAX3375E/MAX3376E/MAX3379E and MAX3390E–MAX3393E) see the Pin
Configurations for input/output configurations.
OPEN-DRAIN DRIVING
(DRIVING I/O V
L
, VCC = +3.3V, VL = +1.8V,
C
LOAD
= 15pF, DATA RATE = 500kbps)
MAX3372E toc27
I/O V
L_
I/O V
CC_
1V/div
2V/div
200ns/div
TSSOP SOT23-8
UCSP
4, 11
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
10 ______________________________________________________________________________________
Detailed Description
The MAX3372E–MAX3379E and MAX3390E–MAX3393E ESD-protected level translators provide the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCCand VL, set the logic lev­els on either side of the device. A low-voltage logic signal present on the VLside of the device appears as a high­voltage logic signal on the VCCside of the device, and vice-versa. The MAX3374E/MAX3375E/MAX3376E/ MAX3379E and MAX3390E–MAX3393E unidirectional level translators level shift data in one direction (VL→ VCCor VCC→ VL) on any single data line. The MAX3372E/MAX3373E and MAX3377E/MAX3378E bidi­rectional level translators utilize a transmission-gate­based design (see Figure 2) to allow data translation in either direction (VL↔ VCC) on any single data line. The MAX3372E–MAX3379E and MAX3390E–MAX3393E
accept VLfrom +1.2V to +5.5V and VCCfrom +1.65V to +5.5V, making them ideal for data transfer between low­voltage ASICs/PLDs and higher voltage systems.
All devices in the MAX3372E–MAX3379E, MAX3390E– MAX3393E family feature a three-state output mode that reduces supply current to less than 1µA, thermal short­circuit protection, and ±15kV ESD protection on the V
CC
side for greater protection in applications that route sig­nals externally. The MAX3372E/MAX3377E operate at a guaranteed data rate of 230kbps. Slew-rate limiting reduces EMI emissions in all 230kbps devices. The MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E operate at a guaranteed data rate of 8Mbps over the entire specified operating voltage range. Within specific voltage domains, higher data rates are possible. (See the Timing Characteristics table.)
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O V
L
_
(t
RISE
,
t
FALL
< 10ns)
DATA
I/O V
CC
_
R
LOAD
C
LOAD
V
CC
V
CC
V
L
V
L
GND
t
PD-VCC-LH
t
PD-VCC-HL
I/O VCC_
t
RVCC
t
FVCC
Figure 1a. Rail-to-Rail Driving I/O V
L
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O VL_
I/O V
CC
_
(t
RISE
,
t
FALL
< 10ns)
DATA
I/O V
CC
_
V
CC
V
CC
V
L
V
L
GND
R
LOAD
C
LOAD
t
PD-VL-LH
t
PD-VL-HL
I/O VL_
t
RVL
t
FVL
Figure 1b. Rail-to-Rail Driving I/O V
CC
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 11
Level Translation
For proper operation ensure that +1.65V ≤ VCC≤ +5.5V, +1.2V ≤ VL≤ +5.5V, and VL≤ (VCC+ 0.3V). During power-up sequencing, VL≥ (VCC+ 0.3V) will not damage the device. During power-supply sequenc­ing, when VCCis floating and VLis powering up, a cur­rent may be sourced, yet the device will not latch up. The speed-up circuitry limits the maximum data rate for devices in the MAX3372E–MAX3379E, MAX3390E– MAX3393E family to 16Mbps. The maximum data rate also depends heavily on the load capacitance (see the Typical Operating Characteristics), output impedance of the driver, and the operational voltage range (see the Timing Characteristics table).
Speed-Up Circuitry
The MAX3373E–MAX3376E/MAX3378E/MAX3379E and MAX3390E–MAX3393E feature a one-shot generator that decreases the rise time of the output. When triggered, MOSFETs PU1 and PU2 turn on for a short time to pull up
I/O VL_and I/O V
CC_
to their respective supplies (see Figure 2b). This greatly reduces the rise time and propa­gation delay for the low-to-high transition. The scope photo of Rail-to-Rail Driving for 8Mbps Operation in the Typical Operating Characteristics shows the speed-up circuitry in operation.
Rise-Time Accelerators
The MAX3373E–MAX3376E/MAX3378E/MAX3379E and the MAX3390E–MAX3393E have internal rise-time accelerators allowing operation up to 16Mbps. The rise-time accelerators are present on both sides of the device and act to speed up the rise time of the input and output of the device, regardless of the direction of the data. The triggering mechanism for these accelera­tors is both level and edge sensitive. To prevent false triggering of the rise-time accelerators, signal fall times of less than 20ns/V are recommended for both the inputs and outputs of the device. Under less noisy con­ditions, longer signal fall times may be acceptable.
MAX3372E–MAX3379E
AND MAX3390E–MAX3393E
I/O V
L_
I/O V
CC_
V
CC
V
CC
V
L
V
L
GND
I/O V
CC_
t
PD-VCC-LH
t
PD-VCC-HL
I/O V
L_
t
RVCC
t
FVCC
DATA
R
LOAD
C
LOAD
Figure 1c. Open-Drain Driving I/O V
CC
MAX3373E–MAX3376E,
MAX3378E/MAX3379E
AND MAX3390E–MAX3393E
I/O V
L_
I/O V
CC_
DATA
I/O V
CC_
V
CC
V
CC
V
L
V
L
GND
R
LOAD
C
LOAD
t
PD-VL-LH
t
PD-VL-HL
I/O V
L_
t
RVL
t
FVL
Figure 1d. Open-Drain Driving I/O V
L
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
12 ______________________________________________________________________________________
Three-State Output Mode
Pull THREE-STATE low to place the MAX3372E– MAX3379E and MAX3390E–MAX3393E in three-state out­put mode. Connect THREE-STATE to VL(logic-high) for normal operation. Activating the three-state output mode disconnects the internal 10kΩ pullup resistors on the I/O VCCand I/O VLlines. This forces the I/O lines to a high­impedance state, and decreases the supply current to less than 1µA. The high-impedance I/O lines in three­state output mode allow for use in a multidrop network. When in three-state output mode, do not allow the voltage
at I/O VL_to exceed (VL+ 0.3V), or the voltage at I/O V
CC_
to exceed (VCC+ 0.3V).
Thermal Short-Circuit Protection
Thermal overload detection protects the MAX3372E– MAX3379E and MAX3390E–MAX3393E from short-circuit fault conditions. In the event of a short-circuit fault, when the junction temperature (TJ) reaches +152°C, a thermal sensor signals the three-state output mode logic to force the device into three-state output mode. When TJhas cooled to +142°C, normal operation resumes.
V
CC
I/O V
L
I/O V
CC
GATE BIAS
V
L
P P
N
Figure 2a. Functional Diagram, MAX3372E/MAX3377E (1 I/O line)
V
CC
I/O V
L_
I/O V
CC_
GATE BIAS
V
L
PU1 PU2
N
ONE-SHOT
BLOCK
ONE-SHOT
BLOCK
Figure 2b. Functional Diagram, MAX3373E/MAX3378E (1 I/O line)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 13
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE CAPACITOR
C
s
100pF
R
C
1M
Ω
RD 1500
Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE­UNDER-
TEST
Figure 3a. Human Body ESD Test Model
IP 100%
90%
36.8%
t
RL
TIME
t
DL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
I
r
10%
0
0
AMPERES
Figure 3b. Human Body Current Waveform
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The I/O VCClines have extra protection against static electricity. Maxim’s engineers have developed state-of­the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, three-state output mode, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing products can latch and must be powered down to remove latchup.
ESD protection can be tested in various ways. The I/O VCClines of this product family are characterized for protection to the following limits:
1) ±15kV using the Human Body Model
2) ±8kV using the Contact Discharge method specified in IEC 1000-4-2
3) ±10kV using IEC 1000-4-2’s Air-Gap Discharge method
ESD Test Conditions
ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.
Human Body Model
Figure 3a shows the Human Body Model and Figure 3b shows the current waveform it generates when dis­charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of inter­est, which is then discharged into the test device through a 1.5kΩ resistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifi­cally refer to integrated circuits. The MAX3372E– MAX3379E and MAX3390E–MAX3393E help to design equipment that meets Level 3 of IEC 1000-4-2, without the need for additional ESD-protection components.
The major difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD with­stand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 4a shows the IEC 1000-4-2 model, and Figure 4b shows the current waveform for the ±8kV, IEC 1000-4-2, Level 4, ESD contact-discharge test.
The air-gap test involves approaching the device with a charged probe. The contact-discharge method con­nects the probe to the device before the probe is energized.
Machine Model
The Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis­tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protec­tion during manufacturing, not just inputs and outputs. Therefore, after PCB assembly, the Machine Model is less relevant to I/O ports.
MAX3372E–MAX3379E/MAX3390E–MAX3393E
Applications Information
Power-Supply Decoupling
To reduce ripple and the chance of transmitting incor­rect data, bypass VLand VCCto ground with a 0.1µF capacitor. See the Typical Operating Circuit. To ensure full ±15kV ESD protection, bypass VCCto ground with a 1µF capacitor. Place all capacitors as close to the power-supply inputs as possible.
I2C Level Translation
The MAX3373E–MAX3376E, MAX3378E/MAX3379E and MAX3390E–MAX3393E level-shift the data present on the I/O lines between +1.2V and +5.5V, making them ideal for level translation between a low-voltage
ASIC and an I2C device. A typical application involves interfacing a low-voltage microprocessor to a 3V or 5V D/A converter, such as the MAX517.
Push-Pull vs. Open-Drain Driving
All devices in the MAX3372E–MAX3379E and MAX3390E–MAX3393E family may be driven in a push­pull configuration. The MAX3373E–MAX3376E/ MAX3378E/MAX3379E and MAX3390E–MAX3393E include internal 10kΩ resistors that pull up I/O V
L_
and
I/O V
CC_
to their respective power supplies, allowing operation of the I/O lines with open-drain devices. See the Timing Characteristics table for maximum data rates when using open-drain drivers.
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
14 ______________________________________________________________________________________
tr = 0.7ns to 1ns
30ns
60ns
t
100%
90%
10%
I
PEAK
I
Figure 4b. IEC 1000-4-2 ESD Generator Current Waveform
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE CAPACITOR
C
s
150pF
R
C
50MΩ to 100MΩRD 330
Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE­UNDER-
TEST
Figure 4a. IEC 1000-4-2 ESD Test Model
MAX3378E–MAX3383E
THREE-STATE
I/O V
L_
DATA
DATA
I/O V
CC_
0.1μF0.1μF
1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
Typical Operating Circuit
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 15
MAX3372E/MAX3373E
THREE-STATE
I/O V
L2
I/O V
L1
DATADATA
I/O V
CC2
I/O V
CC1
0.1μF0.1μF 1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
Applications Circuits
+3.3V+1.8V
0.1μF0.1μF 1μF
V
V
CC
L
+1.8V
SYSTEM
CONTROLLER
THREE-STATE
MAX3374E
I V
L1
I V
L2
O V O V
CC1
CC2
+3.3V
SYSTEM
DATADATA
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
16 ______________________________________________________________________________________
Applications Circuits (continued)
MAX3375E
THREE-STATE
I V
L2
O V
L1
DATADATA
O V
CC2
I V
CC1
0.1μF0.1μF 1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
0.1μF0.1μF 1μF
V
V
CC
L
THREE-STATE
O V
L1
O V
L2
MAX3376E
I V
I V
CC1
CC2
+1.8V
SYSTEM
CONTROLLER
+3.3V
SYSTEM
DATADATA
+3.3V+1.8V
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 17
Applications Circuits (continued)
MAX3377E/MAX3378E
THREE-STATE
I/O V
L4
I/O V
L3
I/O V
L1
I/O V
L2
DATA
DATA
I/O V
CC1
I/O V
CC2
I/O V
CC3
I/O V
CC4
0.1μF0.1μF 1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
+3.3V+1.8V
+3.3V
SYSTEM
0.1μF
0.1μF 1μF
V
V
CC
L
THREE-STATE
I V
L1
I V
L2
I V
L3
I V
L4
MAX3379E
O V
O V
O V O V
CC1
CC2
CC3
CC4
DATA
+1.8V
SYSTEM
CONTROLLER
DATA
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
18 ______________________________________________________________________________________
Applications Circuits (continued)
MAX3390E
THREE-STATE
DATA
DATA
0.1μF
0.1μF 1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
I V
L4
O V
L1
I V
L2
I V
L3
I V
L1
O V
CC2
O V
CC3
O V
CC4
+3.3V
SYSTEM
0.1μF
0.1μF 1μF
V
V
CC
L
THREE-STATE
O V
L1
O V
L2
I V
L3
I V
L4
MAX3391E
O V O V
I V I V
CC1
CC2
CC3
CC4
DATA
+1.8V
SYSTEM
CONTROLLER
DATA
+3.3V+1.8V
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 19
Applications Circuits (continued)
MAX3392E
THREE-STATE
DATA
DATA
0.1μF
0.1μF 1μF
+3.3V+1.8V
V
CC
+3.3V
SYSTEM
+1.8V
SYSTEM
CONTROLLER
V
L
I V
L4
O V
L1
O V
L2
O V
L3
I V
CC1
I V
CC2
I V
CC3
O V
CC4
0.1μF 1μF
V
V
CC
L
+1.8V
SYSTEM
CONTROLLER
DATA
THREE-STATE
MAX3393E
O V
L1
O V
L2
O V
L3
I V
L4
I V I V I V I V
CC1
CC2
CC3
CC4
DATA
0.1μF
+3.3V
SYSTEM
+3.3V+1.8V
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
20 ______________________________________________________________________________________
Selector Guide
PART
LEVEL
TRANS-
Tx/
DATA
RATE
TOP
MARK
MAX3372EEKA-T  Bi
AAKO
MAX3372EEBL-T  Bi
AAR
MAX3373EEKA-T  Bi
AAKS
MAX3373EEBL-T  Bi
AAZ
MAX3374EEKA-T Uni
AALH
MAX3374EEBL-T Uni
ABA
MAX3375EEKA-T Uni
AALI
MAX3375EEBL-T Uni
ABB
MAX3376EEKA-T Uni
AALG
MAX3376EEBL-T Uni
AAV
MAX3377EEUD  Bi
—
MAX3377EEBC-T  Bi
AAX
MAX3378EEUD  Bi
—
MAX3378EEBC-T  Bi
AAY
MAX3379EEUD Uni
—
MAX3379EEBC-T Uni
AAZ
MAX3390EEUD Uni
—
MAX3390EEBC-T Uni
ABA
MAX3391EEUD Uni
—
MAX3391EEBC-T Uni
ABB
MAX3392EEUD Uni
—
MAX3392EEBC-T Uni
ABC
MAX3393EEUD Uni
—
MAX3393EEBC-T Uni
ABD
†
Tx = V
L
→ V
CC
, Rx = V
CC
→ V
L
*Higher data rates are possible (see the Timing Characteristics table).
Ordering Information (continued)
PART
TEMP
RANGE
PIN­PACKAGE
PKG
CODE
MAX3372EEBL-T
9-UCSP
B9-2
MAX3373EEKA-T
8 SOT23 K8S-3
MAX3373EEBL-T
9-UCSP
B9-2
MAX3373EETA**
8 TDFN-EP* T833-2
MAX3374EEKA-T
8 SOT23 K8S-3
MAX3374EEBL-T
9-UCSP
B9-2
MAX3375EEKA-T
8 SOT23 K8S-3
MAX3375EEBL-T
9-UCSP
B9-2
MAX3376EEKA-T
8 SOT23 K8S-3
MAX3376EEBL-T
9-UCSP
B9-2
MAX3377EEUD
14 TSSOP U14-1
MAX3377EEBC-T
9-UCSP
B12-1
MAX3378EEUD
14 TSSOP U14-1
MAX3378EEBC-T
12-UCSP
B12-1
MAX3378EETD
14 TDFN-EP*
T1433-2
MAX3379EEUD**
14 TSSOP U14-1
MAX3379EEBC-T**
12-UCSP
B12-1
MAX3390EEUD**
14 TSSOP U14-1
MAX3390EEBC-T**
12-UCSP
B12-1
MAX3391EEUD**
14 TSSOP U14-1
MAX3391EEBC-T**
12-UCSP
B12-1
MAX3392EEUD**
14 TSSOP U14-1
MAX3392EEBC-T**
12-UCSP
B12-1
MAX3393EEUD**
14 TSSOP U14-1
MAX3393EEBC-T**
12-UCSP
B12-1
**Future product—contact factory for availability.
*Exposed Pad.
†
Rx
2/2
2/2
2/2
2/2
2/0
2/0
1/1
1/1
0/2
0/2
4/4
4/4
4/4
4/4
4/0
4/0
3/1
3/1
2/2
2/2
1/3
1/3
0/4
0/4
230kbps
8Mbps*
230kbps
8Mbps*
LATION
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
(1.5mm x 1.5mm)
(1.5mm x 1.5mm)
(1.5mm x 1.5mm)
(1.5mm x 1.5mm)
(1.5mm x 1.5mm)
(1.5mm x 1.5mm)
(1.5mm x 2.0mm)
(1.5mm x 2.0mm)
(1.5mm x 2.0mm)
(1.5mm x 2.0mm)
(1.5mm x 2.0mm)
(1.5mm x 2.0mm)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 21
A
1
2
3
BC
9-UCSP (1.5mm x 1.5mm)
BOTTOM VIEW
V
CC
I VCC1
I V
CC
2
O V
L
1
O V
L
2
N.C.
GND
V
L
THREE-STATE
A
1
2
3
BC
9-UCSP (1.5mm x 1.5mm)
BOTTOM VIEW
V
CC
O VCC1
I V
CC
2
I V
L
1
O V
L
2
N.C.
GND
V
L
THREE-STATE
A
1
2
3
BC
9-UCSP (1.5mm x 1.5mm)
BOTTOM VIEW
V
CC
O VCC1
O V
CC
2
I V
L
1
I V
L
2
N.C.
GND
V
L
THREE-STATE
A
1
2
3
BC
9-UCSP (1.5mm x 1.5mm)
BOTTOM VIEW
V
CC
I/O VCC1
I/O V
CC
2
I/O V
L
1
I/O V
L
2
N.C.
GND
V
L
THREE-STATE
THREE-STATE
I VL1I VL2
1
2
87O VCC1
V
CC
GND
V
L
O VCC2
SOT23-8
TOP VIEW
3
4
6
5
MAX3374E
THREE-STATE
O VL1I VL2
1
2
87I VCC1
V
CC
GND
V
L
O VCC2
SOT23-8
TOP VIEW
3
4
6
5
MAX3375E
THREE-STATE
O VL1O VL2
1
2
87I VCC1
V
CC
GND
V
L
I VCC2
SOT23-8
TOP VIEW
3
4
6
5
MAX3376E
THREE-STATE
I/O VL1I/O VL2
1
2
87I/O VCC1
V
CC
GND
V
L
I/O VCC2
SOT23-8
TOP VIEW
3
4
6
5
MAX3372E MAX3373E
THREE-STATE
I/O VL1
I/O V
CC
1
1
2
87I/O VL2
V
L
GND
V
CC
I/O VCC2
TDFN-8 (3mm x 3mm)
TOP VIEW
3
4
6
5
THREE-STATE
I VL1
O V
CC
1
1
2
87I VL2
V
L
GND
V
CC
O VCC2
TDFN-8 (3mm x 3mm)
TOP VIEW
3
4
6
5
THREE-STATE
O VL1
I V
CC
1
1
2
87I VL2
V
L
GND
V
CC
O VCC2
TDFN-8 (3mm x 3mm)
TOP VIEW
3
4
6
5
THREE-STATE
O VL1
I V
CC
1
1
2
87O VL2
V
L
GND
V
CC
I VCC2
TDFN-8 (3mm x 3mm)
TOP VIEW
3
4
6
5
Pin Configurations (continued)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
22 ______________________________________________________________________________________
Pin Configurations (continued)
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
I/O VCC1
I/O V
CC
2
I/O V
CC
3
I/O V
L
3
I/O V
L
2
I/O V
L
1
V
L
I/O VCC4
GND
I/O V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
O VCC1
O V
CC
2
O V
CC
3I VL3
I V
L
2
I V
L
1
V
L
MAX3379E
O VCC4
N.C.
THREE-STATEGND
N.C.
I VL4
TSSOP-14 TOP VIEW
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
O VCC1
O V
CC
2
O V
CC
3
I V
L
3
I V
L
2
I VL1
V
L
O VCC4
GND
I V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
O V
CC
2
O V
CC
3I VL3
I V
L
2
O V
L
1
V
L
MAX3390E
O VCC4
N.C.
THREE-STATEGND
N.C.
I VL4
TSSOP-14 TOP VIEW
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
I VCC1
O V
CC
2
O V
CC
3
I V
L
3
I V
L
2
O V
L
1
V
L
O VCC4
GND
I V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I/0 VCC1
I/0 V
CC
2
I/0 V
CC
3I/O VL3
I/O V
L
2
I/O V
L
1
V
L
MAX3377E MAX3378E
I/0 VCC4
N.C.
THREE-STATEGND
N.C.
I/O V
L
4
TSSOP-14 TOP VIEW
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I/0 VCC1
I/0 V
CC
2
N.C.N.C.
I/O V
L
2
I/O V
L
1
V
L
I/0 VCC3
GND
I/O V
L
4
I/O V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
I/0 VCC4
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
0 VCC1
0 V
CC
2
N.C.N.C.
I V
L
2
I V
L
1
V
L
0 VCC3
GND
I V
L
4
I V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
0 VCC4
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
0 V
CC
2
N.C.N.C.
I V
L
2
O V
L
1
V
L
0 VCC3
GND
I V
L
4
I V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
0 VCC4
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 23
Pin Configurations (continued)
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
I VCC1
I V
CC
2
I V
CC
3
O V
L
3
O V
L
2
O V
L
1
V
L
I VCC4
GND
O V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
I V
CC
3O VL3
O V
L
2
O V
L
1
V
L
MAX3393E
I VCC4
N.C.
THREE-STATEGND
N.C.
O VL4
TSSOP-14 TOP VIEW
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
I VCC1
I V
CC
2
I V
CC
3
O V
L
3
O V
L
2
O VL1
V
L
O VCC4
GND
I V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
I V
CC
3O VL3
O V
L
2
O V
L
1
V
L
MAX3392E
O VCC4
N.C.
THREE-STATEGND
N.C.
I V
L
4
TSSOP-14
TOP VIEW
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
O V
CC
3I VL3
O V
L
2
O V
L
1
V
L
MAX3391E
O VCC4
N.C.
THREE-STATEGND
N.C.
I VL4
TSSOP-14 TOP VIEW
A
1
2
3
4
BC
12-UCSP (1.5mm x 2.0mm)
BOTTOM VIEW
V
CC
I VCC1
I V
CC
2
O V
CC
3
I V
L
3
O V
L
2
O VL1
V
L
O VCC4
GND
I V
L
4
THREE-STATE
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
N.C.N.C.
O V
L
2
O V
L
1
V
L
0 VCC3
GND
I V
L
4
I V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
0 VCC4
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
N.C.N.C.
O V
L
2
O V
L
1
V
L
I VCC3
GND
I V
L
4
O V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
0 VCC4
14
13
12
11
10
9
8
1
2
3
4
5
6
7
V
CC
I VCC1
I V
CC
2
N.C.N.C.
O V
L
2
O V
L
1
V
L
I VCC3
GND
O V
L
4
O V
L
3
TDFN-14 (3mm x 3mm)
TOP VIEW
THREE-STATE
I VCC4
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
24 ______________________________________________________________________________________
Chip Information
TRANSISTOR COUNT: MAX3372E–MAX3376E: 189
MAX3377E–MAX3379E,
MAX3390E–MAX3393E: 295
PROCESS: BiCMOS
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
SOT23, 8L .EPS
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 25
6, 8, &10L, DFN THIN.EPS
COMMON DIMENSIONS
SYMBOL MIN. MAX.
A 0.70 0.80 D 2.90 3.10 E 2.90 3.10 A1
0.00 0.05
L 0.20 0.40
PKG. CODE N D2 E2 e JEDEC SPEC b
[(N/2)-1] x e
PACKAGE VARIATIONS
0.25 MIN.k
A2 0.20 REF.
2.00 REF0.25±0.050.50 BSC2.30±0.1010T1033-1
2.40 REF0.20±0.05- - - - 0.40 BSC1.70±0.10 2.30±0.1014T1433-1
1.50±0.10 MO229 / WEED-3
0.40 BSC - - - - 0.20±0.05 2.40 REFT1433-2 14 2.30±0.101.70±0.10
T633-2 6 1.50±0.10 2.30±0.10 0.95 BSC MO229 / WEEA 0.40±0.05 1.90 REF T833-2 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF T833-3 8 1.50±0.10 2.30±0.10 0.65 BSC MO229 / WEEC 0.30±0.05 1.95 REF
2.30±0.10 MO229 / WEED-3 2.00 REF0.25±0.050.50 BSC1.50±0.1010T1033-2
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages
.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
26 ______________________________________________________________________________________
TSSOP4.40mm.EPS
PACKAGE OUTLINE, TSSOP 4.40mm BODY
21-0066
1
1
I
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages
.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
______________________________________________________________________________________ 27
9LUCSP, 3x3.EPS
PACKAGE OUTLINE, 3x3 UCSP
21-0093
1
1
K
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages
.)
MAX3372E–MAX3379E/MAX3390E–MAX3393E
±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad Low-Voltage Level Translators in UCSP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
28 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages
.)
Revision History
Pages changed at Rev 1: 1, 2, 9, 12, 13, 14, 20–23
12L, UCSP 4x3.EPS
PACKAGE OUTLINE, 4x3 UCSP
21-0104
1
F
1
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