The MAX3353E I2C-compatible USB On-the-Go (OTG)
regulated charge pump with switchable pullup/pulldown resistors allows peripherals and mobile devices
such as PDAs, cellular phones, and digital cameras to
be interconnected without a host PC.
The MAX3353E enables a system with an integrated
USB dual-role transceiver to function as a USB OTG
dual-role device. The charge pump in the MAX3353E
supplies V
BUS
power and signaling that is required by
the transceiver as defined in On-the-Go Supplement:USB 2.0, Revision 1.0. The MAX3353E provides the
switchable pullup and pulldown resistors on D+ and Drequired for a dual-role device.
The MAX3353E integrates a regulated charge pump,
switchable pullup/pulldown resistors, and an I2C-compatible 2-wire serial interface. The device provides a
detector to monitor ID status and operates with logic
supply voltages (V
L
) between +1.65V and VCCand
charge-pump supply voltages (V
CC
) from +2.6V to
+5.5V. The charge pump supplies an OTG-compatible
output on V
BUS
while sourcing 8mA output current.
The MAX3353E enables USB OTG communication
between digital logic parts that cannot supply or tolerate
the +5V V
BUS
levels that USB OTG requires. By control-
ling and measuring V
BUS
using internal comparators,
this device supports USB OTG session request protocol
(SRP) and host negotiation protocol (HNP).
The MAX3353E has built-in ±15kV ESD protection circuitry
to guard V
BUS
, ID_IN, D+, and D-. The MAX3353E is
available in a 5 x 4 chip-scale package (UCSP™) and
16-pin TSSOP package.
= 0.1µF, VCCdecoupled with 1µF capacitor to ground;
V
TRM
and VLdecoupled with 0.1µF capacitor to ground; C
VBUS
= 1µF (min), TA= T
MIN
to T
MAX
, unless otherwise noted. Typical
values are at V
CC
= +4V, VL= +1.8V, V
TRM
= +3.3V, and TA= +25°C.) (Notes 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
V
CC,VL
, V
TRM
..........................................................-0.3V to +6V
D+, D-, ID_IN (Note 1)..............................................-0.3V to +6V
V
BUS
(Notes 1, 2) .....................................................-0.3V to +6V
= 0.1µF, VCCdecoupled with 1µF capacitor to ground.
V
TRM
and VLdecoupled with 0.1µF capacitor to ground. C
VBUS
= 1µF (min), TA= T
MIN
to T
MAX
, unless otherwise noted. Typical val-
ues are at T
A
= +25°C, VCC= +4V, VL = +1.8V, V
TRM
= +3.3V.) (Notes 3, 4)
I2C/SMBUS-COMPATIBLE TIMING SPECIFICATIONS
(VCC= +2.6V to +5.5V, VL = +1.65V to VCC, V
TRM
= +3V to +3.6V, C
FLYING
= 0.1µF, VCCdecoupled with 1µF capacitor to ground.
V
TRM
and VLdecoupled with 0.1µF capacitor to ground. C
VBUS
= 1µF (min). TA= T
MIN
to T
MAX
, unless otherwise noted. Typical val-
ues are at V
CC
= +4V, VL = +1.8V, V
TRM
= +3.3V, and TA= +25°C.) (Notes 3, 4)
Note 3: All currents into the device are negative; currents out of the device are positive. All voltages are referenced to device
ground unless otherwise specified.
Note 4: Parameters are 100% production tested at +25°C, limits over temperature are guaranteed by design.
Note 5: The V
BUS
current source and current gate time vary together with process and temperature such that the resulting V
BUS
pulse is guaranteed to drive a <13µF load to a voltage >2.0V, and to drive a >96µF load to a volatge <2.2V. See the SRP
V
BUS
Pulsing section for an explanation of this self-timed pulse.
Note 6: Guaranteed by design, not production tested.
Note 7: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling
edge.
Note 8: C
B
is total capacitance of one bus line in pF. Tested with CB= 400pF.
Note 9: Input filters on SDA, SCL, and ADD suppress noise spikes less than 50ns.
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITS
INT Out Fall TimeC
ID_OUT Rise TimeC
ID_OUT Fall TimeC
Time to Exit Shutdown500µs
Time to Enter Shutdown1000µs
= 50pF20ns
LOAD
= 50pF30ns
LOAD
= 50pF10ns
LOAD
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITS
Serial Clock Frequencyf
Bus Free Time Between Stop and
Start Conditions
Start Condition Hold Timet
Stop Condition Setup Timet
Clock Low Periodt
Clock High Periodt
Data Setup Timet
Data Hold Timet
Maximum Receive SCL/SDA Rise
Time
Minimum Receive SCL/SDA Rise
Time
Maximum Receive SCL/SDA Fall
Time
Minimum Receive SCL/SDA Fall
Time
Transmit SDA Fall Time (Note 4)
Pulse Width of Suppressed Spiket
SCL
t
BUF
HD:STA
SU:STO
LOW
HIGH
SU:DAT
HD:DAT
t
R
t
R
t
F
t
F
t
F
t
F
SP
DC400kHz
1.3µs
0.6µs
0.6µs
1.3µs
0.6µs
100ns
(Note 7)00.9µs
(Note 8)300ns
(Note 8)20 + 0.1C
B
(Note 8)300ns
(Note 8)20 + 0.1C
CB = 400pF, I
CB = 50pF, I
= 3mA, VL ≥ 2.5V20 + 0.1C
SDA
= 3mA, VL < 2.520 + 0.1C
SDA
B
B
B
250
250
(Note 9)50ns
ns
ns
ns
MAX3353E
USB On-the-Go Charge Pump with Switchable
Pullup/Pulldown Resistors
The MAX3353E integrates a regulated charge pump,
switchable pullup/pulldown resistors, and an I2Ccompatible 2-wire serial interface. The internal level
shifter allows the device to operate with logic supply voltages (VL) between +1.65V and VCC. The MAX3353E’s
OTG-compliant charge pump operates with input supply
voltages (VCC) from +2.6V to +5.5V and supplies an
OTG-compatible output on V
BUS
while sourcing 8mA
output current.
The MAX3353E level-detector comparators monitor important V
BUS
voltages needed to support SRP and HNP and
provides an interrupt output signal for OTG events that
require action. The V
BUS
power-control block performs the
various switching functions required by an OTG dual-role
device and is programmable by system logic.
For OTG operation, D+ and D- are connected to switchable pulldown resistors (host) and switchable pullup
resistors (peripheral) controlled by internal registers.
Charge Pump
The MAX3353E’s OTG-compliant charge-pump operates
with input supply voltages (VCC) from +2.6V to +5.5V
and supplies an OTG-compatible output on V
BUS
with
the capability of sourcing 8mA (min) output current.
When V
BUS
is not providing power, an input impedance
of no more than 100kΩ and no less than 40kΩ to GND is
present on V
BUS
. When V
BUS
provides power, the rise
time on V
BUS
from 0 to 4.4V is no longer than 100ms
when driving a constant current load of 8mA and an
external load capacitance of 13µF.
During a continuous short circuit on V
BUS
, the chargepump output is current limited to 140mA (typ). Thermalshutdown circuitry turns off the charge pump if the die
temperature exceeds +150°C and restarts when the die
cools to 140°C.
Level Shifters
Internal level shifters allow the system-side interface to
run at logic supply voltages as low as 1.65V. Interface
logic signals are referenced to the voltage applied to VL.