MAXIM MAX3301E, MAX3302E User Manual

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General Description
The MAX3301E/MAX3302E fully integrated USB On-the­Go (OTG) transceivers and charge pumps allow mobile devices such as PDAs, cellular phones, and digital cameras to interface directly with USB peripherals and each other without the need of a host PC. Use the MAX3301E/MAX3302E with an embedded USB host to directly connect to peripherals such as printers or external hard drives.
The MAX3301E/MAX3302E integrate a USB OTG trans­ceiver, a V
BUS
charge pump, a linear regulator, and an
I
2
C-compatible, 2-wire serial interface. An internal level shifter allows the MAX3301E/MAX3302E to interface with +1.65V to +3.6V logic supply voltages. The MAX3301E/MAX3302E’s OTG-compliant charge pump operates with +3V to +4.5V input supply voltages, and supplies an OTG-compatible output on V
BUS
while
sourcing more than 8mA of output current. The MAX3301E/MAX3302E enable USB OTG communi-
cation from highly integrated digital devices that cannot supply or tolerate the +5V V
BUS
levels that USB OTG requires. The device supports USB OTG session-request protocol (SRP) and host-negotiation protocol (HNP).
The MAX3301E/MAX3302E provide built-in ±15kV elec­trostatic-discharge (ESD) protection for the V
BUS
, ID_IN, D+, and D- terminals. The MAX3301E/MAX3302E are available in 25-bump chip-scale (UCSP™), 28-pin TQFN, and 32-pin TQFN packages and operate over the extended -40°C to +85°C temperature range.
Applications
Mobile Phones Digital Cameras PDAs MP3 Players
Features
USB 2.0-Compliant Full-/Low-Speed OTG
Transceivers
Ideal for USB On-the-Go, Embedded Host, or
Peripheral Devices
±15kV ESD Protection on ID_IN, V
BUS
, D+, and D-
Terminals
Charge Pump for V
BUS
Signaling and Operation
Down to 3V
Internal V
BUS
and ID Comparators
Internal Switchable Pullup and Pulldown
Resistors for Host/Peripheral Functionality
I2C Bus Interface with Command and Status
Registers
Linear Regulator Powers Internal Circuitry and
D+/D- Pullup Resistors
Support SRP and HNP
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-3275; Rev 2; 1/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART
PACKAGE
SIZE
(mm)
PIN­PACKAGE
PKG
CODE
MAX3301EEBA-T
2.5 x 2.5 25 UCSP
B25-1
MAX3301EETJ 5 x 5
T3255-4
MAX3302EEBA-T*
2.5 x 2.5 25 UCSP
B25-1
MAX3302EETI 4 x 4
T2844-1
Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these compo­nents in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. UCSP is a trademark of Maxim Integrated Products, Inc.
Note: All devices specified over the -40°C to +85°C operating range.
UCSP bumps are in a 5 x 5 array. The UCSP package size is
2.5mm x 2.5mm x 0.62mm. Requires solder temperature profile described in the Absolute Maximum Ratings section. UCSP reli­ability is integrally linked to the user’s assembly methods, circuit board material and environment. See the UCSP Applications Information section of this data sheet for more information.
*Future product—contact factory for availability. **EP = Exposed paddle.
PART
POWER-UP STATE
I2C ADDRESSES FOR
SPECIAL-FUNCTION
REGISTER 2
MAX3301E
Shutdown (sdwn = 1, bit 0 of special­function register 2)
16h, 17h
MAX3302E
Operating (sdwn = 1, bit 0 of special­function register 2)
10h, 11h, and 16h, 17h
Selector Guide
The MAX3301E powers up in its lowest power state and the
MAX3302E powers up in the operational, VP/VM USB mode.
Pin Configurations appear at end of data sheet.
32 TQFN-EP**
28 TQFN-EP**
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC= +3V to +4.5V, VL= +1.65V to +3.6V, C
FLYING
= 100nF, C
VBUS
= 1µF, ESR
CVBUS
= 0.1(max), TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.7V, VL= +2.5V, TA= +25°C.) (Note 2)
Note 1: The UCSP package is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recom­mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
All voltages are referenced to GND. V
CC
, VL.....................................................................-0.3V to +6V
TRM (regulator off or supplied by V
BUS
)..-0.3V to (V
BUS
+ 0.3V)
TRM (regulator supplied by V
CC
)...............-0.3V to (VCC+ 0.3V)
D+, D- (transmitter tri-stated) ...................................-0.3V to +6V
D+, D- (transmitter functional)....................-0.3V to (V
CC
+ 0.3V)
V
BUS
.........................................................................-0.3V to +6V
ID_IN, SCL, SDA.......................................................-0.3V to +6V
INT, SPD, RESET, ADD, OE/INT, RCV, VP,
VM, SUS, DAT_VP, SE0_VM ......................-0.3V to (V
L
+ 0.3V)
C+.............................................................-0.3V to (V
BUS
+ 0.3V)
C-................................................................-0.3V to (V
CC
+ 0.3V)
Short-Circuit Duration, V
BUS
to GND .........................Continuous
Continuous Power Dissipation (T
A
= +70°C)
5 x 5 UCSP (derate 12.2mW/°C above +70°C) ...........976mW
32-Pin TQFN (5mm x 5mm x 0.8mm) (derate 21.3mW/°C
above +70°C).............................................................1702mW
28-Pin TQFN (4mm x 4mm x 0.8mm) (derate 20.8mW/°C
above +70°C).............................................................1666mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Reflow Temperature (Note 1)
Infrared (15s) ...............................................................+200°C
Vapor Phase (20s) .......................................................+215°C
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage V
CC
3.0 4.5 V
TRM Output Voltage V
TRM
3.0 3.6 V
Logic Supply Voltage V
L
V
VL Supply Current I
VL
I2C interface in steady state 5 µA
VCC Operating Supply Current I
CC
USB normal mode, CL = 50pF, device switching at full speed
10 mA
vbus_drv = 1, I
VBUS
= 0 1.4 2
VCC Supply Current During Full­Speed Idle
vbus_drv = 0, D+ = high, D- = low 0.5 0.8
mA
VCC Shutdown Supply Current
)
3.5 10 µA
VCC Interrupt Shutdown Supply Current
)
ID_IN floating or high 20 30 µA
VCC Suspend Supply Current USB suspend mode, ID_IN floating or high
500 µA
LOGIC I/O
RC V , D AT_V P , S E 0_V M , INT, OE/INT, V P , V M Outp ut H i g h
V ol tag e
V
OH
I
OUT
= 1mA (sourcing)
V
RCV, DAT_VP, SE0_VM, INT, OE/INT, VP, VM Output Low Voltage
V
OL
I
OUT
= 1mA (sinking) 0.4 V
OE/INT, SPD, SUS, RESET, DAT_VP, SE0_VM Input High Voltage
V
IH
V
I
CC(SHDN
I
CC(ISHDN
1.65 3.60
170
V L - 0.4
2/3 x V
L
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
_______________________________________________________________________________________ 3
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3V to +4.5V, VL= +1.65V to +3.6V, C
FLYING
= 100nF, C
VBUS
= 1µF, ESR
CVBUS
= 0.1(max), TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.7V, VL= +2.5V, TA= +25°C.) (Note 2)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
OE/INT, SPD, SUS, RESET DAT_VP, SE0_VM Input Low Voltage
V
IL
0.4 V
ADD Input High Voltage V
IHA
V
ADD Input Low Voltage V
ILA
V
Input Leakage Current ±A
TRANSCEIVER SPECIFICATIONS
Differential Receiver Input Sensitivity
|V
D+
- VD-| 0.2 V
Differential Receiver Common­Mode Voltage
0.8 2.5 V
Single-Ended Receiver Input Low Voltage
V
ILD
D+, D- 0.8 V
Single-Ended Receiver Input High Voltage
V
IHD
D+, D- 2.0 V
S i ng l e- E nd ed Recei ver H yster esi s
0.2 V
S i ng l e- E nd ed Outp ut Low V ol tag e
V
OLD
D+, D-, RL = 1.5k from D+ or D- to 3.6V 0.3 V
S i ng l e- E nd ed Outp ut H i g h V ol tag e
V
OHD
D+, D-, RL = 15k from D+ or D- to GND 2.8 3.6 V
Off-State Leakage Current D+, D- ±1µA
213
Driver Output Impedance
D+, D-, not including R
EXT
213
ESD PROTECTION (V
BUS
, ID_IN, D+, D-)
Human Body Model
kV
IEC 61000-4-2 Air-Gap Discharge
kV
IEC 61000-4-2 Contact Discharge
±6kV
THERMAL SHUTDOWN
Thermal Shutdown Low-to-High
o
C
Thermal Shutdown High-to-Low
o
C
CHARGE-PUMP SPECIFICATIONS (vbus_drv = 1)
V
BUS
Output Voltage V
BUS
3V < V
C C
< 4.5V, C
V BUS
= 10µF, I
V BUS
= 8m A
V
V
BUS
Output Current I
VBUS
8mA
V
BUS
Output Ripple I
VBUS
= 8mA, C
VBUS
= 10µF
mV
2/3 x V
L
1/3 x V
L
Low steady-state drive
High steady-state drive
±15
±10
+160
+150
4.80 5.25
100
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
4 _______________________________________________________________________________________
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC= +3V to +4.5V, VL= +1.65V to +3.6V, C
FLYING
= 100nF, C
VBUS
= 1µF, ESR
CVBUS
= 0.1(max), TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.7V, VL= +2.5V, TA= +25°C.) (Note 2)
PARAMETER
SYM B O L
CONDITIONS
MIN
TYP
MAX
UNITS
Switching Frequency f
SW
kHz
V
BUS
Leakage Voltage vbus_drv = 0 0.2 V
V
BUS
Rise Time
C
VBUS
= 10µF, I
VBUS
= 8mA, measured
from 0 to +4.4V
100 ms
V
BUS
Pulldown Resistance
3.8 5 6.5 k
V
BUS
Pullup Resistance
V
BUS
Input Impedance
40 70 100 k
COMPARATOR SPECIFICATIONS
V
B U S
V al i d C om p ar ator Thr eshol d
4.4 4.6 4.8 V
V
B U S
V al i d C om p ar ator H yster esi s
50 mV
Session-Valid Comparator Threshold
V
TH-
0.8 1.4 2.0 V
Session-End Comparator Threshold
V
TH-
0.2 0.5 0.8 V
dp_hi Comparator Threshold 0.8 1.3 2.0 V
dm_hi Comparator Threshold 0.8 1.3 2.0 V
cr_int Pulse Width
ns
cr_int Comparator Threshold 0.4 0.5 0.6 V
ID_IN SPECIFICATIONS
ID_IN Input Voltage for Car Kit
0.2 x
0.8 x V
ID_IN Input Voltage for A Device
0.1 x V
ID_IN Input Voltage for B Device
0.9 x V
ID_IN Input Impedance Z
ID_IN
70
130 k
ID_IN Input Leakage Current ID_IN = V
CC
-1 +1 µA
ID_IN Pulldown Resistance id_pulldown = 1
300
TERMINATING RESISTOR SPECIFICATIONS (D+, D-)
D+ Pulldown Resistor dp_pulldown = 1
15
k
D- Pulldown Resistor dm_pulldown = 1
15
k
D+ Pullup Resistor dp_pullup = 1
1.5
k
D- Pullup Resistor dm_pullup = 1
1.5
k
Z
INVBUS
V
TH-VBUS
V
HYS-VBUS
390
vb us_d ischrg = 1, vb us_d r v = 0, vb us_chr g = 0
vb us_chr g = 1, vb us_d r v = 0, vbus_di schr g = 0 650 930 1250
vb us_d ischrg = 0, vb us_d r v = 0, vb us_chr g = 0
SESS_VLD
SESS_END
750
V
CC
V
CC
100
150
14.25
14.25
1.425
1.425
V
CC
V
CC
15.75
15.75
1.575
1.575
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
_______________________________________________________________________________________ 5
TIMING CHARACTERISTICS
(VCC= +3V to +4.5V, VL= +1.65V to +3.6V, C
FLYING
= 100nF, C
VBUS
= 1µF, ESR
CVBUS
= 0.1(max), TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.7V, VL= +2.5V, TA= +25°C.) (Note 2)
PARAMETER
CONDITIONS
UNITS
TRANSMITTER CHARACTERISTICS (FULL-SPEED MODE)
D+, D- Rise Time t
R
Figures 2 and 5 4 20 ns
D+, D- Fall Time t
F
Figures 2 and 5 4 20 ns
Rise-/Fall-Time Matching Figures 2 and 5 (Note 3) 90
%
Output-Signal Crossover Voltage
V
CRS_F
Figures 2, 6, and 7 (Note 3) 1.3 2.0 V
TRANSMITTER CHARACTERISTICS (LOW-SPEED MODE)
D+, D- Rise Time t
R
Figures 2 and 5 75
ns
D+, D- Fall Time t
F
Figures 2 and 5 75
ns
Rise-/Fall-Time Matching Figures 2 and 5 80
%
Output-Signal Crossover Voltage
V
CRS_L
Figures 2, 6, and 7 1.3 2.0 V
TRANSMITTER TIMING (FULL-SPEED MODE)
t
PLH
Low-to-high, Figures 2 and 6 25
Driver Propagation Delay (DAT_VP, SE0_VM to D+, D-)
t
PHL
High-to-low, Figures 2 and 6 25
ns
Driver Disable Delay t
PDZ
Figures 1 and 8 25 ns
Driver Enable Delay t
PZD
Figures 2 and 8 25 ns
TRANSMITTER TIMING (LOW-SPEED MODE) (Low-speed delay timing is dominated by the slow rise and fall times.)
SPEED-INDEPENDENT TIMING CHARACTERISTICS
Receiver Disable Delay t
PVZ
Figure 4 30 ns
Receiver Enable Delay t
PZV
Figure 4 30 ns
D+ Pullup Assertion Time During HNP 3 µs
RCV Rise Time t
R
Figures 3 and 5, CL = 15pF 4 ns
RCV Fall Time t
F
Figures 3 and 5, CL = 15pF 4 ns
Figures 3 and 10, |D+ - D-| to DAT_VP 30
Differential-Receiver Propagation Delay
Figures 3 and 9, |D+ - D-| to RCV 30
ns
Single-Ended-Receiver Propagation Delay
Figures 3 and 9, D+, D- to DAT_VP, SE0_VM
30 ns
Interrupt Propagation Delay
µs
V
BUS_CHRG
Propagation Delay Dominated by the V
BUS
rise time 0.2 µs
Time to Exit Shutdown s
Shutdown Delay 10 µs
SYM B O L
t
PHL
, t
PLH
t
, t
PHL
PLH
MIN TYP MAX
110
300
300
125
100
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
6 _______________________________________________________________________________________
I2C-/SMBus™-COMPATIBLE TIMING SPECIFICATIONS
(VCC= +3V to +4.5V, VL= +1.65V to +3.6V, C
FLYING
= 100nF, C
VBUS
= 1µF, ESR
CVBUS
= 0.1(max), TA= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at V
CC
= +3.7V, VL= +2.5V, TA= +25°C.) (Note 2)
PARAMETER
CONDITIONS
Serial Clock Frequency f
SCL
400 kHz
Bus-Free Time Between Stop and Start Conditions
t
BUF
1.3 µs
Start-Condition Hold Time
0.6 µs
Stop-Condition Setup Time
0.6 µs
Clock Low Period t
LOW
1.3 µs
Clock High Period t
HIGH
0.6 µs
Data Setup Time
ns
Data Hold Time
(Note 4) 0.9 µs
Rise Time of SDA and SCL t
R
(Note 5)
0.1 x C
B
300 ns
Fall Time of SDA and SCL t
F
300 ns
Capacitive Load for each Bus Line
C
B
400 pF
SDA AND SCL I/O STAGE CHARACTERISTICS
Input-Voltage Low V
IL
0.3 x V
L
V
Input-Voltage High V
IH
0.7 x V
L
V
SDA Output-Voltage Low V
OL
I
SINK
= 3mA 0.4 V
Pulse Width of Suppressed Spike
t
SP
(Note 6) 50 ns
Note 2: Parameters are 100% production tested at +25°C. Limits over temperature are guaranteed by design. Note 3: Guaranteed by bench characterization. Limits are not production tested. Note 4: A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling
edge.
Note 5: C
B
is the total capacitance of one bus line in pF, tested with CB= 400pF.
Note 6: Input filters on SDA, SCL, and ADD suppress noise spikes of less than 50ns.
SMBus™ is a trademark of Intel Corporation.
SYM B O L
t
HD_STA
t
SU_STO
MIN TYP MAX UNITS
t
SU_DAT
t
HD_DAT
100
20 +
Measured from 0.3 x VL to 0.7 x VL (Note 5)
DRIVER PROPAGATION DELAY HIGH-TO-LOW
(FULL-SPEED MODE)
MAX3301E toc09
4ns/div
D+ 1V/div
D­1V/div
DAT_VP 1V/div
DRIVER PROPAGATION DELAY LOW-TO-HIGH
(LOW-SPEED MODE)
MAX3301E toc08
100ns/div
D­1V/div
D+ 1V/div
DAT_VP 1V/div
DRIVER PROPAGATION DELAY HIGH-TO-LOW
(LOW-SPEED MODE)
MAX3301E toc07
100ns/div
D+ 1V/div
D­1V/div
DAT_VP 1V/div
TIME TO EXIT SHUTDOWN
MAX3301E toc05
4µs/div
D­1V/div
D+ 1V/div
SCL 1V/div
V
BUS
DURING SRP
MAX3301E toc06
20ns/div
V
BUS
1V/div
V
BUS
1V/div
C
VBUS
> 96µF
C
VBUS
> 13µF
TIME TO ENTER SHUTDOWN
MAX3301E toc04
100ns/div
D+ 1V/div
D­1V/div
SCL 2V/div
V
BUS
OUTPUT VOLTAGE
vs. INPUT VOLTAGE (V
CC
)
MAX3301E toc03
INPUT VOLTAGE (VCC) (V)
V
BUS
OUTPUT VOLTAGE (V)
5.55.04.54.03.53.0
4.75
5.00
5.25
5.50
5.75
4.50
2.5 6.0
LINEAR REGULATOR POWERED BY V
CC
I
VBUS
= 8mA
I
VBUS
= 0
V
BUS
OUTPUT VOLTAGE
vs. V
BUS
OUTPUT CURRENT
MAX3301E toc02
V
BUS
OUTPUT CURRENT (mA)
V
BUS
OUTPUT VOLTAGE (V)
252015105
4.25
4.50
4.75
5.00
5.25
5.50
4.00 030
VCC = 3.0V V
CC
= 4.2V
LINEAR REGULATOR POWERED BY V
CC
INPUT CURRENT (ICC)
vs. V
BUS
OUTPUT CURRENT
MAX3301E toc01
V
BUS
OUTPUT CURRENT (mA)
INPUT CURRENT (I
CC
) (mA)
161284
10
20
30
40
50
0
020
VCC = 3.3V V
CC
= 4.2V
LINEAR REGULATOR POWERED BY V
CC
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
_______________________________________________________________________________________ 7
Typical Operating Characteristics
(Typical operating circuit, VCC= +3.7V, VL= +2.5V, C
FLYING
= 100nF, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. TEMPERATURE
MAX3301E toc15
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
603510-15
0.2
0.4
0.6
0.8
1.0
0
-40 85
V
BUS
OFF
FULL-SPEED IDLE
VCC = 3.3V
VCC = 4.2V
DRIVER DISABLE DELAY
(LOW-SPEED MODE)
MAX3301E toc14
10ns/div
D+ 1V/div
D­1V/div
OE/INT 1V/div
DRIVER ENABLE DELAY
(LOW-SPEED MODE)
MAX3301E toc13
100ns/div
D­1V/div
D+ 1V/div
CD+ = CD- = 400pF
OE/INT 1V/div
DRIVER DISABLE DELAY
(FULL-SPEED MODE)
MAX3301E toc12
10ns/div
D+ 1V/div
D­1V/div
OE/INT 1V/div
DRIVER ENABLE DELAY
(FULL-SPEED MODE)
MAX3301E toc11
10ns/div
D­1V/div
D+ 1V/div
OE/INT 1V/div
DRIVER PROPAGATION DELAY LOW-TO-HIGH
(FULL-SPEED MODE)
MAX3301E toc10
4ns/div
D­1V/div
D+ 1V/div
DAT_VP 1V/div
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
8 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Typical operating circuit, VCC= +3.7V, VL= +2.5V, C
FLYING
= 100nF, TA= +25°C, unless otherwise noted.)
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
_______________________________________________________________________________________ 9
Pin Description
PIN
MAX3302E
28-PIN TQFN
MAX3301E
FUNCTION
12
System-Side Data Input/Output. DAT_VP is an input if OE/INT is logic 0. DAT_VP is an output if OE/INT is logic 1. Program the function of DAT_VP with the dat_se0 bit (bit 2 of control register 1, see Table 7).
2, 25 3, 29
D1,
E3
V
CC
Input Power Supply. Connect a +3V to +4.5V supply to VCC and bypass to GND with a 1µF capacitor. The supply range enables direct powering from one Li+ battery.
3, 9, 23
1, 4, 9, 12, 17,
25, 28
—N.C. No Connection. Not internally connected.
45C1C- Charge-Pump Flying-Capacitor Negative Terminal
56
System-Side Data Input/Output. SE0_VM is an input if OE/INT is logic 0. SE0_VM is an output if OE/INT is logic 1. Program the function of SE0_VM with the dat_se0 bit (bit 2 of control register 1, see Table 7).
6, 18 7, 21
B1,
GND Ground
78A1SDA I2C-Compatible Serial Data Interface. Open-drain data input/output.
810B2SCL I2C-Compatible Serial Clock Input
10 11 A2
O utp ut E nab l e. O E/INT contr ol s the i np ut or outp ut status of D AT_V P /S E 0_V M and D + /D - . W hen O E/INT i s l og i c 0, the d evi ce i s i n tr ansm i t m od e. W hen
O E/INT i s l og i c 1, the d evi ce i s i n r ecei ve m od e. When i n susp end m od e, O E/INT can b e p r og r am m ed to functi on as an i nter r up t outp ut that d etects the
sam e i nter r up ts as INT. The oe_i nt_en b i t ( b i t 5 of contr ol r eg i ster 1, see Tab l e
7) enab l es and d i sab l es the i nter r up t ci r cui tr y of O E/INT. The i r q _m od e b i t ( b i t 1 of sp eci al - functi on r eg i ster 2, see Tab l e 15) p r og r am s the outp ut confi g ur ati on of INT and O E/INT as op en- d r ai n or p ush- p ul l .
11 13 A3 RCV
D+ and D- Differential Receiver Output. In receive mode (see Table 4), when D+ is high and D- is low, RCV is high. In receive mode, when D+ is low and D- is high, RCV is low. RCV is low in suspend mode.
12 14 B3 SPD
Speed-Selector Input. Connect SPD to GND to select the low-speed data rate (1.5Mbps). Connect SPD to V
L
to select the full-speed data rate (12Mbps). Disable the SPD input by writing a 1 to spd_susp_ctl (bit 1 in special-function register 1, see Table 14). The speed bit (bit 0 of control register 1, see Table
7) determines the maximum data rate of the MAX3301E/MAX3302E when the SPD input is disabled.
13 15 A4 V
L
System-Side Logic-Supply Input. Connect to the system’s logic-level power supply, +1.65V to +3.6V. This sets the maximum output levels of the logic outputs and the input thresholds of the logic inputs. Bypass to GND with a
0.1µF capacitor.
14 16 A5 SUS
Active-High Suspend Input. Drive SUS low for normal USB operation. Drive SUS high to enable suspend mode. RCV asserts low in suspend mode. Disable the SUS input by writing a 1 to spd_susp_ctl (bit 1 in special-function register 1, see Table 14). The suspend bit (bit 1 of control register 1, see Table 7) determines the operating mode of the MAX3301E/MAX3302E when the SUS input is disabled.
NAME
D2 DAT_VP
C2 SE0_VM
C5
UCSP
32-PIN TQFN
OE/INT
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
10 ______________________________________________________________________________________
Pin Description (continued)
PIN
MAX3302E
28-PIN TQFN
MAX3301E
FUNCTION
15 18 B4 INT
Active-Low Interrupt Source. Program the INT output as push-pull or open­drain with the irq_mode bit (bit 1 of special-function register 2, see Tables 15 and 16).
16 19 B5
Active-Low Reset Input. Drive RESET low to asynchronously reset the MAX3301E/MAX3302E.
17 20
ADD I2C-Interface Address Selection Input. (See Table 5.)
19 22
ID Input. ID_IN is internally pulled up to VCC. The state of ID_IN determines ID bits 3 and 5 of the interrupt source register (see Table 10).
20 23
D-
USB Differential Data Input/Output. Connect D- to the D- terminal of the USB connector through a 27.4Ω ±1% series resistor.
21 24 E5 D+
USB Differential Data Input/Output. Connect D+ to the D+ terminal of the USB connector through a 27.4Ω ±1% series resistor.
22 26
VM
Single-Ended Receiver Output. VM functions as a receiver output in all operating modes. VM duplicates D-.
24 27 E4 TRM
USB Transceiver Regulated Output Voltage. TRM provides a regulated 3.3V output. Bypass TRM to GND with a 1µF ceramic capacitor installed as close to the device as possible. TRM normally derives power from V
CC
. TRM provides power to internal circuitry and provides the pullup voltage for the internal USB pullup resistor. Do not use TRM to power external circuitry. The reg_sel bit (bit 3 of special-function register 2, see Table 15 and Table 16) controls the TRM power source with software.
26 30
VP
Single-Ended Receiver Output. VP functions as a receiver output in all operating modes. VP duplicates D+.
27 31 E2
USB Bus Power. Use V
BUS
as an output to power the USB bus, or as an input to power the internal linear regulator. Bits 5 to 7 of control register 2 (see Table 8) control the charging and discharging functions of V
BUS
.
28 32 E1 C+ Charge-Pump Flying-Capacitor Positive Terminal
EP EP EP Exposed Paddle. Connect to GND or leave floating
Test Circuits and Timing Diagrams
DUT
27.4 220
TEST POINT
C
L
V
D+/D-
LOAD FOR DISABLE TIME (D+/D-) MEASUREMENT V = 0 FOR t
PHZ
.
V = V
TRM
FOR t
PLZ
.
C
L
= 50pF FOR FULL SPEED.
C
L
= 200pF TO 600pF FOR LOW SPEED.
Figure 1. Load for Disable Time Measurement
DUT
27.4
15k
TEST POINT
C
L
D+/D-
LOAD FOR
1) ENABLE TIME (D+/D-) MEASUREMENT
2) DAT_VP/SEO_VM TO D+/D- PROPAGATION DELAY
3) D+/D- RISE/FALL TIMES C
L
= 50pF FOR FULL SPEED.
C
L
= 200pF TO 600pF FOR LOW SPEED.
Figure 2. Load for Enable Time, Transmitter Propagation Delay, and Transmitter Rise/Fall Times
NAME
32-PIN TQFN
UCSP
RESET
C3
C4 ID_IN
D5
D4
D3
V
BUS
MAX3301E/MAX3302E
USB On-the-Go Transceivers and Charge Pumps
______________________________________________________________________________________ 11
Test Circuits and Timing Diagrams (continued)
90%
10%
V
OH
V
OL
t
R
t
F
Figure 5. Rise and Fall Times
t
PLH
D+
D-
V
CRS_F
, V
CRS_L
V
OLD
V
OHD
V
CRS_F
, V
CRS_L
DAT_VP
SE0_VM
t
PHL
Figure 6. Timing of DAT_VP, SE0_VM to D+, D- in VP_VM Mode (dat_se0 = 0)
t
PLH
D+
D-
V
CRS_F
, V
CRS_L
V
OLD
V
OHD
V
CRS_F
, V
CRS_L
DAT_VP
SE0_VM
t
PHL
Figure 7. Timing of DAT_VP, SE0_VM to D+/D- in DAT_SE0 Mode (dat_se0 = 1)
t
PDZ
D+ OR D-
V
OL
V
OLD
+ 0.3V
V
OHD
- 0.3V
V
OH
V
L
VL
/ 2 VL
/ 2
0V
t
PZD
OE/INT
Figure 8. Enable and Disable Timing
t
PHL
t
PHL
t
PLH
D+
D-
RCV
DAT_VP
SE0_VM
3V
0V
V
L
V
L
V
L
VL / 2
V
L
/ 2
V
L
/ 2
0V
0V
0V
t
PLH
t
PLH
t
PHL
D+/D- RISE/FALL TIMES 8ns, VL = 1.8V, 2.5V, OR 3.3V
Figure 9. D+/D- to RCV, DAT_VP, SE0_VM Propagation Delays (VP_VM Mode)
t
PHL
D+
D-
DAT_VP
SE0_VM
3V
0V
V
L
VL / 2
0V
t
PLH
D+/D- RISE/FALL TIMES 8ns, VL = 1.8V, 2.5V, OR 3.3V
Figure 10. D+/D- to DAT_VP, SE0_VM Propagation Delays (DAT_SE0 Mode)
DUT
TEST POINT
C
L
RCV, VP, VM, DAT_VP, SEO_VM
LOAD FOR
1) D+/D- TO RCV/VP/VM/DAT_VP/SEO_VM PROPAGATION DELAYS
2) RCV/VP/VM/DAT_VP/SEO_VM RISE/FALL TIMES (C
L
= 15pF)
Figure 3. Load for Receiver Propagation Delay and Receiver Rise/Fall Times
DUT
270
TEST POINT
V = 2/3 x V
L
DAT_VP SEO_VM
Figure 4. Load for DAT_VP, SE0_VM Enable/Disable Time Measurements
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