MAXIM MAX3100 Technical data
General Description
The MAX3100 universal asynchronous receiver transmitter (UART) is the first UART specifically optimized for
small microcontroller-based systems. Using an
SPI™/MICROWIRE™ interface for communication with
the host microcontroller (µC), the MAX3100 comes in a
compact 16-pin QSOP. The asynchronous I/O is suitable
for use in RS-232, RS-485, IR, and opto-isolated data
links. IR-link communication is easy with the MAX3100’s
infrared data association (IrDA) timing mode.
The MAX3100 includes a crystal oscillator and a baudrate generator with software-programmable divider ratios
for all common baud rates from 300 baud to 230k baud.
A software- or hardware-invoked shutdown lowers quiescent current to 10µA, while allowing the MAX3100 to
detect receiver activity.
An 8-word-deep first-in/first-out (FIFO) buffer minimizes
processor overhead. This device also includes a flexible
interrupt with four maskable sources, including address
recognition on 9-bit networks. Two hardware-handshaking control lines are included (one input and one output).
The MAX3100 is available in 14-pin plastic DIP and small,
16-pin QSOP packages in the commercial and extended
temperature ranges.
________________________Applications
Handheld Instruments
Intelligent Instrumentation
UART in SPI Systems
Small Networks in HVAC or Building Control
Isolated RS-232/RS-485: Directly Drives Opto-Couplers
Low-Cost IR Data Links for Computers/Peripherals
____________________________Features
♦ Small TQFN and QSOP Packages Available
♦ Full-Featured UART:
—IrDA SIR Timing Compatible
—8-Word FIFO Minimizes Processor
Overhead at High Data Rates
—Up to 230k Baud with a 3.6864MHz Crystal
—9-Bit Address-Recognition Interrupt
—Receive Activity Interrupt in Shutdown
♦ SPI/MICROWIRE-Compatible µC Interface
♦ Lowest Power:
—150µA Operating Current at 3.3V
—10µA in Shutdown with Receive Interrupt
♦ +2.7V to +5.5V Supply Voltage in Operating Mode
♦ Schmitt-Trigger Inputs for Opto-Couplers
♦ TX and RTS Outputs Sink 25mA for Opto-Couplers
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
________________________________________________________________
Maxim Integrated Products
1
Pin Configurations
19-1259; Rev 2; 1/09
PART
MAX3100CPD+
MAX3100CEE+ 0°C to +70°C
0°C to +70°C
TEMP RANGE PIN-PACKAGE
14 Plastic DIP
16 QSOP
Ordering Information
Typical Operating Circuit appears at end of data sheet.
SPI is a trademark of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
MAX3100EPD+
MAX3100EEE+ -40°C to +85°C
-40°C to +85°C 14 Plastic DIP
16 QSOP
MAX3100ETG+ -40°C to +85°C 24 TQFN-EP*
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
EP = Exposed pad.
TOP VIEW
DIN
DOUT
SCLK
IRQ
SHDN
GND
+ +
1
2
3
MAX3100
4
5
6
7
DIP
V
14
CC
13
TX
12
RX
11
RTSCS
CTS
10
X1
9
X2
8
N.C.
N.C.
TX
V
CC
DIN
N.C.
*EP = EXPOSED PAD, CONNECT EP TO GROUND
N.C.
18 17 16 15 14 13
19
20
21
22
23
24
+
123456
N.C.
CTS
RTS
RX
MAX3100
DOUT
TQFN-EP
SCLK
N.C.
N.C.
DIN
12
N.C.
11
X1
10
X2
GND
9
SHDN
8
*EP
CS
IRQ
N.C.
N.C.
7
DOUT
SCLK
N.C.
IRQ
SHDN
GND
1
2
3
CS
MAX3100
4
5
6
7
8
QSOP
16
15
14
13
12
11
10
9
V
TX
RX
RTS
N.C.
CTS
X1
X2
CC
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC= +2.7V to +5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are measured at 9600 baud at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND ...........................................................................+6V
Input Voltage to GND
(CS, SHDN, X1, CTS, RX, DIN, SCLK) ....-0.3V to (V
CC
+ 0.3V)
Output Voltage to GND
(DOUT, RTS, TX, X2) ..............................-0.3V to (V
CC
+ 0.3V)
IRQ...........................................................................-0.3V to 6V
TX, RTS Output Current ....................................................100mA
X2, DOUT, IRQ Short-Circuit Duration
(to V
CC
or GND) .........................................................Indefinite
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.00mW/°C above +70°C) .......... 800mW
QSOP (derate 8.30mW/°C above +70°C).....................667mW
TQFN (derate 33.3mW/°C above +70°C) ................2666.7mW
Operating Temperature Ranges
MAX3100C_ _ ......................................................0°C to +70°C
MAX3100E_ _ ...................................................-40°C to +85°C
Storage Temperature Range ............................ -65°C to +160°C
Lead Temperature (soldering, 10s) ................................ +300°C
I
SOURCE
= 25µA, TX only
V
IRQ
= 5.5V
I
SINK
= 4mA
DOUT only, CS = V
CC
Shutdown mode
Active mode
I
SOURCE
= 5mA
V
VCC= 3.3V
VX1= 0V and 5.5V
CONDITIONS
VCC- 0.5
V
OH
Output High Voltage
pF5C
OUT
Output Capacitance
µA±1I
LK
Output Leakage
V0.4V
OL
Output Low Voltage
pF5C
OUT
Output Capacitance
µA±1I
LK
Output Leakage
DOUT, TX, RTS: I
SINK
= 4mA
TX, RTS: I
SINK
= 25mA
V
pF5C
IN
Input Capacitance
V0.3 x V
CC
V
IL
Input Low Voltage
V0.7 x V
CC
V
IH
Input High Voltage
0.4
V
OL
Output Low Voltage
0.9
VX1= 0V and 5.5V
VV
CC
/ 2 0.2 x V
CC
V
IL
Input Low Voltage
V0.7 x VCCV
CC
/ 2V
IH
Input High Voltage
V0.05 x V
CC
V
HYST
Input Hysteresis
µA±1I
IL
Input Leakage
pF5C
IN
Input Capacitance
UNITSMIN TYP MAXSYMBOLPARAMETER
2
I
IN
Input Current µA
25
VCC- 0.5
mA
0.27 1
I
CC
VCCSupply Current in
Normal Mode
SHDN bit = 1 or SHDN = 0,
logic inputs are at 0V or V
CC
µA10I
CC
VCCSupply Current in
Shutdown
With 1.8432MHz crystal;
all other logic inputs are at
0V or V
CC
VCC= 5V
VCC= 3.3V 0.15 0.4
V2.7 5.5V
CC
Supply Voltage
LOGIC INPUTS (DIN, SCLK, CS, SHDN, CTS, RX)
OSCILLATOR INPUT (X1)
OUTPUTS (DOUT, TX, RTS)
IRQ OUTPUT (Open Drain)
POWER REQUIREMENTS
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC= +2.7V to +5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at TA= +25°C.)
C
LOAD
= 100pF
C
LOAD
= 100pF, RCS= 10kΩ
C
LOAD
= 100pF
CONDITIONS
ns100t
CL
SCLK Low Time
ns100t
CH
SCLK High Time
ns238t
CP
SCLK Period
ns0t
DH
DIN to SCLK Hold Time
ns100t
DS
DIN to SCLK Setup Time
ns100t
DO
SCLK Fall to DOUT Valid
ns0t
CSH
CS to SCLK Hold Time
ns100t
CSS
CS to SCLK Setup Time
ns100t
TR
CS High to DOUT Tri-State
ns100t
DV
CS Low to DOUT Valid
UNITSMIN TYP MAXSYMBOLPARAMETER
TX, RTS, DOUT: C
LOAD
= 100pF
(Note 1)
ns10t
r
Output Rise Time
ns200t
CSW
CS High Pulse Width
ns100t
CS0
SCLK Rising Edge
to CS Falling
(Note 1) ns200t
CS1
CS Rising Edge
to SCLK Rising
Figure 1. Detailed Serial-Interface Timing
TX, RTS, DOUT, IRQ: C
LOAD
= 100pF
ns10t
f
Output Fall Time
AC TIMING (Figure 1)
Note 1: t
CS0
and t
CS1
specify the minimum separation between SCLK rising edges used to write to other devices on the SPI bus
and the CS used to select the MAX3100. A separation greater than t
CS0
and t
CS1
ensures that the SCLK edge is ignored.
CS
t
CSS
t
DS
t
DH
t
DV
SCLK
DIN
DOUT
t
CSH
• • •
t
t
CL
CH
• • •
• • •
t
DO
• • •
t
CSH
t
TR
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
4 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
1000
900
800
700
600
500
400
300
SUPPLY CURRENT (μA)
200
100
0
-40 -20 40 60 100
020 80
TEMPERATURE (°C)
SUPPLY CURRENT vs. BAUD RATE
400
1.8432 MHz
CRYSTAL
350
300
250
200
SUPPLY CURRENT (μA)
150
100
50
3V
TRANSMITTING
1000
100 10k
1.8432MHz CRYSTAL
TRANSMITTING AT
115.2 kbps
VCC = 5V
VCC = 3.3V
5V
TRANSMITTING
BAUD RATE (bps)
5V
STANDBY
3V
STANDBY
100k 1M
10
9
MAX3100-01
8
7
6
5
4
3
SHUTDOWN CURRENT (μA)
2
1
0
-40 -20 40 60 100
TX, RTS, DOUT OUTPUT CURRENT
vs. OUTPUT LOW VOLTAGE (V
70
60
MAX3100-03a
50
40
30
20
OUTPUT SINK CURRENT (mA)
10
0
0 0.20.1 0.6 0.7
SHUTDOWN CURRENT
vs. TEMPERATURE
1.8432MHz CRYSTAL
VCC = 5V
020 80
TEMPERATURE (°C)
CC
RTS
TX
DOUT
0.3 0.50.4 0.9
VOLTAGE (V)
0.8
= 3.3V)
700
MAX3100-02
600
500
400
300
SUPPLY CURRENT (μA)
200
100
0
90
80
MAX3100-04
70
60
50
40
30
OUTPUT SINK CURRENT (mA)
20
10
1.0
0
SUPPLY CURRENT vs.
EXTERNAL CLOCK FREQUENCY
V
= 5V
CC
V
= 3.3V
CC
01 3
EXTERNAL CLOCK FREQUENCY (MHz)
2
TX, RTS, DOUT OUTPUT CURRENT
vs. OUTPUT LOW VOLTAGE (V
RTS
DOUT
0 0.20.1 0.6 0.7
0.3 0.50.4 0.9
VOLTAGE (V)
0.8
4
CC
MAX3100-03
5
= 5V)
MAX3100-05
TX
1.0
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
_______________________________________________________________________________________ 5
Detailed Description
The MAX3100 universal asynchronous receiver transmitter (UART) interfaces the SPI/MICROWIRE-compatible, synchronous serial data from a microprocessor
(µP) to asynchronous, serial-data communication ports
(RS-232, RS-485, IrDA). Figure 2 shows the MAX3100
functional diagram.
The MAX3100 combines a simple UART and a baudrate generator with an SPI interface and an interrupt
generator. Configure the UART by writing a 16-bit word
to a write-configuration register, which contains the
baud rate, data-word length, parity enable, and enable
of the 8-word receive first-in/first-out (FIFO). The write
configuration selects between normal UART timing and
IrDA timing, controls shutdown, and contains 4 interrupt
mask bits.
Transmit data by writing a 16-bit word to a write-data
register, where the last 7 or 8 bits are actual data to be
transmitted. Also included is the state of the transmitted
parity bit (if enabled). This register controls the state of
the RTS output pin. Received words generate an inter-
rupt if the receive-bit interrupt is enabled.
Read data from a 16-bit register that holds the oldest
data from the receive FIFO, the received parity data,
and the logic level at the CTS input pin. This register
also contains a bit that is the framing error in normal
operation and a receive-activity indicator in shutdown.
The baud-rate generator determines the rate at which
the transmitter and receiver operate. Bits B0 to B3 in
the write-configuration register determine the baud-rate
divisor (BRD), which divides down the X1 oscillator frequency. The baud clock is 16 times the data rate (baud
rate).
Pin Description
PIN
QSOP DIP
NAME FUNCTION
1 1 23 DIN SPI/MICROWIRE Serial-Data Input. Schmitt-trigger input.
2 2 2 DOUT SPI/MICROWIRE Serial-Data Output. High impedance when CS is high.
3 3 3 SCLK SPI/MICROWIRE Serial-Clock Input. Schmitt-trigger input.
444CS
Active-Low Chip-Select Input. DOUT goes high impedance when CS is high,
IRQ, TX, and RTS are always active. Schmitt-trigger input.
655IRQ Active-Low Interrupt Output. Open-drain interrupt output to microprocessor.
768SHDN
Hardware-Shutdown Input. When shut down (SHDN = 0), the oscillator turns
off immediately without waiting for the current transmission to end, reducing
supply current to just leakage currents.
8 7 9 GND Ground
9 8 10 X2
Crystal Connection. Leave X2 unconnected for external clock. See Crystal-
Oscillator Operation—X1, X2 Connection section.
10 9 11 X1
Crystal Connection. X1 also serves as an external clock input. See Crystal-
Oscillator Operation—X1, X2 Connection section.
11 10 15 CTS
General-Purpose Active-Low Input. Read via the CTS register bit; often used
for RS-232 clear-to-send input (Table 1).
13 11 16 RTS
General-Purpose Active-Low Output. Controlled by the CTS register bit. Often
used for RS-232 request-to-send output or RS-485 driver enable.
14 12 17 RX
Asynchronous Serial-Data (receiver) Input. The serial information received
from the modem or RS-232/RS-485 receiver. A transition on RX while in
shutdown generates an interrupt (Table 5).
15 13 21 TX Asynchronous Serial-Data (transmitter) Output
16 14 22 V
CC
Positive Supply Pin (2.7V to 5.5V)
5, 12 —
1, 6, 7, 12,
13, 14, 18,
N.C. No Connection. Not internally connected.
— — — EP Exposed Pad. Connect EP to ground or leave unconnected.
TQFN-EP
19, 20, 24
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
6 _______________________________________________________________________________________
Figure 2. Functional Diagram
The transmitter section accepts SPI/MICROWIRE data,
formats it, and transmits it in asynchronous serial format
from the TX output. Data is loaded into the transmit-
buffer register from the SPI/MICROWIRE interface. The
MAX3100 adds start and stop bits to the data and
clocks the data out at the selected baud rate (Table 7).
Pt TX-BUFFER REGISTER
9
9
(SOURCES)
PrRT
IRQ
INTERRUPT
LOGIC
RA/FE
DIN
CS
SCLK
DOUT
(MASKS)
TRANSMIT-DONE (TM)
DATA-RECEIVED (RM)
PARITY (PM)
FRAMING ERROR (RAM)/
RECEIVE ACTIVITY
SPI
INTERFACE
SHDN
TX-SHIFT REGISTER
Pt
B0
B1
B2
B3
RX-SHIFT REGISTER
PrPrRX-BUFFER REGISTER
Pr
D0t–D7t
X1
BAUD-RATE
BAUD-RATE
GENERATOR
GENERATOR
X2
D0r–D7r
9
RX-BUFFER REGISTER
9
XTAL
RA
FE
START/STOP-
ACTIVITY
DETECT
BIT DETECT
I / O
TX
RX
CTS
RTS
MAX3100
The receiver section receives data in serial form. The
MAX3100 detects a start bit on a high-to-low RX transition (Figure 3). An internal clock samples data at 16
times the data rate. The start bit can occur as much as
one clock cycle before it is detected, as indicated by
the shaded portion. The state of the start bit is defined
as the majority of the 7th, 8th, and 9th sample of the
internal 16x baud clock. Subsequent bits are also
majority sampled. Receive data is stored in an 8-word
FIFO. The FIFO is cleared if it overflows.
The on-board oscillator can use a 1.8432MHz or
3.6864MHz crystal, or it can be driven at X1 with a 45%
to 55% duty-cycle square wave.
SPI Interface
The bit streams for DIN and DOUT consist of 16 bits,
with bits assigned as shown in the
MAX3100
Operations
section. DOUT transitions on SCLK’s falling
edge, and DIN is latched on SCLK’s rising edge (Figure
4). Most operations, such as the clearing of internal
registers, are executed only on CS’s rising edge. The
DIN stream is monitored for its first two bits to tell the
UART the type of data transfer being executed (Write
Config, Read Config, Write Data, Read Data).
Only 16-bit words are expected. If CS goes high in the
middle of a transmission (any time before the 16th bit),
the sequence is aborted (i.e., data does not get written
to individual registers). Every time CS goes low, a new
16-bit stream is expected. An example of a write configuration is shown in Figure 4.
SPI/MICROWIRE-Compatible
UART in QSOP-16
_______________________________________________________________________________________ 7
Figure 3. Start-Bit Timing
Figure 4. SPI Interface (Write Configuration)
ONE BAUD PERIOD
RX
A
BAUD
BLOCK
CS
SCLK
DIN
DOUT
1
1
11 FEN SHDN TM RM PM RAM IR ST PE L B3 B2 B1 B0
RT 00 000 00 00 00 000
23456 789
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
10 11
MAJORITY
CENTER
SAMPLER
12 13 14 15 16
DATA
UPDATED
MAX3100
SPI/MICROWIRE-Compatible
UART in QSOP-16
8 _______________________________________________________________________________________
MAX3100 Operations
Write Operations
Table 1 shows write-configuration data. A 16-bit
SPI/MICROWIRE write configuration clears the receive
FIFO and the R, T, RA/FE, D0r–D7r, D0t–D7t, Pr, and Pt
registers. RTS and CTS remain unchanged. The new
configuration is valid on CS’s rising edge if the transmit
buffer is empty (T = 1) and transmission is over. If the
latest transmission has not been completed, the registers are updated when the transmission is over (T = 0).
The write-configuration bits (FEN, SHDNi, IR, ST, PE, L,
B3–B0) take effect after the current transmission is
over. The mask bits (TM, RM, PM, RAM) take effect
immediately after the 16th clock’s rising edge at SCLK.
Read Operations
Table 2 shows read-configuration data. This register
reads back the last configuration written to the
MAX3100. The device enters test mode if bit 0 = 1. In
this mode, if CS = 0, the RTS pin acts as the 16x clock
generator’s output. This may be useful for direct baudrate generation (in this mode, TX and RX are in digital
loopback).
Normally, the write-data register loads the TX-buffer
register. To change the RTS pin’s state without writing
data, set the TE bit. Setting the TE bit high inhibits the
write command (Table 3).
Reading data clears the R bit and interrupt IRQ (Table 4).
Register Functions
Table 5 shows read/write operation and power-on reset
state (POR), and describes each bit used in programming the MAX3100. Figure 5 shows parity and wordlength control.
14
0
T
6
D6t
D6r
7
D7t
D7r
15 2
DIN 1 D2t
DOUT R D2r
BIT 3
D3t
D3r
0
D0t
D0r
1
D1t
D1r
4
D4t
D4r
5
D5t
D5r
10
TE
RA/FE
11
0
0
8
Pt
Pr
9
RTS
CTS
12
0
0
13
0
0
14
0
T
6
0
D6r
7
0
D7r
15 2
DIN 0 0
DOUT R D2r
BIT 3
0
D3r
0
0
D0r
1
0
D1r
4
0
D4r
5
0
D5r
10
0
RA/FE
11
0
0
8
0
Pr
9
0
CTS
12
0
0
13
0
0
Table 3. Write Data (D15, D14 = 1, 0)
Table 4. Read Data (D15, D14 = 0, 0)
14
1
T
6
0
ST
7
0
IR
15 2
DIN 0 0
DOUT R B2
BIT 3
0
B3
0
TEST
B0
1
0
B1
4
0
L
5
0
PE
10
0
RM
11
0
TM
8
0
RAM
9
0
PM
12
0
SHDNo
13
0
FEN
Table 2. Read Configuration (D15, D14 = 0, 1)
6
ST
0
7
IR
0
2
B2
0
3
B3
0
0
B0
0
1
B1
0
4
L
0
5
PE
0
10
RM
0
11
TM
0
8
RAM
0
9
PM
0
12
SHDNi
0
13
FEN
0
15 14
1
T
DIN 1
DOUT R
BIT
Table 1. Write Configuration (D15, D14 = 1, 1)