Maxim MAX2316EEI, MAX2314EEI, MAX2310EEI Datasheet

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General Description

The MAX2310/MAX2312/MAX2314/MAX2316 are IF
receivers designed for dual-band, dual-mode, and sin­gle-mode N-CDMA and W-CDMA cellular phone sys­tems. The signal path consists of a variable gain
amplifier (VGA) and I/Q demodulator. The devices fea­ture guaranteed +2.7V operation, a dynamic range of
over 110dB, and high input IP3 (-33dBm at 35dB gain,

1.7dBm at -35dB).
Unlike similar devices, the MAX2310 family of receivers

includes dual oscillators and synthesizers to form a
self-contained IF subsystem. The synthesizer’s refer­ence and RF dividers are fully programmable through a
3-wire serial bus, enabling dual-band system architec­tures using any common reference and IF frequency.
The differential baseband outputs have enough band­width to suit both N-CDMA and W-CDMA systems, and
offer saturated output levels of 2.7Vp-p at a low +2.75V
supply voltage. Including the low-noise voltage-con­trolled oscillator (VCO) and synthesizer, the MAX2310
draws only 26mA from a +2.75V supply in CDMA (dif­ferential IF) mode.

The MAX2310/MAX2312/MAX2314/MAX2316 are avail­able in 28-pin QSOP packages.

Applications

Single/Dual/Triple-Mode CDMA Handsets
Globalstar Dual-Mode Handsets
Wireless Data Links
Tetra Direct-Conversion Receivers
Wireless Local Loop (WLL)

Features

♦ Complete IF Subsystem Includes VCO and

Synthesizer

♦ Supports Dual-Band, Triple-Mode Operation
♦ VGA with >110dB Gain Control
♦ Quadrature Demodulator
♦ High Output Level (2.7V)
♦ Programmable Charge-Pump Current
♦ Supports Any IF Frequency Between 40MHz and

300MHz

♦ 3-Wire Programmable Interface
♦ Low Supply Voltage (+2.7V)

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators

with VCO and Synthesizer

________________________________________________________________

Maxim Integrated Products

1

19-1507; Rev 0a; 8/99

PART
MAX2310EEI
MAX2312EEI

-40°C to +85°C

-40°C to +85°C

TEMP. RANGE PIN-PACKAGE

28 QSOP
28 QSOP

EVALUATION KIT MANUAL

FOLLOWS DATA SHEET

Pin Configurations appear at end of data sheet.
Block Diagram appears at end of data sheet.

Ordering Information

Selector Guide

MAX2314EEI
MAX2316EEI

-40°C to +85°C

-40°C to +85°C 28 QSOP
28 QSOP

Single Band, Dual Mode

AMPS,

Cellular CDMA

MAX2314

Single Band, Single ModePCS CDMA

Dual Band, Triple Mode

AMPS,

Cellular CDMA,

PCS CDMA

MAX2310

MAX2312

DESCRIPTIONMODEPART

Single Band, Single Mode or

Single Band, Dual Mode with

External Discriminator

Cellular CDMAMAX2316 40MHz to 150MHz

40MHz to 150MHz

67MHz to 300MHz

40MHz to 300MHz

INPUT RANGE

I

CC

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= +2.7V to +5.5V, MODE = DIVSEL = SHDN = STBY = BUFEN = high, differential output load = 10kΩ, TA= -40°C to +85°C,
registers set to default power-up settings. Typical values are at V

CC

= +2.75V and TA= +25°C, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND..............................................................-0.3V, +6.0V

SHDN to GND.............................................-0.3V to (V

CC

+ 0.3V)

STBY, BUFEN, MODE, EN, DATA,

CLK, DIVSEL ...........................................-0.3V to (V

CC

+ 0.3V)

VGC to GND...............-0.3V, the lesser of +4.2V or (V

CC

+ 0.3V)

AC Signals TankH ±, TankL ±,

REF, FM ±, CDMA ± .................................................1.0V peak

Digital Input Current SHDN, MODE, DIVSEL,

BUFEN, DATA, CLK, EN, STBY .....................................±10mA

Continuous Power Dissipation (T

A

= +70°C)

28-pin QSOP (derate 10mW/°C above T

A

= +70°C) ....800mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +160°C

Lead Temperature (soldering, 10sec) .............................+300°C

VCC= 2.75V

CDMA mode

I+ to I- and Q+ to Q-, PLL locked

50kΩ load

50kΩ load

SHDN = low

0.5V < V

VGC

< 2.3V

Addition for LO out (BUFEN = low)

CONDITIONS

VVCC- 1.4Common-Mode Output Voltage

mV-20 ±1.5 +20DC Offset Voltage

V0.5Lock Indicator Low (unlocked)

V2.0Lock Indicator High (locked)

µA1

VGC Control Input Current
During Shutdown

µA-5 5VGC Control Input Current

µA2I

IL

Logic Low Input Current

41.5

25.9 37.5

µA2I

IH

Logic High Input Current

V0.5Logic Low

V2.0Logic High

mA3 5.8I

CC

Register Shutdown Current

3.5

UNITSMIN TYP MAXSYMBOLPARAMETER

TA= +25°C
TA= -40°C to +85°C

I

CC

Supply Current (Note 1) mA

TA= +25°C
TA= -40°C to +85°C

FM IQ mode

40.6

25.4 36.7

TA= +25°C
TA= -40°C to +85°C

FM I mode

39.5

24.7 35.7

TA= +25°C
TA= -40°C to +85°C

STANDBY (VCO_H)

20.7

12.3 18.8

TA= +25°C
TA= -40°C to +85°C

STANDBY (VCO_L)

20.3

11.5 18.4

SHDN = low

µA1.5 10I

CC

Shutdown Current

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators

with VCO and Synthesizer

_______________________________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS

(MAX2310/MAX2314 or MAX2312/MAX2316 EV kit, VCC= +2.75V, registers set to default power-up states, f

IN

= 210.88MHz for

CDMA, f

IN

= 85.88MHz for FM, f

REF

= 19.68MHz, synthesizer locked with passive 2nd-order lead-lag loop filter, SHDN = high, VGC

set for +35dB voltage gain, differential output load = 10kΩ, all power levels referred to 50Ω, T

A

= +25°C, unless otherwise noted.)

(Note 2)

(Note 2)

Gain = +35dB

(Note 5)

Gain = -35dB

Gain = +35dB

Gain = -35dB

Gain = -35dB (Note 3)
Gain = +35dB (Note 4)

CONDITIONS

dBm

-31

IIP3Input Third-Order Intercept

-6.0

dB

6.36

NFDSB Noise Figure

62.9

dB56 61.3A

V

Maximum Voltage Gain

dB-54.8 -49A

V

Minimum Voltage Gain

Vp-p0.2V

REF

Frequency Reference Signal
Level

MHz39f

REF

MHz40 300f

IN

Input Frequency
Reference Frequency

dBm

-49

Input 0.25dB Desensitization

-14.8

dBm

-44 -38.3

P

1dB

Input 1dB Compression

-9 -6.4

1.7
dBm

-33.2

IIP3Input Third-Order Intercept

UNITSMIN TYP MAXSYMBOLPARAMETER

(Notes 6, 8) dBm

-44 -38.4

P

1dB

Input 1dB Compression

-20 -16.2

dB58.5 63.4A

V

Maximum Voltage Gain

dB-50.2 -47.4A

V

Minimum Voltage Gain

MHz4.2

Normalized to +25°C

Baseband 0.5dB Bandwidth

Differential

TA= T

MIN

to T

MAX

Vp-p2.7V

SAT

Saturated Output Level

mVp-p

dB±2.5

Maximum Gain Variation
Over Temperature

1LO to Baseband Leakage

dB+30 +35Quadrature Suppression

RL= 50Ω, BUFEN = low

(Note 2)

dBm-13.7P

LO

LOOUT Output Power

MHz

135 600f

VCO_H

VCO Tune Range

80 300f

VCO_L

SIGNAL PATH, CDMA MODE

SIGNAL PATH, FM_IQ MODE

SIGNAL PATH, CDMA and FM_IQ MODE

PHASE-LOCKED LOOP

Gain = +35dB

VGC= 0.5V (Note 6)

Gain = -35dB

Gain = -35dB

VGC= 0.5V (Note 6)

Gain = -35dB

Gain = +35dB

(Note 7)

Gain = +35dB

VGC= 2.3V (Note 6)

VGC= 2.3V (Note 6)

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)

(MAX2310/MAX2314 or MAX2312/MAX2316 EV kit, VCC= +2.75V, registers set to default power-up states, f

IN

= 210.88MHz for

CDMA, f

IN

= 85.88MHz for FM, f

REF

= 19.68MHz, synthesizer locked with passive 2nd-order lead-lag loop filter, SHDN = high, VGC

set for +35dB voltage gain, differential output load = 10kΩ, all power levels referred to 50Ω, T

A

= +25°C, unless otherwise noted.)

120kHz offset

30kHz offset

-119

12.5kHz offset

1kHz offset

(Note 6)

(Note 6)

CONDITIONS

-110

30kHz offset

12.5kHz offset

-105

1kHz offset

900kHz offset

-91

-100

-72

dBc-50Base Band Spurious due to PLL

-64

dBc/Hz

-125

LOOUT at 85MHz,
VCO_L Enabled (Note 9)

900kHz offset

kHz1500

Maximum Phase Detector
Comparison Frequency

kHz20

Minimum Phase Detector
Comparison Frequency

2047R1, R2REF Maximum Divide Ratio

2R1, R2REF Minimum Divide Ratio

16383M1, M2VCO Maximum Divide Ratio

dBc/Hz

-125

256M1, M2VCO Minimum Divide Ratio

UNITSMIN TYP MAXSYMBOLPARAMETER

120kHz offset

LOOUT at 210MHz,
VCO_H Enabled (Note 9)

Locked, CPX = 00

Acquisition, CPX = XX, TC = 1

105 150 190

-115

1480 2100 2650

Charge-Pump Source/Sink
Current

Note 1: FM_IQ and FM_I modes are not available on MAX2312 and MAX2316.
Note 2: Recommended operating frequency range.
Note 3: f

1

= 210.88MHz, f2= 210.89MHz, P

f1

= P

f2

= -15dBm.

Note 4: f

1

= 210.88MHz, f2= 210.89MHz, P

f1

= Pf2= -50dBm.

Note 5: Small-signal gain at 200kHz below the LO frequency will be reduced by less than 0.25dB when an interfering signal at

1.25MHz below the LO frequency is applied at the specified level.

Note 6: Guaranteed by design and characterization.
Note 7: f

1

= 85.88MHz, f2= 85.98MHz, P

f1

= Pf2= -15dBm.

Note 8: f

1

= 85.88MHz, f2= 85.98MHz, P

f1

= Pf2= -50dBm.

Note 9: Measured at LOOUT with BD = 0 (÷2 selected).

Locked, CPX = 10

Locked, CPX = 01

210 300 380

150 210 265

Locked, all values of CPX,

0.5V < VCP< V

CC

- 0.5V

Locked, CPX = 11

%0.2 10

Charge-Pump Source/Sink
Matching

µA

300 425 530

TURBO LOCK

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators

with VCO and Synthesizer

_______________________________________________________________________________________

5

Typical Operating Characteristics

(MAX2310/MAX2314 or MAX2312/MAX2316 EV kit, VCC= +2.75V, registers set to default power-up states, fIN= 210.88MHz for
CDMA, f

IN

= 85.88MHz for FM, f

REF

= 19.68MHz, synthesizer locked with passive 2nd-order lead-lag loop filter, SHDN = high, VGC

set for +35dB voltage gain, differential output load = 10kΩ, all power levels referred to 50Ω, T

A

= +25°C, unless otherwise noted.)

SUPPLY CURRENT (mA)

GAIN (dB)

RECEIVE SUPPLY CURRENT

vs. SUPPLY VOLTAGE

35.00

32.50

30.00

27.50

25.00

22.50

20.00

2.5 3.5 4.03.0 4.5 5.0 5.5

TA = +85°C

TA = +25°C

TA = -40°C

SUPPLY VOLTAGE (V)

GAIN vs. INPUT FREQUENCY

60

55

VGC = 2.5V

50

45

40

35

30

25

20

15

0 100 200 300 400 500

FREQUENCY (MHz)

RECEIVE SHUTDOWN CURRENT vs.

TA = +25°C

GAIN vs. V

TA = +85°C

VGC (V)

GC

0.014

0.012

MAX2310 toc01

0.010

0.008

0.006

0.004

SHUTDOWN CURRENT (mA)

0.002

0

2.0 3.0 3.52.5 4.0 4.5 5.0 5.5

SUPPLY VOLTAGE

TA = +25°C

SUPPLY VOLTAGE (V)

TA = +85°C

TA = -40°C

MAX2310 toc02

80

60

40

20

0

GAIN (dB)

TA = -40°C

-20

-40

-60

-80

0.5 1.0 1.5 2.0 2.5 3.0

THIRD-ORDER INPUT
INTERCEPT vs. GAIN

TA = -40°C

TA = +85°C

TA = +25°C

GAIN (dB)

60.0

59.5

MAX2310 toc04

59.0

58.5

58.0

57.5

RELATIVE GAIN (dB)

57.0

56.5

56.0

GAIN vs. BASEBAND FREQUENCY

0 468102 1214161820

FREQUENCY (MHz)

MAX2310 toc05

10

0

-10

-20

IIP3 (dBm)

-30

-40

-50

-60

-60 -20 0-40 20 40 60 80

NAX2310 toc03

MAX2310 toc06

NOISE FIGURE vs. GAIN

70

60

50

40

NF (dB)

30

20

10

0

-40 -20 -10 0-30 10 20 5040 6030 70
GAIN (dB)

MAX2310 toc07

NOISE FIGURE vs. TEMPERATURE

7.4

7.2

7.0

6.8

NF (dB)

6.6

6.4

6.2

6.0

-40 0 20-20 40 60 80 100
TEMPERATURE (°C)

MAX2310 toc08

VOLTS (1V/div)

VCO VOLTAGE vs. TIME

LOCK TIME

1.83ms

TIME (500µs/div)

MAX2310 toc09

SHDN

VCO
VOLTAGE

LOCK

Pin Description

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(MAX2310/MAX2314 or MAX2312/MAX2316 EV kit, VCC= +2.75V, registers set to default power-up states, fIN= 210.88MHz for
CDMA, f

IN

= 85.88MHz for FM, f

REF

= 19.68MHz, synthesizer locked with passive 2nd-order lead-lag loop filter, SHDN = high, VGC

set for +35dB voltage gain, differential output load = 10kΩ, all power levels referred to 50Ω, T

A

= +25°C, unless otherwise noted.)

LOOUT PORT

S22 vs. FREQUENCY

MAX2310 toc13

1: 108.63Ω (Re)

10.266Ω (1m)
40MHz
2: 134.99Ω (Re)

13.71Ω (1m)
150MHz
3: 158.83Ω (Re)

39.58Ω (1m)
300MHz

CDMA PORT

S11 vs. FREQUENCY

MAX2310 toc14

1: 10MHz, 375Ω - j56Ω
2: 85MHz, 285Ω - j200Ω
3: 210MHz, 73Ω - j169Ω
4: 600MHz, 2.1Ω - j34Ω

1

4

2

3

MAX2316MAX2314

PIN

NAME

11, 8 BYP

Bypass Node. Must be capacitively decoupled (bypassed)
to analog ground.

11

22 CP_OUT Charge-Pump Output 22
33 GND Analog Ground Reference33

5, 64, 5

TANKL+,

TANKL-

Differential Tank Input for Low-Frequency Oscillator—4, 5

4— DIVSEL High selects M1/R1; low selects M2/R2.4—

MAX2312MAX2310

FUNCTION

FM PORT

S11 vs. FREQUENCY

TANKL PORT

1/S11 vs. FREQUENCY

TANKH PORT

1/S11 vs. FREQUENCY

MAX2310 toc10

4

3

2

1

2

3

4

1: 641 - j428 10MHz
2: 27 - j162 85MHz
3: 4 - j73 210MHz
4: 1.8 - j39 600MHz

1

1: -3.06ms + j349µs, 100MHz
2: -3.01ms + j853µs, 160MHz
3: -3.11ms + j1.45ms, 240MHz
4: -3.04ms + j1.85ms, 300MHz

MAX2310 toc11

4

3

2

1

1: 1.98ms + j437µs, 100MHz
2: 2.18ms + j853µs, 160MHz
3: 2.11ms +j 2.53ms, 420MHz
4: 2.17ms +j 3.71ms, 600MHz

MAX2310 toc12

MAX2310/MAX2312/MAX2314/MAX2316

CDMA IF VGAs and I/Q Demodulators

with VCO and Synthesizer

_______________________________________________________________________________________ 7

Pin Description (continued)

27, 28 27, 28

Bypass Node. Must be capacitively decoupled (bypassed) to
analog V

CC

.

BYP27, 28 27, 28

23, 24 23, 24 Differential CDMA Input. Active in CDMA mode.

CDMA-,
CDMA+

23, 24 23, 24

25 — Differential Positive Input. Active in FM mode.FM+25 —

22 22 VGA Gain Control Input. Control voltage range is 0.5V to 2.3V.VGC22 22

20 20 Data input of the 3-wire serial bus.DATA20 20

19 19 Enable Input. When low, input shift register is enabled.

EN

19 19

18 18 Clock input of the 3-wire serial busCLK18 18

16, 17 16, 17

Differential Quadrature-Phase Baseband Output. Disabled if
FM_I mode is selected.

QOUT-,
QOUT+

16, 17 16, 17

15 15

Lock Output—open-collector pin. Logic high indicates phase­locked condition.

LOCK15 15

13, 14 13, 14

Differential In-Phase Baseband Output, or FM signal output
FM_I mode is selected.

IOUT+,

IOUT-

13, 14 13, 14

12 12

Shutdown Input—active low. Low powers down entire device,
including registers and serial interface.

SHDN

12 12

11 11 Reference Frequency InputREF11 11

— 8

Internal VCO Output. Depending on setting of BD bit, LOOUT
is either the VCO frequency (twice the IF frequency) or one­half the VCO frequency (equal to the IF frequency).

LOOUT— 8

6, 7 5, 6 Differential Tank Input for High-Frequency Oscillator

TANKH+,

TANKH-

— —

NAME FUNCTION

PIN

MAX2310 MAX2312 MAX2314 MAX2316

— 7 LO Buffer Amplifier—active low

BUFEN

— 7

— — No Connection. Must be left open-circuit.N.C.6, 7 —

8 —

Mode Select. High selects CDMA mode; low selects FM
mode.

MODE— —

10 10 Digital GroundGND10 10

9 9 +2.7V to +5.5V Supply for Digital Circuits

V

CC

9 9

21 21 2.7V to 5.5V Supply for Analog Circuits

V

CC

21 21

26 —

Differential Negative Input for FM signal. Bypass to GND for
single-ended operation.

FM-26 —

— 26

Standby Input—active low. Low powers down VGA and demod­ulator while keeping VCO, PLL, and serial bus on.

STBY

— 26

— 25 No Connection.N.C.— 25