The MAX2165 direct-conversion tuner IC is designed for
handheld digital video broadcast (DVB-H) applications.
The tuner covers a 470MHz to 780MHz input frequency
range and features an I/Q baseband interface.
The MAX2165’s direct-conversion architecture eliminates the need for an IF-SAW filter, allowing for
reduced bill of materials cost. The design integrates a
variable-gain, low-noise amplifier (LNA); a notch filter;
an RF tracking filter; a quadrature mixer; a power
detector; programmable baseband lowpass channelselection filters; baseband variable-gain amplifiers
(VGA); DC offset correction circuitry; and a complete
fractional-N frequency synthesizer. The part is programmable through a 2-wire I2C-compatible serial interface.
The MAX2165 integrates a tuneable notch filter. This filter is designed to notch out interfering signals in the
830MHz to 950MHz frequency range to allow for operation in the presence of large cellular signals.
Programmable baseband channel-selection filters allow
for operation with 7MHz and 8MHz channels. Digital DC
offset correction circuitry supports time-sliced operation
by minimizing power-up time delay. The fractional-N
synthesizer reduces VCO lock time and minimizes
close-in phase noise, eliminating the need for powerhungry, phase-noise reduction algorithms.
The MAX2165 is available in a tiny, 5mm x 5mm x
0.8mm, 28-pin thin QFN package with an exposed paddle. It is specified for operation over the -40°C to +85°C
extended temperature range.
Applications
DVB-H Handheld Receivers
DVB-T Portable Devices
DMB-T/H Portable Devices
ISDB-T Receivers (13 Segment)
Features
o 93mA (typ) Current Consumption from a Single
+2.85V Supply Voltage
o 21mW (typ) Average Power Consumption at 8%
Duty Cycle
o Direct-Conversion Architecture Eliminates IF-
SAW Filter
o Integrated RF Tuneable Notch Filter for Operation
in the Presence of Cellular Blockers
o Integrated DC Offset Correction Circuitry
o Integrated RF Notch Filter for Operation in the
Presence of Up to -7dBm Cellular Blockers
o Extended UHF Band Operation
o 5mm x 5mm x 0.8mm, 28-Pin Thin QFN Package
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All VCCPins to GND ..............................................-0.3V to +3.6V
GND_TUNE to GND ..............................................-0.3V to +0.3V
All Other Pins to GND.................................-0.3V to (V
CC
+ 0.3V)
BBI_, BBQ_ Short Circuit to Ground Duration ...............Indefinite
Maximum RF Input Power ..............................................+13dBm
(MAX2165 EV kit, VCC= +2.85V, default register settings, V
RF_AGC
= V
BB_AGC
= 2.3V, V
IOUT
= V
QOUT
= 500mV
P-P
, TA= +25°C,
unless otherwise noted.)
REFERENCE BUFFER OUTPUT SIGNAL
MAX2165 toc13
200mV/div
20ns/div
10kΩ || 10pF LOAD
Pin Description
POWER-DETECTOR OUTPUT VOLTAGE
4
3
2
1
POWER-DETECTOR OUTPUT VOLTAGE (V)
0
-70
vs. RF INPUT POWER
40kΩ PULLUP TO 2.85V
PD_TH[2:0] = 000
-60
RF INPUT POWER (dBm)
PD_TH[2:0] = 111
-50-40
MAX2165 toc12
-30
PINNAMEFUNCTION
1SDASerial-Data Input/Output. Requires a pullup resistor to VCC.
2SCLSerial-Clock Input. Requires a pullup resistor to VCC.
3N.C.No Connection. Connect this pin to ground.
4RFINRF Input. Internally matched to 75Ω. Requires a DC-blocking capacitor.
5ADDRAddress-Select Input. Selects the I2C slave address. See Table 20.
6VCC_RF
RF Power-Supply Input. Connect to a low-noise, power-supply voltage. Bypass to the PCB ground
plane with a 2200pF and 100nF capacitor placed as close as possible to the pin.
7LEXTExternal Inductor Connection. Connect to V
8RF_AGC
9SHDN
10STBY
11OVLD_DET
12VCC_BB
RF Gain-Control Voltage Input. Accepts voltages from 0.4V to 2.3V with 2.3V providing maximum RF
gain. This pin can also be controlled by the OVLD_DET output. See the Typical Application Circuit.
Shutdown Input. Drive this pin low to disable all internal circuits and to put the device into low-power
shutdown mode. Drive this pin high for normal operation.
Standby Input. Controls the power-up sequence of the chip. See the Power-Up Sequence section for
more information on this pin’s operation.
Overload-Detection Output. This output provides an error signal between the internal power-detector
output voltage and an internal programmable reference voltage. This output can be connected to the
RF_AGC input to implement a closed RF automatic gain-control loop.
Baseband Power-Supply Input. Connect to a low-noise power-supply voltage. Bypass to the PCB
ground plane with a 1000pF and 100nF capacitor placed as close as possible to the pin.
13BBQ-Inverting Quadrature Baseband Output
with a 39nH inductor.
CC
MAX2165
Detailed Description
Register Descriptions
The MAX2165 includes 15 programmable registers and
three read-only registers. See Table 1 for register configurations. The register configuration of Table 1 shows
each bit name and the bit usage information for all registers. U labeled under each bit name indicates that the
bit value is user defined to meet specific application
requirements. A 0 or 1 indicates that the bit must be set
to the defined 0 or 1 value for proper operation.
Operation is not tested or guaranteed if these bits are
programmed to other values and is only for
factory/bench evaluation. In typical application, always
program to the operation defined state.
See Tables 2–19 for detailed descriptions of each register. All registers must be written 100µs after power-up
and no earlier than 100µs after power-up.
19VTUNEVCO Tuning Voltage Input. Connect to the PLL loop filter output.
20GND_TUNEVCO Tuning Voltage Ground. Connect to the PCB ground plane.
21LDO
22CPCharge-Pump Output. Connect to the PLL loop filter input.
23VCC_SYN
24MUX
Baseband Gain-Control Voltage Input. Accepts voltages from 0.4V to 2.3V with 2.3V providing the
maximum baseband gain.
VCO Power-Supply Input. Connect to a low-noise power-supply voltage. Bypass to the PCB ground
plane with a 1000pF and 100nF capacitor placed as close as possible to the pin.
VCO Linear-Regulator Noise Bypass. Bypass to the PCB ground plane with a 470nF capacitor placed
as close as possible to the pin.
Synthesizer Power-Supply Input. Connect to a low-noise power-supply voltage. Bypass to the PCB
ground plane with a 1000pF and 100nF capacitor placed as close as possible to the pin.
Multiplexed Output Line. Output for various test functions, can also be used as a PLL lock-detect
indicator. See Table 9 for more information. When used as a PLL lock detector, logic-high indicates
PLL is not locked and logic-low indicates PLL is locked.
25REFOUT
26VCC_XTAL
27XB
28XE
EPEPExposed Paddle. Solder evenly to the board’s ground plane to achieve the lowest impedance path.
Reference Buffer Output. Provides a buffered crystal-oscillator signal that can be used as a clock
reference for the demodulator. Requires a DC-blocking capacitor.
Crystal-Oscillator Power-Supply Input. Connect to a low-noise power-supply voltage. Bypass to the
PCB ground plane with a 1000pF and 100nF capacitor placed as close as possible to the pin.
Reference Input. Connect to a parallel resonant mode crystal through a load-matching capacitor or to
a reference oscillator.
Reference-Oscillator Feedback Input. Connect to a capacitive feedback network when the on-chip
reference oscillator is used. Leave unconnected when an external reference is used.
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