Maxim MAX2106UCM Datasheet

General Description

The MAX2106 low-cost, direct-conversion tuner IC is
designed for use in digital direct-broadcast satellite
(DBS) television set-top box units and is a pin-for-pin
upgrade for the MAX2104. Its direct-conversion archi­tecture reduces system cost compared to devices with
IF-based architectures. The MAX2106 directly tunes L­band signals to baseband using a broadband I/Q
downconverter. The operating frequency range spans
925MHz to 2175MHz.

The IC includes a low-noise amplifier (LNA) with gain
control, I and Q downconverting mixers, lowpass filters
with gain and frequency control, a local oscillator (LO)
buffer with a 90° quadrature network, and a charge­pump-based phase-locked loop (PLL) for frequency
control. The MAX2106 has an on-chip LO, requiring
only an external varactor-tuned LC tank for operation.
The LO’s output drives the internal quadrature genera­tor and has a buffer amplifier to drive off-chip circuitry.
The MAX2106 comes in a 48-pin thin quad flat-pack
package with exposed paddle (EP).

Applications

Advantages Over MAX2104

♦ Improved Front End Achieves 10.2dB NF at 1550MHz

♦ Higher Input IIP3: 11.5dBm at 1550MHz

♦ Reduced Spurious Downconversion Products

♦ Capable of Using an External Synthesizer

Features

♦ Drop-In Replacement for MAX2104 Designs:

Requires Only Minor Software Upgrade and
Two External Resistor Value Changes

♦ Complete Low-Cost Solution for DBS Direct

Downconversion

♦ High Level of Integration Minimizes Component

Count

♦ 1MBaud to 45MBaud Operation

♦ Selectable LO Buffer

♦ +5V Single-Supply Operation

♦ 925MHz to 2175MHz Input Frequency Range

♦ On-Chip Quadrature Generator, Dual-Modulus

Prescaler (/32, /33)

♦ On-Chip Crystal Oscillator Amplifier

♦ PLL Phase Detector with Gain-Controlled Charge

Pump

♦ Input Levels: -25dBm to -68dBm per Carrier

♦ Over 50dB Gain Control Range

♦ Noise Figure = 10.2dB; IIP3 = +11.5dBm

(at 1550MHz)

♦ Automatic Baseband Offset Correction

MAX2106

DBS Direct Downconverter

________________________________________________________________ Maxim Integrated Products 1

19-1627; Rev 2; 6/03

Functional Diagram appears at end of data sheet.

Ordering Information

Pin Configuration

*Exposed paddle.

48 TQFP-EP*

PIN-PACKAGETEMP RANGE

0°C to +85°CMAX2106UCM

PART

PLLIN­PLLIN+
MOD­MOD+
LODIVSEL
IOUT+
IOUT­V

CC

QOUT+
QOUT­RFBAND
FLCLK

V

CC

CFLT

XTL-

XTL+

GND

V

CC

RFIN-

RFIN+

GND
GND

QDC-

QDC+

1

2

3

4

5

6

7

8

9

10

11

12

1314151617181920212223

24

4847464544434241403938

37

36

35

34

33

32

31

30

29

28

27

26

25

IDC-

IDC+

LOBUFSEL

GND

RFOUT

CPG1

V

CC

XTLOUT

CPG2

GC1

GC2

INSEL

CPFBGND

V

CC

TANK+

VRLO

TANK-

GND

GND

VCCLOBUF-/TPSOUT-

LOBUF+/FPSOUT+

TQFP

MAX2106

TOP VIEW

U.S. DSS Set-Top Receivers

European DVB-Compliant
Systems

Cellular Base Stations

Wireless Local Loop

Broadband Systems

LMDS

Professional Receivers

VSAT

Microwave Links

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

MAX2106

DBS Direct Downconverter

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(VCC= +4.75V to +5.25V, VFB= +2.4V, C

IOUT_

= C

QOUT_

= 10pF, ƒ

FLCLK

= 2MHz, RFIN_ = unconnected, R

IOUT_

= R

QOUT_

= 10kΩ,

V

LOBUFSEL

= 0.5V, V

R

FBAND

= V

INSEL

= V

CPG1

= V

CPG2

= +2.4V, V

PLLIN+

= V

MOD+

= +1.3V, V

PLLIN-

= V

MOD-

= +1.1V, TA= +25°C,

unless otherwise noted. Typical values are at V

CC

= +5V, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VCCto GND..............................................................-0.3V to +7V

All Other Pins to GND................................-0.3V to (V

CC

+ 0.3V)

RFIN+ to RFIN-, TANK+ to TANK-,

IDC+ to IDC-, QDC+ to QDC- .........................................±2V

IOUT_, QOUT_ to GND Short-Circuit Duration .......................10s

LOBUF+/PSOUT+, LOBUF-/PSOUT- Short-Circuit Duration..10s
Continuous Current (any pin other than V

CC

or GND)........20mA

Continuous Power Dissipation (T

A

= +70°C)

48-Pin TQFP-EP (derate 27mW/°C above +70°C) ..........1.5W

Operating Temperature ..........................................0°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

XTLOUT Output DC Voltage 1.9 V

RFBAND Input Current -200 200 µA

1.44 1.8 2.16

mA

0.48 0.6 0.72

V

CPG1

≥ 2.4V, V

CPG2

≥ 2.4V

V

CPG1

≥ 2.4V, V

CPG2

≤ 0.5V

0.24 0.3 0.36V

CPG1

≤ 0.5V, V

CPG2

≥ 2.4V

Operating Supply Current I

CC

195 275

mA

PARAMETER SYMBOL MIN TYP MAX UNITS

Input Current I

IN

-15 10 µA

Input Voltage Low V

IL

0.5 V

Input Voltage High V

IH

2.4 V

FLCLK Input Voltage High 1.85 V

FLCLK Input Voltage Low 1.45 V

FLCLK Input Current (Note 1) -1 1 µA

Operating Supply Voltage V

CC

4.75 5.25 V

Common-Mode Input Voltage V

CMI

1.08 1.2 1.32 V

Input Voltage Low -100 mV

Input Voltage High 100 mV

Input Current (Note 1)

-5 5

µA

Common-Mode Output Voltage V

CMO

2.16 2.4 2.64 V

Output Voltage Low (Note 2) -150 mV

Output Voltage High (Note 2) 150 mV

Prescaler Ratio

Reference Divider Ratio 88

Charge-Pump Output High
Measured at FB

0.08 0.1 0.12

CONDITIONS

Referenced to V

CMI

Referenced to V

CMI

R

SOURCE

= 50kΩ, V

FLCLK

= 1.65V

Referenced to V

CMO

, LOBUFSEL ≤ 0.5V

Referenced to V

CMO

, LOBUFSEL ≤ 0.5V

V

CPG1

≤ 0.5V, V

CPG2

≤ 0.5V

(V

MOD+-VMOD-

) ≥ 200mV, LOBUFSEL ≤ 0.5V 32 32

LOBUFSEL ≥ 2.4V, LODIVSEL ≤ 0.5V

LOBUFSEL ≥ 2.4V, LODIVSEL ≥ 2.4V

(V

MOD+-VMOD-

) ≤ -200mV, LOBUFSEL ≤ 0.5V

22

11

33 33

FREQUENCY SYNTHESIZER/LO BUFFER

DIFFERENTIAL DIGITAL OUTPUTS (LOBUF+/PSOUT+, LOBUF-/PSOUT-)

DIFFERENTIAL DIGITAL INPUTS (MOD+, MOD-, PLLIN+, PLLIN-)

SLEW-RATE-LIMITED DIGITAL INPUT (f

LCLK

)

STANDARD DIGITAL INPUTS (INSEL, CPG1, CPG2, LOBUFSEL, LODIVSEL)

MAX2106

DBS Direct Downconverter

_______________________________________________________________________________________ 3

DC ELECTRICAL CHARACTERISTICS (continued)

(VCC= +4.75V to +5.25V, VFB= +2.4V, C

IOUT_

= C

QOUT_

= 10pF, ƒ

FLCLK

= 2MHz, RFIN_ = unconnected, R

IOUT_

= R

QOUT_

= 10kΩ,

V

LOBUFSEL

= 0.5V, V

R

FBAND

= V

INSEL

= V

CPG1

= V

CPG2

= +2.4V, V

PLLIN+

= V

MOD+

= +1.3V, V

PLLIN-

= V

MOD-

= +1.1V, TA= +25°C,

unless otherwise noted. Typical values are at V

CC

= +5V, unless otherwise noted.)

AC ELECTRICAL CHARACTERISTICS

(IC driven single-ended with RFIN- AC-terminated in 75Ω to GND, V

CC

= +4.75V to +5.25V, V

IOUT_

= V

QOUT_

= 0.59Vp-p,

C

IOUT_

= C

QOUT_

= 10pF, ƒ

LCLK

= 2MHz, R

IOUT_

= R

QOUT_

= 10kΩ, V

LOBUFSEL

= 0.5V, V

RFBAND

= V

INSEL

= V

CPG1

= V

CPG2

= +2.4V,

V

PLLIN+

= V

MOD+

= +1.3V, V

PLLIN-

= V

MOD-

= +1.1V, TA= +25°C, unless otherwise noted. Typical values are at VCC= +5V.)

V

CPG1

≤ 0.5V, V

CPG2

≤ 0.5V

V

CPG1

≤ 0.5V, V

CPG2

≥ 2.4V

CONDITIONS

-0.12 -0.1 -0.08

Charge-Pump Output Low
Measured at FB

-0.36 -0.3 -0.24

UNITSMIN TYP MAXSYMBOLPARAMETER

V

CPG1

≥ 2.4V, V

CPG2

≤ 0.5V

V

CPG1

≥ 2.4V, V

CPG2

≥ 2.4V

-0.72 -0.6 -0.48

mA

-2.16 -1.8 -1.44

V

GC_

= 1V to 4V -50 50I

GC_

Input Current µA

Charge-Pump Output Current
Matching Positive to Negative

%Measured at FB -5 5

Charge-Pump Output Leakage nAMeasured at FB -25 25

Offset Voltage (Note 1) mV

Differential Output Voltage
Swing

Vp-pRL= 2kΩ differential 1

Common-Mode Output Voltage
(Note 1)

V0.65 0.85

-50 50

Charge-Pump Output Current
Drive (Note 1)

µAMeasured at CP 100

f

RFIN_

RFIN_ Input Frequency Range MHz

CONDITIONS

NFNoise Figure

dB

f

RFIN

_

= 1550MHz,

V

GC1

= 1V, V

GC2

adjusted 0.59Vp-p
baseband level

10.2

UNITSMIN TYP MAXSYMBOLPARAMETER

Inferred by quadrature gain and
phase-error test

925 2175

dBm

RFIN_ Input Power for 0.59Vp-p
Baseband Levels

dBm-25

Single
carrier

-68

IP3

RFIN_

RFIN_ Input Third-Order Intercept
Point (Note 3)

dBm

P

RFIN_

= -25dBm

per tone

10.5

10.5

11.5

IP2

RFIN_

RFIN_ Input Second-Order Intercept
(Note 4)

dBm

P

RFIN_

= -25dBm per tone,

f

LO

= 951MHz

17

P1

dBOUT

Output-Referred 1dB Compression
Point (Note 5)

dBV

P

RFIN_

= -40dBm,

signals within filter bandwidth

2

ANALOG CONTROL INPUTS (GC1, GC2)

BASEBAND OUTPUTS (IOUT+, IOUT-, QOUT+, QOUT-)

V

GC1

= V

GC2

= +4V (min gain)

V

GC1

= V

GC2

= +1V (max gain)
fLO= 2175MHz
fLO= 1550MHz
fLO= 950MHz

dBm

P

RFIN_

= -65dBm

per tone

-30

-29

-26

fLO= 2175MHz
fLO= 1550MHz
fLO= 950MHz

RF FRONT END

P

RFIN_

= -65dBm

dB44.8P

RFIN_

= -25dBm

MAX2106

DBS Direct Downconverter

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)

(R

FIN

+ IC driven single-ended with RFIN- AC-terminated in 75Ω to GND, V

CC

= +4.75V to +5.25V, V

IOUT_

= V

QOUT_

= 0.59Vp-p,

C

IOUT_

= C

QOUT_

= 10pF, f

LCLK

= 2MHz, R

IOUT_

= R

QOUT_

= 10kΩ, V

LOBUFSEL

= 0.5V, V

RFBAND

= V

INSEL

= V

CPG1

= V

CPG2

= +2.4V,

V

PLLIN+

= V

MOD+

= +1.3V, V

PLLIN-

= V

MOD-

= +1.1V, TA= +25°C, unless otherwise noted. Typical values are at VCC= +5V.)

12.5f = 925MHz

dBRFOUT Noise Figure (Note 10)

5

7

9f = 925MHz

dBm

RFOUT Output Third-Order Intercept
Point (Note 10)

1.0f = 1550MHz

2.0f = 2175MHz

0.5f = 925MHz

dBRFIN+ to RFOUT Gain (Note 10)

degreesQuadrature Phase Error

Includes effects from baseband filters,
measured at 125kHz baseband

4

dBQuadrature Gain Error

Includes effects from baseband filters,
measured at 125kHz baseband

f

FLCLK

= 2.0625MHz, fC = 31.4MHz

f

FLCLK

= 1.25MHz, fC = 19.3MHz

f

FLCLK

= 0.5MHz, fC = 8MHz

-0.5 0.5

Deviation from ideal 7th order,
Butterworth, up to 0.7 × f

C

dB

Baseband Frequency Response
(Note 1)

750C

IDC_

= C

QDC_

= 0.22µF Hz

Baseband Highpass -3dB Frequency
(Note 1)

23

f

IN_BAND

= 100Hz to 22.5MHz,

f

OUT_BAND

= 67.5MHz to 112.5MHz

1.2

dB

Ratio of In-Filter-Band to Out-of-Filter­Band Noise

R

FIN

+ Return Loss (Note 6)

+13

dB

10 10

%

LPF -3dB Cutoff-Frequency
Accuracy (Note 1)

-10 10

-5.5 5.5

f

RFIN_

= 925MHz, Z

SOURCE

= 75Ω

833Controlled by FLCLK signal MHz

LPF -3dB Cutoff-Frequency Range
(Note 1)

12925MHz < f < 2175MHz, Z

LOAD

= 75Ω dBRFOUT Return Loss (Notes 6, 10)

11f = 2175MHz

11f = 1550MHz

f = 2175MHz

f = 1550MHz

50IOUT_, QOUT_ ΩOutput Real Impedance (Note 1)

PARAMETER SYMBOL MIN TYP MAX UNITSCONDITIONS

+14f

RFIN_

= 2175MHz, Z

SOURCE

= 75Ω

41.5

LO 2nd Harmonic Rejection (Note 7) 32

dB

Average level of V

IOUT_

, VQOUT_

Average level of V

IOUT_

, VQOUT_LO Half Harmonic Rejection (Note 8) dB

-66Measured at R

FIN

+LO Leakage Power (Notes 6, 9) dBm

RFOUT PORT (LOOPTHROUGH)

BASEBAND CIRCUITS

MAX2106

DBS Direct Downconverter

_______________________________________________________________________________________ 5

Note 1: Minimum and maximum values are guaranteed by design and characterization over supply voltage.
Note 2 Driving differential load of 10kΩ || 15pF.
Note 3: Two signals are applied to RFIN_ at f

LO

- 100MHz and fLO- 199MHz. V

GC2

= 1V, V

GC1

is set so that the baseband out-

puts are at 590mVp-p. IM products are measured at baseband outputs but are referred to RF inputs.

Note 4: Two signals are applied to RFIN_ at 1200MHz and 2150MHz. V

GC2

= 1V, V

GC1

is set so that the baseband outputs are at

590mVp-p. IM products are measured at baseband outputs but are referred to RF inputs.

Note 5: P

RFIN_

= -40dBm so that front-end IM contributions are minimized.

Note 6: Using L64733/L64734 demo board from LSI Logic.
Note 7: Downconverted level, in dBc, of carrier present at f

LO

× 2, fLO= 1180MHz, f

VCO

= 590MHz, V

RFBAND

= unconnected (see

histogram plots).

Note 8: Downconverted level, in dBc, of carrier present at f

O

/ 2, fLO= 2175MHz, f

VCO

= 1087.5MHz, V

RFBAND

= 2.4V.

Note 9: Leakage is dominated by board parasitics.
Note 10: V

CPG1

= V

CPG2

= V

RFBAND

= V

INSEL

= 0.5V, ƒ

LCLK

= 0.5MHz.

Note 11: Guaranteed by design and characterization over supply and temperature.
Note 12: Measured at tuned frequency with PLL locked. PLL loop bandwidth = 3kHz. All phase noise measurements assume tank

components have a Q > 50.

AC ELECTRICAL CHARACTERISTICS (continued)

(IC driven single-ended with RFIN- AC-terminated in 75Ω to GND, V

CC

= +4.75V to +5.25V, V

IOUT_

= V

QOUT_

= 0.59Vp-p,

C

IOUT_

= C

QOUT_

= 10pF, ƒ

LCLK

= 2MHz, R

IOUT_

= R

QOUT_

= 10kΩ, V

LOBUFSEL

= 0.5V, V

RFBAND

= V

INSEL

= V

CPG1

= V

CPG2

= +2.4V,

V

PLLIN+

= V

MOD+

= +1.3V, V

PLLIN-

= V

MOD-

= +1.1V, TA= +25°C, unless otherwise noted. Typical values are at VCC= +5V.)

LOCAL OSCILLATOR

SYNTHESIZER

-96

PARAMETER SYMBOL MIN TYP MAX UNITS

At 100kHz offset, fLO= 2175MHz

dBc/HzLO Phase Noise (Notes 6, 12)

-75At 10kHz offset, fLO= 2175MHz

58

0Figure 1

f

RFIN

= 2175MHz dBRFIN+ to LO Input Isolation (Note 9)

-60

590 1180 MHzLO Tuning Range (Note 11)

ns

4 7.26 MHzCrystal Frequency Range (Note 1)

0.75 1 1.5Load = 10pF ||10kΩ, f

XTLOUT

= 6MHz Vp-pXTLOUT Output Voltage Swing

At 1kHz offset, fLO= 2175MHz

MOD+, MOD- Hold Time (Note 1) t

HM

7Figure 1

CONDITIONS

nsMOD+, MOD- Setup Time (Note 1) t

SUM

70

V

LOBUFSEL

≥ 2.4V,

fLO= 925 MHz + 2175MHz

V

RMS

LO Buffer Output Voltage (Note 1)

SYNTHESIZER

LOCAL OSCILLATOR

MAX2106

DBS Direct Downconverter

6 _______________________________________________________________________________________

NAME FUNCTIONPIN

Pin Description

2 CFLT

External Bypass for Internal Bias. Bypass this pin with a 0.1µF ceramic chip capacitor to GND.

3 XTL- Inverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements.

4 XTL+ Noninverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements.

5, 9, 10, 16,

40, 41, 46

GND

Ground. Connect each of these pins to a solid ground plane. Use multiple vias to reduce inductance
where possible.

7 RFIN- RF Inverting Input. Bypass RFIN- with 47pF capacitor in series with a 75Ω resistor to GND.

8 RFIN+ RF Noninverting Input. Connect to 75Ω source with a 47pF ceramic chip capacitor.

11 QDC- Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from QDC- to QDC+ (pin 12).

12 QDC+ Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from QDC+ to QDC- (pin 11).

13 IDC- Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from IDC- to IDC+ (pin 14).

14 IDC+ Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from IDC+ to IDC- (pin 13).

17 RFOUT Buffered RF Output. Enabled when INSEL is low.

18 CPG1

Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See
DC Electrical Characteristics for available gain settings.

20 XTLOUT Buffered Crystal Oscillator Output

21 CPG2

Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See
DC Electrical Characteristics for available gain settings.

22 GC1

Gain Control Input for RF Front End. High-impedance analog input, with an input range of +1V to +4V.
See AC Electrical Characteristics for transfer function.

23 GC2

Gain Control Input for Baseband Signals. High-impedance analog input, with an input range of +1V to
+4V. See AC Electrical Characteristics for transfer function.

24 INSEL

Loopthrough Mode Enable. High-impedance digital input. Drive low to enable the RFOUT buffer and
disable the LO converters. Drive high for normal tuner operation.

25 FLCLK

Baseband Filter Cutoff Adjust. Connect to a slew-rate-limited clock source. See AC Electrical
Characteristics for transfer function.

26 RFBAND

RF Input Band Select Input. Drive high to enable 1680 MHz to 2175 MHz band. Leave unconnected to
enable 1180 MHz to 1680 MHz band. Connect to GND to enable 925 MHz to 1180 MHz band.

27 QOUT- Baseband Quadrature Output. Connect to inverting input of high-speed ADC.

28 QOUT+ Baseband Quadrature Output. Connect to noninverting input of high-speed ADC.

30 IOUT- Baseband In-Phase Output. Connect to inverting input of high-speed ADC.

31 IOUT+ Baseband In-Phase Output. Connect to noninverting input of high-speed ADC.

32 LODIVSEL

LO Buffer Divider Ratio Input. Drive high to enable divide-by-one LO buffer output. Connect to GND to
enable divide-by-two buffer output.

1, 6, 19,

29, 39, 45

V

CC

VCCPower-Supply Input. Connect each pin to a +5V ±5% low-noise supply. Bypass each VCCpin to
the nearest GND with a ceramic chip capacitor.

15 LOBUFSEL

Local Oscillator Buffer Select. Connect to GND to select DIV32/33 prescaler output; connect VCCto
DIV1 to select DIV2 LO buffer output.

33 MOD+

PECL Modulus Control. A PECL high on MOD+ sets the dual-modulus prescaler to divide by 32. A PECL
logic low sets the divide ratio to 33. Drive with a differential PECL signal in conjunction with MOD- (pin 34).

MAX2106

DBS Direct Downconverter

_______________________________________________________________________________________ 7

Pin Description (continued)

NAME FUNCTIONPIN

34 MOD-

PECL Modulus Control. A PECL low on MOD- sets the dual-modulus prescaler to divide by 32. A
PECL logic high sets the divide ratio to 33. Drive with a differential PECL signal in conjunction with
MOD+ (pin 33).

35 PLLIN+ PECL Phase-Locked Loop Input. Drive with a differential PECL signal in conjunction with PLLIN- (pin 36).

37

LOBUF+/

PSOUT+

LOBUFSEL = GND: PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used in
conjunction with PSOUT-. Requires PECL-compatible termination. LOBUFSEL=V

CC

: 50Ω LO buffer

noninverting output.

36 PLLIN- PECL Phase-Locked Loop Input. Drive with a differential PECL signal in conjunction with PLLIN+ (pin 35)

42 TANK- LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning.

38

LOBUF-/

PSOUT-

LOBUFSEL = GND: PECL Prescaler Output. Differential output of the dual-modulus prescaler. Used in
conjunction with PSOUT+. Requires PECL-compatible termination.
LOBUFSEL = VCC: 50Ω LO buffer inverting output.

43 VRLO LO Internal Regulator. Bypass with a 1000pF ceramic chip capacitor to GND.

44 TANK+ LO Tank Oscillator Input. Connect to an external LC tank with varactor tuning.

47 FB Feedback Input for Loop Filter

48 CP Voltage Drive Output. Control of external charge-pump transistor.

Figure 1. Modulus Control Timing Diagram

MOD+,
MOD-

50%

50%

t

SUM

PSOUT+

PSOUT-

t

HM

50%

50%

MAX2106

DBS Direct Downconverter

8 _______________________________________________________________________________________

Functional Diagram

CPG1
CPG2

PLLIN+

PLLIN-

XTL+

XTL-

LODIVSEL

MOD+
MOD-

RFBAND

TANK+

TANK-

V

VRLO

CFLT

GND

RFIN+

RFIN-

GC1

GC2

FLCLK

INSEL

MAX2106

CHARGE

PUMP

/8

/32, 33

1, 2

x2

CC

VOLTAGE

REGULATOR

90°

BASEBAND

OFFSET

CORRECTION

CP

FB

XTLOUT

LOBUFSEL
LOBUF+/PSOUT+

LOBUF-/PSOUT-

IDC+
IDC­QDC+
QDC-

IOUT+

IOUT-

QOUT+

QOUT-

RFOUT

MAX2106

DBS Direct Downconverter

_______________________________________________________________________________________ 9

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

48L,TQFP.EPS

MAX2106

DBS Direct Downconverter

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)