Maxim MAX2101CMQ Datasheet

19-0298; Rev 4; 5/96

EVALUATION KIT

AVAILABLE

6-Bit Quadrature Digitizer

_______________General Description

The MAX2101 6-bit quadrature digitizer combines quad­rature demodulation with analog-to-digital conversion on
a single bipolar silicon die. This unique RF-to-Bits

TM

function bridges the gap between existing RF downcon­verters and CMOS digital signal processors (DSPs).

The MAX2101’s simple receiver subsystem is designed
for digital communications systems such as those used
in DBS, TVRO, WLAN, and other applications.

The MAX2101 accepts input signals from 400MHz to
700MHz and applies adjustable gain, providing at least
40dB of dynamic range.

Each baseband is filtered by an on-chip, 5th-order
Butterworth lowpass filter, or the user can select an
external filter path. Baseband sample rate is 60Msps.
The MAX2101 is available in a commercial temperature
range, 100-pin MQFP package.

________________________Applications

Recovery of PSK and QAM Modulated RF Carriers
Direct-Broadcast Satellite (DBS) Systems
Television Receive-Only (TVRO) Systems
Cable Television (CATV) Systems
Wireless Local Area Networks (WLANs)

____________________________Features

♦ ADCs Provide Greater than 5.5 Effective Bits at

fS= 60Msps, fIN= 15MHz

♦ Fully Integrated Lowpass Filters with

Externally Variable Bandwidth (10MHz to 30MHz)

♦ 40dB Dynamic Range
♦ Integrated VCO and Quadrature Generation

Network for I/Q Demodulation

♦ Divide-by-16 Prescaler for Oscillator PLL
♦ Programmable Counter for Variable Sample Rates
♦ Signal-Detection Function

♦ Selectable Offset Binary or Twos-Complement

Output Data Format

♦ Automatic Baseband Offset Cancellation

______________Ordering Information

PART

MAX2101CMQ 0°C to +70°C

TEMP. RANGE PIN-PACKAGE

100 MQFP

MAX2101

__________________________________________________Typical Application Circuit

LOW-NOISE AMPLIFIER

X/KU BAND

QUADRATURE

GENERATION

612MHz PHASE LOCKED

TM

RF-to-Bits is a registered trademark of Tektronix, Inc.

H POLARIZATION
V POLARIZATION

950MHz to 2000MHz

LOCAL OSCILLATOR

LOW-NOISE BLOCK

0°

90°

DIV-16

________________________________________________________________

MAX2101

A/D

CONVERSION

LOCAL OSCILLATOR

L-BAND DOWNCONVERTER

CLOCK

MATCHED

FILTERS

AND

CARRIER

RECOVERY

600MHz

(NARROW BAND)

ERROR

DETECTION

AND 

CORRECTION

Maxim Integrated Products

MISCELLANEOUS

DSP

DSP POST PROCESSING

1

For free samples & the latest literature: http://www.maxim-ic.com, or phone [phone]

6-Bit Quadrature Digitizer

ABSOLUTE MAXIMUM RATINGS

Supply Voltage Ranges (Note 1)

...................................................................(-0.3V to +6.5V)

V

CC

.....................................................................(V

V

INA

....................................................................(V

V

IND

CCA
CCD

+ 0.3V)
+ 0.3V)

Continuous Power Dissipation (T

Operating Temperature Range...............................0°C to +70°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, <10sec)...........................+300°C

Note 1: The digital control inputs are diode protected; however, permanent damage may occur on unconnected units under high-

energy electrostatic fields. Keep unused units in conductive foam or shunt the terminals together. Discharge the conductive
foam to the destination socket before insertion.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

MAX2101

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(VCC= 4.75V to 5.25V, TA= +25°C, unless otherwise noted.)

CONDITIONS

DC SPECIFICATIONS (V

Digital Supply Current

ADC Supply Current
RF Blocks Supply Current
IF Port DC Dynamic Range
IF Port Input Resistance

AGC Input Voltage
AGC Input Resistance

AGC Input Capacitance

AGC Control Slope Variation
AGC Control Input Bias Current
Lowpass Filter Tune Input Resistance
Lowpass Filter Tune Input Capacitance
TNKA, TNKB Resonant Port Bias Voltage
LO Resonant Port Input Resistance
LO Resonant Port Input Capacitance
LO Prescaler Output High (Note 3)
LO Prescaler Output Low
LO Prescaler Output Source Current
LO Prescaler Output Sink Current
Baseband Amplifier DC Gain A
Baseband Input—Input Capacitance C
Baseband Amplifier I/Q Offset Match

(Note 4)
Baseband Amplifier Offset Adjust

Input Resistance

= System Ground, V

GND

CCD
CCAD
CCRF

AGMIN

AGMAX

AGC
AGC

AGC

AGC

ILPF

ILPF

LO

ILO

ILO
OH

OL
OH
OL

VBB

IBB

V

OFFBB

R

OFFBB

= V

CCA

V

CCA

V

CCAD

V

CCIF
IF
IF

CCD

, V

, V

CCO

CC2

= 5.0V ±5%)

, V

, V

CCD

, V

, V

CC1

CCQ

CCC

VIF= 100mV
VIF= 0.5mV 2.3 2.9V

(Note 2) pF2C

Variation dB/V
Voltage range = 1V to 4V

(Note 2)

4.1V on complementary input V13V
(Note 2)
(Note 2)
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF, VO= 2.4V
RL= 1MΩ, CL= 15pF, VO= 0.5V

(Note 2) 2 pF
LSB = 24mV, ENOPB = 0V,

V

FTUNE

= V

FTMIN

to V

FTMAX

Voltage Range = 1V to 4V 10 kΩ

= +70°C).......................1.6W

A

1.0 1.5V

4:1SV

27 29 31 dB

1.0 LSB

UNITSMIN TYP MAXSYMBOLPARAMETER

mA102I
mA80I
mA170I
mV0.5 100V

Ω40 75R
V

kΩ50 100R

dB40AGCRAGC Range

µA±20I
kΩ10R
pF2C

kΩ10R
pF2C

V2.4V

V0.5V
µA400I
µA50I

2 _______________________________________________________________________________________

6-Bit Quadrature Digitizer

ELECTRICAL CHARACTERISTICS (continued)

(VCC= 4.75V to 5.25V, TA= +25°C, unless otherwise noted.)

V

Power Detect Output Minimum
Power Detect Output Maximum

ADC Amplitude Response Match
ADC Input Offset

OFFAD

RF Signal Path DC Gain
Composite I/Q Gain Mismatch

Buffered Reference Voltage
(Zero Temperature Coefficient)

Buffered Reference Voltage
(Proportional to Absolute Temperature)

V

Temperature Coefficient

PTAT

Buffered Reference Voltage
(2 x VREF)

Data Output High (Note 3)
Data Output Low
Data Output Source Current (Note 3)
Data Output Sink Current
Data Clock Output High (Note 3)
Data Clock Output Low
Data Clock Output Source Current (Note 3)
Data Clock Output Sink Current
Master Clock Input Dynamic Range
Master Clock Input Resistance
Master Clock Input Capacitance
Reference Clock Output High (Note 3)
Reference Clock Output Low

Reference Clock Output Source Current
(Note 3)

Reference Clock Output Sink Current
Digital Input High Threshold (Note 5) V
Digital Input Low Threshold (Note 5) V
Digital Input Current High (Note 5) I
Digital Input Current Low (Note 5) I

FLTRSEL Input Current High I

FLTRSEL Input Current Low I

PWR
PWR

VM

VRF

(IQ)

REF

PTAT

2R5

OH
OL

OH

OL

OH
OL

OH

OL
MCLK
IMCLK
IMCLK

OH
OL

OH

OL

IH
IL

IH

IL

IH

IL

= 0V

p-p

> 2V DC

V

OBB
OBB

Channel to channel dB0.4A
LSB = 24mV, either channel

AGC set to maximum gain dB63A
Entire signal path, DC,

V

FTUNEI

= V

FTUNEQ

RL= 1kΩ, CL= 0.1µF

RL= 40kΩ,
CL= 0.01µF

TA= 0°C to +70°C mV/°C4.5
Ratio of V

2R5

RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF, VO= 2.4V
RL= 1MΩ, CL= 15pF, VO= 0.5V
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF
RL= 1MΩ, CL= 15pF, VO= 2.4V
RL= 1MΩ, CL= 15pF, VO= 0.5V
RL= 50Ω external, f = 5MHz

RL= 10MΩ, CL= 15pF
RL= 10MΩ, CL= 15pF

RL= 1MΩ, CL= 15pF, VO= 2.4V
RL= 1MΩ, CL= 15pF, VO= 0.5V µA50I

VIH= 2.0V -150 -500 µA
VIL= 0.8V -400 -790 µA
VIH= 2.0V µA
VIL= 0.8V µA

CONDITIONS

= V

2R5

TA= +25°C 1.0 1.3
TA= 0°C to +70°C

(Note 2)

to V

REF

UNITSMIN TYP MAXSYMBOLPARAMETER

mV21 25LSBADC LSB Size

LSB0.5V
LSB1.0DNLADC Differential Nonlinearity
LSB1.0INLADC Integral Nonlinearity

0.9 1.5

1.9 2.1V

dBm010P

2.0 V

0.8 V

MAX2101

V1.5V
V3.75V

dB0.5∆M

V1.18 1.25V

VV

V
V2.2V

V0.5V
µA400I
µA50I

V2.2V

V0.5V
µA400I
µA50I

kΩ2R
pF5C

V2.2V

V0.5V
µA400I

_______________________________________________________________________________________ 3

6-Bit Quadrature Digitizer

ELECTRICAL CHARACTERISTICS (continued)

(VCC= 4.75V to 5.25V, TA= +25°C, unless otherwise noted.)

CONDITIONS

AC SPECIFICATIONS (GND = System Ground, VCC= V

IF Port Dynamic Range (Notes 2, 6)

RS= 50Ω, fIF= 400MHz to 700MHz dBm-50 -10P

IF

RS= 50Ω, R
network, fIF= 400MHz to 700MHz

IF Input Frequency Range

MAX2101

(Note 2) MHz400 700f

IF

R
gain configured for PIF= -50dBm

Noise Figure Variation

NF

Maximum gain to minimum gain dB/dB1∆
Gain configured for PIF= -10dBm,

f

BB1

Gain configured for PIF= -50dBm,
f

BB1

External resonator, guaranteed MHz400 700f
10MHz off fC, 1Hz bandwidth

N

10kHz off fC, 1Hz bandwidth

N

(limited by external tank Q)
5Hz to 20MHz
f = 2 x f

(with respect to signal level at f = 0.5 x fC)
fC= 10MHz

fC= 30MHz
fLO= 650MHz

(IQ)

fLO= 650MHz

(IQ)

LO Frequency Coverage
LO Device Phase Noise Floor

LO Device Phase Noise
MIXER Output Baseband Gain Flatness
Lowpass Filter Stop-Band Attenuation

Lowpass Filter Tune Voltage
Composite I/Q Amplitude Balance

Composite I/Q Phase Balance

IIP3Input 3rd-Order Intercept Point

LO

Φ
Φ

AV

SB

FTMIN

FTMAX

∆Φ

100Hz to 15MHz, each channel excluding

filter
ADC 0.1dB Bandwidth
ADC Maximum Sample Rate, Each Section
ADC Aperture Uncertainty
ADC Transient Response

0.1dB
MAX

AU

TRAN

(Note 2)
fS= 60Msps
Full-scale transition, settle to within 1%
V
fIN= 15MHz, fS= 60Msps, VIN= 95% FS

ADC Input IP3 Rejection

f1= 10MHz, FS - 7dB; f2= 12MHz, FS - 7dB

AD

Note 2: Guaranteed by design.
Note 3: A warm-up of 10 seconds is required at T
Note 4: Sample characterization at T

= 0°C to +70°C.

A

= 0°C.

A

Note 5: Digital inputs include Programmable Sample Rate Control (S0–S2), Binary Enable (BINEN).
Note 6: R

= Source Resistance of signal source driving IF input (IFIN, pin 90).

S

= Termination Resistance for inverting IF input (IFINB, pin 91).

R

TERM

= 5.0V ±5%)

CCD

= 50Ω,

TERM

= 5MHz, f

= 5MHz, f

C

BASEBAND

= 25Ω, no matching

TERM

= 6MHz

BB2

= 6MHz

BB2

= 3V

p-p

UNITSMIN TYP MAXSYMBOLPARAMETER

1.7VSWRIF Port VSWR (Note 6)

dB20NFNoise Figure (Note 6)

6

dBm

-34

dBc/Hz-140
dBc/Hz-88

dB0.4∆
dB28A

1.5 2.1V

2.3 2.9V

V

dB0.3∆M

degree1.5

ns0.5∆TComposite Group Delay Variation

MHz20BW

Msps60SR

ps80t

ns10t

ns10RecoverBaseband Overdrive Recovery
Bits5.5ENBADC Effective Number of Bits
dBc-38IIP3

4 _______________________________________________________________________________________

6-Bit Quadrature Digitizer

TIMING CHARACTERISTICS

(V

= system ground, V

GND

CCA

= V

= 5.0V ±5%, TA= +25°C, unless otherwise noted.) (Note 4)

CCD

UNITSMIN TYP MAXSYMBOLPARAMETER

Data Clock Period (Figure 2)
Propagation Delay, Clock to Data (Figure 2)
Data Output Skew (all 12 outputs) Settled within 20% (Figure 2)
Aperture Delay Relative to Data Clock (Figure 2)
Aperture Delay Match, Channel to Channel
Data Output Rise, Fall Time (20% to 80%) (Note 7)
Data Clock Output Rise, Fall Time (20% to 80%) (Note 7)
Reference (Div 6) Clock Output Rise, Fall Time (20% to 80%) (Note 7)
Reference Clock Output Jitter, RMS
VCO Prescaler Output Rise, Fall Time (20% to 80%) (Note 7)

PC

PCQ

SKEW
APERTURE
AP-MATCH

f
f
f

j

f

ns16t
ns4t
ns1t
ns1t
ps20t
ns4tr,t
ns3tr,t
ns5tr,t
ps30t
ns3tr,t

Note 7: RL= 1MΩ, CL= 15pF

__________________________________________Typical Operating Characteristics

(VCC= 5V, TA = +25°C, unless otherwise noted.)

MAX2101

SUPPLY CURRENT vs.

SUPPLY VOLTAGE

260

255

250

(mA)

245

CC

I

240

235

230

4.75 4.85 5.05 5.25

4.95 5.15
VCC (V)

300
290

MAX2101-TOC 01

280
270
260
250
240
230

SUPPLY CURRENT (mA)

220
210
200

SUPPLY CURRENT vs.

TEMPERATURE

MAX2101 TOC 02

0 10203040506070

TEMPERATURE (°C)

VREF (PIN 88) VOLTAGE vs.

TEMPERATURE

1.220

1.218

1.216

1.214

VREF (V)

1.212

1.210

1.208

1.206
010 30 70

20 40 50 60

TEMPERATURE (°C)

MAX2101 TOC 03

_______________________________________________________________________________________ 5

6-Bit Quadrature Digitizer

____________________________Typical Operating Characteristics (continued)

(VCC= 5V, TA = +25°C, unless otherwise noted.)

VREF (PIN 88) VOLTAGE vs.

SUPPLY VOLTAGE

1.215

MAX2101

1.214

1.213

VREF (V)

1.212

1.211

1.210

4.75 4.85 4.95 5.05 5.15 5.25
VCC (V)

MAX2101 TOC 04

VPTAT (PIN 97) vs.

TEMPERATURE

1.4

1.3

1.2

1.1

VPTAT (V)

1.0

0.9

0.8
0 10203040506070

TEMPERATURE (°C)

PWR (PINS 85, 96) VOLTAGE vs.

BASEBAND AMPLITUDE

4.5

4.0

3.5

3.0

2.5

2.0

PWR (V)

1.5

1.0

0.5
0

TA = +25°C

0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.00.2

BASEBAND AMPLITUDE (V)

TA = +70°C

MAX2101 TOC 05

MAX2101 TOC 07

VPTAT (PIN 97) VOLTAGE vs.

SUPPLY VOLTAGE

1.20

1.18

1.16

1.14

1.12

1.10

VPTAT (V)

1.08

1.06

1.04

1.02

1.00

4.75 4.85 4.95 5.05 5.15 5.25
VCC (V)

MAX2101 TOC 06

DIFFERENTIAL LINEARITY vs.

ADC CODE

100m

50m

0

-50m

-100m

ADJ CODE DELTA ERROR (LSB)

-150m

5 1015202530354045505560

ADJ CODE DELTA ERROR (LSB) vs. CODE

CODE

DNL = 0.173 LSB

MAX2101 TOC 10

6 _______________________________________________________________________________________

6-Bit Quadrature Digitizer

____________________________Typical Operating Characteristics (continued)

(VCC= 5V, TA = +25°C, unless otherwise noted.)

INTEGRAL NONLINEARITY vs.

ADC CODE

RF SIGNAL PATH GAIN vs.

AGC (PIN 93) VOLTAGE

60

fLO = 624MHz

= 5.1MHz

f

BB

50

40

30

GAIN (dB)

20

10

0

1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
VAGC (V)

100m

50m

0

-50m

ERROR (LSB)

-100m

-150m

ADC ERROR (LSB) vs. CODE

INL = 0.15 LSB

5 1015202530354045505560

CODE

INPUT IP3 vs.

IF POWER

9
8
7
6
5
4

IIP3 (dBm)

3
2
1
0

MAX2101-TOC 12

10

fLO = 668MHz
f

= 5.1MHz

5

BB1

f

= 6.1MHz

BB2

0

fC = 10MHz

-5

-10

-15

IIP3 (dBm)

-20

-25

-30

-35

-55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5

P

= P

(BB1)

@ P

(FSIN)

P

= P

(BB1)

@ P

(FSIN)

IF POWER (dBm)

= -16dBm 

(BB2)

= -10dBm 

= -56dBm 

(BB2)

= -50dBm

MAX2101-TOC 13

MAX2101 TOC 11

INPUT IP3 vs.

FILTER CUTOFF FREQUENCY

fLO = 464MHz or 668MHz
f

= 5.1MHz

BB1

f

= 6.1MHz

BB2

P

= P

(BB1)

P

(FSIN)

5 101520253035

= -16dBm 

(BB2)

= -10dBm

CUTOFF FREQUENCY (MHz)

MAX2101

MAX2101-TOC 14

NOISE FIGURE vs.

IF INPUT POWER

30
28
26
24
22

20
18

NF (dB) (DSB)

16
14

fLO = 624MHz

12

f

= 10MHz

BB

10

-55 -50 -45 -40 -35 -30
IF POWER (dBm)

MAX2101-TOC 15

2.0

1.9

1.8

1.7

1.6

1.5

IFIN VSWR

1.4

1.3

1.2

1.1

1.0

IFIN (PIN 90) VSWR vs.

FREQUENCY

RS = 50Ω
(PIN 91) I

200 300 400 500 600 700 800 900

AC TERMINATED IN 25Ω

FINB

FREQUENCY (MHz)

MAX2101-TOC 16

_______________________________________________________________________________________

7

6-Bit Quadrature Digitizer

______________________________________________________________Pin Description

PIN

1, 9,
12, 13,
18, 19,
63, 67,
82, 83,
89, 92,

MAX2101

98, 99

2 VGNDQ Q Channel Baseband Ground
3 BBINQ

4 FTUNEQ

5 OFFQ

6 BBOUTQ

7 BBOUTQB

8 VCCQ Q Channel Baseband +5V Supply
10 VGNDP Prescaler Ground
11 VCCP Prescaler +5V Supply
14 TNKB Oscillator Resonator Port
15 VCC2 Oscillator +5V Supply
16 VGND2 Oscillator Ground
17 TNKA Oscillator Resonator Port

20, 21 VGNDAD A/D Converter Ground
22, 59 VSUBAD A/D Converter Substrate

23 VCOPRE Divide-by-16 Prescaler Output
24 VCOPREB

25, 29,
38, 40,

44, 52

26 VGNDO Digital Output Ground
27 D5Q Q Channel Data Output, bit 5 (MSB)
28 D4Q Q Channel Data Output, bit 4

30, 37,
43, 51,55VGNDO Digital Output Ground

31 D3Q Q Channel Data Output, bit 3
32 D2Q Q Channel Data Output, bit 2

33, 48 VCCD Digital Logic +5V Supply
34, 47 VGNDD Digital Logic Ground

NAME FUNCTION

GND Ground

Q Channel Baseband Amplifier,
External Input

Q Channel Filter Cutoff
Frequency Control

Q Channel Baseband Amplifier
Offset Adjust

Q Channel Baseband Amplifier
Output

Q Channel Baseband Amplifier
Inverted Output

Divide-by-16 Prescaler
Complementary Output

VCCO Digital Output +5V Supply

PIN

35 D1Q Q Channel Data Output, bit 1
36 D0Q Q Channel Data Output, bit 0 (LSB)

39 RCLK
41 DCLKB Data Clock Complementary Output

42 DCLK Data Clock Output
45 D0I I Channel Data Output, bit 0 (LSB)
46 D1I I Channel Data Output, bit 1
49 D2I I Channel Data Output, bit 2
50 D3I I Channel Data Output, bit 3
53 D4I I Channel Data Output, bit 4
54 D5I I Channel Data Output, bit 5 (MSB)
56 BINEN Binary Enable

57 S2

58 S1

60, 61 VCCAD A/D Converter +5V Supply

62 S0
64 VCCC Clock Buffer +5V Supply

65 MCLK Master Clock
66 VGNDC Clock Buffer Ground
68 ENOPB Offset Correction/Enable Correction

69 CQB

70 CQ

71 CI

72 CIB
73 VCCI I Channel Baseband +5V Supply
74 BBOUTIB
75 BBOUTI I Channel Baseband Amplifier Output
76 OFFI

77 FTUNEI

NAME FUNCTION

Reference Clock, divide by six from
master clock (MCLK)

Programmable Sample Rate
Control Input, bit 2 (MSB)

Programmable Sample Rate
Control Input, bit 1

Programmable Sample Rate
Control Input, bit 0 (LSB)

Inverting Input Q Channel Offset
Correction

Noninverting Input Q Channel
Offset Correction

Noninverting Input I Channel Offset
Correction

Noninverting Input I Channel Offset
Correction

I Channel Baseband Amplifier
Inverted Output

I Channel Baseband Amplifier
Offset Adjust

I Channel Filter Cutoff Frequency
Control

8 _______________________________________________________________________________________