The MAX2067 high-linearity analog variable-gain amplifier (VGA) is a monolithic SiGe BiCMOS attenuator and
amplifier designed to interface with 50Ω systems operating in the 50MHz to 1000MHz frequency range (see
the
Typical Application Circuit
). The analog attenuator
is controlled using an external voltage or through the
SPI™-compatible interface using an on-chip 8-bit DAC.
Because each stage has its own RF input and RF output, this component can be configured to either optimize NF (amplifier configured first), or OIP3 (amplifier
last). The device’s performance features include 22dB
amplifier gain (amplifier only), 4dB NF at maximum gain
(includes attenuator insertion loss), and a high OIP3
level of +43dBm. Each of these features makes the
MAX2067 an ideal VGA for numerous receiver and
transmitter applications.
In addition, the MAX2067 operates from a single +5V
supply with full performance, or a single +3.3V supply
with slightly reduced performance, and has an
adjustable bias to trade current consumption for linearity
performance. This device is available in a compact 40pin thin QFN package (6mm x 6mm) with an exposed
pad. Electrical performance is guaranteed over the
extended temperature range (T
C
= -40°C to +85°C).
Applications
IF and RF Gain Stages
Temperature Compensation Circuits
Cellular Band WCDMA and cdma2000® Base
Stations
GSM 850/GSM 900 EDGE Base Stations
WiMAX and LTE Base Stations and Customer
Premise Equipment
Fixed Broadband Wireless Access
Wireless Local Loop
Military Systems
Video-on-Demand (VOD) and DOCSIS®Compliant EDGE QAM Modulation
, high-current (HC) mode, VCC= VDD= +3.0V to +3.6V, TC= -40°C to +85°C. Typical values are at VCC=
V
DD
= +3.3V and TC= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Based on junction temperature TJ= TC+ (θJCx VCCx ICC). This formula can be used when the temperature of the exposed
pad is known while the device is soldered down to a printed-circuit board (PCB). See the
Applications Information
section
for details. The junction temperature must not exceed +150°C.
Note 2: Junction temperature T
J
= TA+ (θJAx VCCx ICC). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150°C.
Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
Note 4: T
C
is the temperature on the exposed pad of the package. TAis the ambient temperature of the device and PCB.
VCC_ to GND ........................................................-0.3V to +5.5V
VDD_LOGIC, DATA, CS, CLK, VDAC_EN,
VREF_SELECT.....................................-0.3V to (VCC_ + 0.3V)
AMP_IN, AMP_OUT, VREF_IN,
ANALOG_VCTRL ................................-0.3V to (VCC_ + 0.3V)
ATTEN_IN, ATTEN_OUT........................................-1.2V to +1.2V
RSET to GND.........................................................-0.3V to +1.2V
RF Input Power (ATTEN_IN, ATTEN_OUT).....................+20dBm
RF Input Power (AMP_IN)...............................................+18dBm
Continuous Power Dissipation (Note 1) ...............................6.5W
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued)
(
Typical Application Circuit
, VCC= VDD= +4.75 to +5.25V, HC mode with attenuator set for maximum gain, 50MHz ≤ fRF≤ 1000MHz,
T
C
= -40°C to +85°C. Typical values are at VCC= VDD= +5.0V, HC mode, PIN= -20dBm, fRF= 200MHz, and TC= +25oC, unless
otherwise noted.) (Note 6)
Note 5: Guaranteed by design and characterization.
Note 6: All limits include external component losses. Output measurements are performed at RF output port of the
Typical
Application Circuit
Note 7: Operating outside this range is possible, but with degraded performance of some parameters.
Note 8: It is advisable not to continuously operate the VGA RF input above +15dBm.
Note 9: Response time includes full attenuation range change with output setting to within ±0.1dB.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SERIAL PERIPHERAL INTERFACE (SPI)
Maximum Clock Speedf
Data-to-Clock Setup Timet
Data-to-Clock Hold Timet
Clock-to-CS Setup Timet
CS Positive Pulse Widtht
CS Setup Timet
Clock Pulse Widtht
CLK
CS
CH
ES
EW
EWS
CW
20MHz
2ns
2.5ns
3ns
7ns
3.5ns
5ns
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +5.0V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
(VCC= VDD= +5.0V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
REVERSE ISOLATION OVER ATTENUATOR
SETTING vs. RF FREQUENCY
-25
-35
DAC CODE 0
-45
-55
REVERSE ISOLATION (dB)
-65
-75
501050
DAC CODE 255
RF FREQUENCY (MHz)
NOISE FIGURE vs. RF FREQUENCY
7
6
VCC = 4.75V, 5.00V, 5.25V
5
4
NOISE FIGURE (dB)
3
2
504508501050650250
RF FREQUENCY (MHz)
80
70
MAX2067 toc10
60
50
40
30
20
S21 PHASE CHANGE (DEG)
10
0
MAX2067 toc13
-10
21
20
19
(dBm)
1dB
18
17
OUTPUT P
16
15
850450650250
S21 PHASE CHANGE vs.
ATTENUATOR SETTING
REFERENCED TO HIGH GAIN STATE.
POSITIVE PHASE = ELECTRICALLY
SHORTER.
1000MHz
0256
OUTPUT P
TC = +85°C
TC = -40°C
504508501050650250
128192160329664224
DAC CODE
vs. RF FREQUENCY
1dB
TC = +25°C
TC = +25°C
RF FREQUENCY (MHz)
450MHz
50MHz
TC = -40°C
TC = +85°C
MAX2067 toc11
200MHz
MAX2067 toc14
NOISE FIGURE vs. RF FREQUENCY
7
6
TC = +85°C
5
4
NOISE FIGURE (dB)
3
2
504508501050650250
RF FREQUENCY (MHz)
21
20
19
(dBm)
1dB
18
17
OUTPUT P
16
15
OUTPUT P
504508501050650250
1dB
VCC = 5.25V
VCC = 4.75V
RF FREQUENCY (MHz)
vs. RF FREQUENCY
TC = +25°C
TC = -40°C
VCC = 5.00V
MAX2067 toc12
MAX2067 toc15
OUTPUT IP3 vs. RF FREQUENCY
50
45
40
OUTPUT IP3 (dBm)
35
30
504508501050650250
OUTPUT IP3 vs.
ATTENUATOR STATE
TC = +25°C, +85°C
TONE = LSB, USB
TC = -40°C, TONE = LSB, USB
DAC CODE
P
TC = +25°C
TC = -40°C
RF FREQUENCY (MHz)
P
= 0dBm/TONE
OUT
TC = +85°C
MAX2067 toc16
OUTPUT IP3 vs. RF FREQUENCY
50
45
40
OUTPUT IP3 (dBm)
35
30
504508501050650250
VCC = 5.00V
VCC = 4.75V
RF FREQUENCY (MHz)
P
= 0dBm/TONE
OUT
VCC = 5.25V
MAX2067 toc17
OUTPUT IP3 (dBm)
50
45
40
35
30
02561921282241609632 64
= -3dBm/TONE
OUT
= 200MHz
f
RF
MAX2067 toc18
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +5.0V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
(VCC= VDD= +5.0V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
DAC VOLTAGE USING INTERNAL
REFERENCE vs. DAC CODE
3.0
2.5
2.0
1.5
DAC VOLTAGE (V)
1.0
0.5
0
0961602243225619212864
TC = -40°C, +25°C, +85°C
DAC CODE
DAC VOLTAGE DRIFT USING
INTERNAL REFERENCE vs. DAC CODE
0.05
0.04
0.03
TC CHANGED FROM +25°C to -40°C
0.02
0.01
0
-0.01
-0.02
DAC VOLTAGE CHANGE (V)
-0.03
TC CHANGED FROM +25°C to +85°C
-0.04
-0.05
0961602243225619212864
DAC CODE
MAX2067 toc28
MAX2067 toc30
DAC VOLTAGE (V)
0.0100
0.0075
0.0050
0.0025
-0.0025
DAC VOLTAGE CHANGE (V)
-0.0050
-0.0075
-0.0100
DAC VOLTAGE USING INTERNAL
REFERENCE vs. DAC CODE
3.0
2.5
2.0
1.5
1.0
0.5
0
0961602243225619212864
VCC = 4.75V, 5.00V, 5.25V
DAC CODE
DAC VOLTAGE DRIFT USING
INTERNAL REFERENCE vs. DAC CODE
VCC CHANGED FROM 5.00V to 5.25V
0
VCC CHANGED FROM 5.00V to 4.75V
0961602243225619212864
DAC CODE
MAX2067 toc29
MAX2067 toc31
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +5.0V, LC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
INPUT MATCH vs. ATTENUATOR SETTING
(LOW-CURRENT MODE)
0
-10
-20
-30
INPUT MATCH (dB)
-40
1000MHz
200MHz
50MHz
450MHz
MAX2067 toc37
OUTPUT MATCH vs. ATTENUATOR SETTING
(LOW-CURRENT MODE)
0
-5
-10
-15
-20
OUTPUT MATCH (dB)
50MHz
-25
450MHz
1000MHz
200MHz
MAX2067 toc38
NOISE FIGURE (dB)
NOISE FIGURE vs. RF FREQUENCY
(LOW-CURRENT MODE)
7
6
5
4
3
TC = +85°C
TC = +25°C
TC = -40°C
MAX2067 toc39
-50
0961602243225619212864
NOISE FIGURE vs. RF FREQUENCY
7
6
5
4
NOISE FIGURE (dB)
3
2
504508501050650250
DAC CODE
(LOW-CURRENT MODE)
VCC = 4.75V, 5.00V, 5.25V
RF FREQUENCY (MHz)
MAX2067 toc40
-30
18
17
(dBm)
16
1dB
15
OUTPUT P
14
13
0961602243225619212864
OUTPUT P
(LOW-CURRENT MODE)
TC = -40°C
TC = +85°C
504508501050650250
RF FREQUENCY (MHz)
DAC CODE
vs. RF FREQUENCY
1dB
TC = +25°C
MAX2067 toc41
2
18
17
(dBm)
16
1dB
15
OUTPUT P
14
13
504508501050650250
UTPUT P
(LOW-CURRENT MODE)
VCC = 5.25V
504508501050650250
RF FREQUENCY (MHz)
vs. RF FREQUENCY
1dB
VCC = 5.00V
RF FREQUENCY (MHz)
MAX2067 toc42
VCC = 4.75V
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +5.0V, LC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
(VCC= VDD= +5.0V, LC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
90
80
70
OIP2 (dBm)
60
50
40
504508501050650250
OIP2 vs. RF FREQUENCY
(LOW-CURRENT MODE)
P
= 0dBm/TONE
TC = -40°C
TC = +85°C
RF FREQUENCY (MHz)
OUT
TC = +25°C
MAX2067 toc52
90
80
70
OIP2 (dBm)
60
50
40
504508501050650250
OIP2 vs. RF FREQUENCY
(LOW-CURRENT MODE)
P
VCC = 5.25V
VCC = 5.00V
VCC = 4.75V
RF FREQUENCY (MHz)
= 0dBm/TONE
OUT
MAX2067 toc53
OIP2 (dBm)
OIP2 vs. ATTENUATOR STATE
(LOW-CURRENT MODE)
90
80
70
60
50
40
0961602243225619212864
TC = -40°C
TC = +85°C
DAC CODE
P
= -3dBm/TONE
OUT
= 200MHz
f
RF
TC = +25°C
MAX2067 toc54
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +3.3V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
(VCC= VDD= +3.3V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
OUTPUT IP3 vs. RF FREQUENCY
50
45
40
35
OUTPUT IP3 (dBm)
30
25
20
504508501050650250
TC = +25°C
TC = +85°C
RF FREQUENCY (MHz)
2nd HARMONIC vs. RF FREQUENCY
80
70
60
50
2nd HARMONIC (dBc)
40
TC = +25°C
TC = -40°C
VCC = 3.3V
P
= 0dBm/TONE
OUT
TC = -40°C
VCC = 3.3V
P
OUT
TC = +85°C
= 3dBm
MAX2067 toc64
OUTPUT IP3 (dBm)
MAX2067 toc67
2nd HARMONIC (dBc)
OUTPUT IP3 vs. RF FREQUENCY
50
45
40
35
30
25
20
504508501050650250
VCC = 3.3V
VCC = 3.0V
RF FREQUENCY (MHz)
2nd HARMONIC vs. RF FREQUENCY
80
70
VCC = 3.3V
60
50
40
VCC = 3.0V
P
= 0dBm/TONE
OUT
VCC = 3.6V
P
VCC = 3.6V
OUT
= 3dBm
MAX2067 toc65
OUTPUT IP3 (dBm)
MAX2067 toc68
2nd HARMONIC (dBc)
OUTPUT IP3 vs. ATTENUATOR STATE
45
TC = +25°C, +85°C
TONE = LSB, USB
40
35
30
25
02561921282241609632 64
TC = -40°C, TONE = LSB, USB
DAC CODE
VCC = 3.3V
P
= -3dBm/TONE
OUT
= 200MHz
f
RF
2nd HARMONIC vs. ATTENUATOR STATE
80
TC = +85°C
70
60
T
= +25°C
C
50
TC = -40°C
VCC = 3.3V
P
OUT
= 200MHz
f
RF
= 0dBm
MAX2067 toc66
MAX2067 toc69
30
504508501050650250
RF FREQUENCY (MHz)
3rd HARMONIC vs. RF FREQUENCY
110
100
90
80
70
3rd HARMONIC (dBc)
60
50
504508501050650250
TC = +25°C
TC = +85°C
RF FREQUENCY (MHz)
VCC = 3.3V
= 3dBm
P
OUT
TC = -40°C
MAX2067 toc70
3rd HARMONIC (dBc)
30
504508501050650250
RF FREQUENCY (MHz)
3rd HARMONIC vs. RF FREQUENCY
110
100
90
80
70
60
50
VCC = 3.3V
VCC = 3.0V
504508501050650250
RF FREQUENCY (MHz)
P
OUT
VCC = 3.6V
= 3dBm
MAX2067 toc71
3rd HARMONIC (dBc)
40
02561921282241609632 64
DAC CODE
3rd HARMONIC vs. ATTENUATOR STATE
100
90
80
70
60
02561921282241609632 64
TC = +85°C
TC = -40°C
TC = +25°C
DAC CODE
VCC = 3.3V
P
OUT
= 200MHz
f
RF
= 0dBm
MAX2067 toc72
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
(VCC= VDD= +3.3V, HC mode, attenuator set for maximum gain, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, internal DAC reference used, unless otherwise noted.)
Digital Logic Supply Input. Connect to the digital logic power supply, V
to GND with a 10nF capacitor as close as possible to the pin.
Driver Amplifier Supply Voltage Input. Connect to the V
GND with 1000pF and 10nF capacitors as close as possible to the pin, with the
smaller value capacitor closer to the part.
Analog Attenuator Output. Internally matched to 50Ω. Requires an external DCblocking capacitor.
Analog Attenuator Input. Internally matched to 50Ω. Requires an external DCblocking capacitor.
Analog Bias and Control Supply Voltage Input. Bypass to GND with a 10nF
capacitor as close as possible to the pin.
Exposed Pad. Internally connected to GND. Connect EP to ground for proper RF
performance and enhanced thermal dissipation.
, Bypass
DD
power supply. Bypass to
CC
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
The MAX2067 high-linearity analog variable-gain amplifier is a general-purpose, high-performance amplifier
designed to interface with 50Ω systems operating in the
50MHz to 1000MHz frequency range.
The MAX2067 integrates an analog attenuator to provide
31dB of total gain control, as well as a driver amplifier
optimized to provide high gain, high IP3, low noise figure,
and low power consumption. For applications that do not
require high linearity, the bias current of the amplifier can
be adjusted by an external resistor to further reduce
power consumption.
The analog attenuator is controlled using an external
voltage or through the SPI-compatible interface using
an on-chip DAC. Because each stage has its own external RF input and RF output, this component can be configured to either optimize NF (amplifier configured first),
or OIP3 (amplifier last). The device’s performance features include 22dB stand-alone amplifier gain (amplifier
only), 4dB NF at maximum gain (includes attenuator
insertion loss), and a high OIP3 level of +43dBm. Each
of these features makes the MAX2067 an ideal VGA for
numerous receiver and transmitter applications.
In addition, the MAX2067 operates from a single +5V
supply, or a single +3.3V supply with slightly reduced
performance, and has adjustable bias to trade current
consumption for linearity performance.
Analog Attenuator
The MAX2067’s analog attenuator has a dynamic range
of 31dB and is controlled using an external voltage or
through the 3-wire SPI using an on-chip 8-bit DAC. See
the
Applications Information
section and Table 1 for
attenuator programming details. The attenuator can be
used for both static and dynamic power control.
Driver Amplifier
The MAX2067 includes a high-performance driver with
a fixed gain of 22dB. The driver amplifier circuit is optimized for high linearity for the 50MHz to 1000MHz frequency range.
Applications Information
Attenuator Control
The analog attenuator is controlled by either an external
control voltage applied at ANALOG_VCTRL (pin 39) or
by the on-chip 8-bit DAC. Through the utilization of this
control DAC, the user can easily adjust the analog
attenuation in 0.12dB increments through a simple SPI
command. The DAC enable/disable logic-input pin
(VDAC_EN), and the DAC reference voltage selection
logic-input pin (VREF_SELECT) determine how the
attenuator is controlled. When the DAC is enabled,
either the on-chip voltage reference or the external voltage reference can be selected. See Table 1 for the
attenuator and DAC operation truth table.
Although this on-chip DAC eliminates the need for an
external analog control voltage, the user still has the
option of disabling the DAC and using an external analog control voltage for instances where additional attenuation resolution is needed, or in cases where the gain
trim/automatic gain-control (AGC) loop is purely analog.
SPI Interface and Attenuator Settings
The MAX2067 employs a 3-wire SPI/MICROWIRE™compatible serial interface to program the on-chip DAC.
Eight bits of data are shifted in MSB first and framed by
CS. When CS is low, the clock is active and data is
shifted on the rising edge of the clock. When CS transitions high, the data is latched and the attenuator setting
changes (Figure 1). See Table 2 for details on the SPI
data format.
Table 1. Control Logic
X = Don’t care.
MICROWIRE is a trademark of National Semiconductor Corp.
VDAC_ENVR EF _ SEL EC T ANALOG ATTENUATORD/A CONVERTER
0XControlled by external control voltageDisabled
11Controlled by on-chip DACEnabled (DAC uses on-chip voltage reference)
10Controlled by on-chip DACE nab l ed ( D AC uses exter nal vol tag e r efer ence)
Bias currents for the driver amplifier are set and optimized through external resistors. Resistors R1 and R1A
connected to RSET (pin 18) set the bias current for the
amplifier. The external biasing resistor values can be
increased for reduced current operation at the expense
of performance. See Tables 4 and 5 for details.
Pin-Compatibility Considerations
The MAX2067 is a simplified version of the MAX2065
analog/digital VGA. The MAX2067 does not contain a
digital attenuator and parallel inputs D0–D4. The associated input/output pins are internally connected to
ground (Table 3). Ground the unused input/output pins
to optimize isolation. (See the
Typical Application
Circuit.)
+5V and +3.3V Supply Voltage
The MAX2067 features an optional +3.3V supply voltage
operation with slightly reduced linearity performance.
Layout Considerations
The pin configuration of the MAX2067 has been optimized to facilitate a very compact physical layout of the
device and its associated discrete components.
The exposed paddle (EP) of the MAX2067’s 40-pin thin
QFN-EP package provides a low thermal-resistance
path to the die. It is important that the PCB on which the
MAX2067 is mounted be designed to conduct heat
from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP must be
soldered to a ground plane on the PCB, either directly
or through an array of plated via holes.
NOTE: REMOVE R4 AND C10 WHEN DRIVING
ANALOG_VCTRL WITH AN EXTERNAL VOLTAGE.
C4
RF OUTPUT
*IN LC MODE, R1A IS A 10nF CAPACITOR.
SEE TABLE 5 FOR DETAILS.
MAX2067
50MHz to 1000MHz High-Linearity,
Serial/Analog-Controlled VGA
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________