The MAX2066 high-linearity digital variable-gain amplifier (VGA) is a monolithic SiGe BiCMOS attenuator and
amplifier designed to interface with 50Ω systems operating in the 50MHz to 1000MHz frequency range (See
the
Typical Application Circuit
). The digital attenuator is
controlled as a slave peripheral using either the SPI™compatible interface or a parallel bus with 31dB total
adjustment range in 1dB steps. An added feature
allows “rapid-fire” gain selection between each of four
steps, preprogrammed by the user through the SPIcompatible interface. The 2-pin control allows the user
to quickly access any one of four customized attenuation states without reprogramming the SPI bus.
Because each stage has its own RF input and RF output,
this component can be configured to either optimize NF
(amplifier configured first), or OIP3 (amplifier last). The
device’s performance features include 22dB amplifier
gain (amplifier only), 5.2dB NF at maximum gain (includes
attenuator insertion loss), and a high OIP3 level of
+42.4dBm. Each of these features makes the MAX2066
an ideal VGA for numerous receiver and transmitter
applications.
In addition, the MAX2066 operates from a single +5V
supply with full performance, or a single +3.3V supply
with slightly reduced performance, and has an
adjustable bias to trade current consumption for linearity
performance. This device is available in a compact 40pin thin QFN package (6mm x 6mm) with an exposed
pad. Electrical performance is guaranteed over the
extended temperature range (TC= -40°C to +85°C).
Applications
IF and RF Gain Stages
Cellular Band WCDMA and cdma2000
®
Base
Stations
GSM 850/GSM 900 EDGE Base Stations
WiMAX and LTE Base Stations and Customer
Premise Equipment
Fixed Broadband Wireless Access
Wireless Local Loop
Military Systems
Video-on-Demand (VOD) and DOCSIS
®
-
Compliant EDGE QAM Modulation
Cable Modem Termination Systems (CMTS)
RFID Handheld and Portal Readers
Features
♦ 50MHz to 1000MHz RF Frequency Range
♦ Pin-Compatible Family Includes
MAX2065 (Analog/Digital VGA)
MAX2067 (Analog VGA)
♦ 20.5dB (typ) Maximum Gain
♦ 0.4dB Gain Flatness Over 100MHz Bandwidth
♦ 31dB Gain Range
♦ Supports Four “Rapid-Fire” Preprogrammed
Attenuator States
Quickly Access Any One of Four Customized
Attenuation States Without Reprogramming
the SPI Bus
Ideal for Fast-Attack, High-Level Blocker Protection
Prevents ADC Overdrive Condition
♦ Excellent Linearity (Configured with Amplifier
Last)
+42.4dBm OIP3
+65dBm OIP2
+19dBm Output 1dB Compression Point
-68dBc HD2
-88dBc HD3
♦ 5.2dB Typical Noise Figure (NF)
♦ Fast, 25ns Digital Switching
♦ Very Low Digital VGA Amplitude Overshoot/
Undershoot
♦ Single +5V Supply (Optional +3.3V Operation)
♦ External Current-Setting Resistors Provide Option
for Operating Device in Reduced-Power/
Reduced-Performance Mode
, high-current (HC) mode, VCC= VDD= +3.0V to +3.6V, TC= -40°C to +85°C. Typical values are at VCC=
V
DD
= +3.3V and TC= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Based on junction temperature TJ= TC+ (θJCx VCCx ICC). This formula can be used when the temperature of the exposed
pad is known while the device is soldered down to a printed-circuit board (PCB). See the
Applications Information
section
for details. The junction temperature must not exceed +150°C.
Note 2: Junction temperature T
J
= TA+ (θJAx VCCx ICC). This formula can be used when the ambient temperature of the PCB is
known. The junction temperature must not exceed +150°C.
Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layer
board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.
Note 4: T
C
is the temperature on the exposed pad of the package. TAis the ambient temperature of the device and PCB.
VCC_ to GND ........................................................-0.3V to +5.5V
VDD_LOGIC, DATA, CS, CLK,
SER/PAR..............................................-0.3V to (VCC_ + 0.3V)
STATE_A, STATE_B, D0–D4 ....................-0.3V to (VCC_ + 0.3V)
AMP_IN, AMP_OUT .................................-0.3V to (VCC_ + 0.3V)
ATTEN_IN, ATTEN_OUT........................................-1.2V to +1.2V
RSET to GND.........................................................-0.3V to +1.2V
RF Input Power (ATTEN_IN, ATTEN_OUT).....................+20dBm
RF Input Power (AMP_IN)...............................................+18dBm
Continuous Power Dissipation (Note 1) ...............................6.5W
+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued)
(
Typical Application Circuit
, VCC= VDD= +4.75 to +5.25V, HC mode with attenuator set for maximum gain, 50MHz ≤ fRF≤ 1000MHz,
T
C
= -40°C to +85°C. Typical values are at VCC= VDD= +5.0V, HC mode, PIN= -20dBm, fRF= 200MHz, and TC= +25°C, unless
otherwise noted.) (Note 6)
Note 5: Guaranteed by design and characterization.
Note 6: All limits include external component losses. Output measurements are performed at RF output port of the
Typical
Application Circuit
.
Note 7: Operating outside this range is possible, but with degraded performance of some parameters.
Note 8: It is advisable not to continuously operate the VGA RF input above +15dBm.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Output -1dB Compression PointP
Second Harmonic
Third Harmonic
Group DelayIncludes EV kit PCB trace delay0.8ns
Input Return Loss50Ω source, maximum gain setting23dB
Output Return Loss50Ω load, maximum gain setting18dB
DIGITAL ATTENUATOR
Insertion Loss2.5dB
Input Second-Order Intercept
Point
Input Third-Order Intercept PointIIP3P
Attenuation Range31.2dB
Step Size1dB
Relative Step Accuracy0.2dB
Absolute Step Accuracy0.45dB
Insertion Phase StepfRF = 170MHz
Amplitude Overshoot/Undershoot
Switching Speed
Input Return Loss50Ω source, maximum gain setting19dB
Output Return Loss50Ω load, maximum gain setting19dB
17AMP_OUTDriver Amplifier Output (50Ω). See the Typical Application Circuit for details.
18RSETDriver Amplifier Bias Setting. See the External Bias section.
20AMP_INDriver Amplifier Input (50Ω). See the Typical Application Circuit for details.
21VC C _AMP
23ATTEN_OUT
29ATTEN_IN
—EP
GNDGround
GNDGround. See the Pin-Compatibility Considerations section.
Digital Logic Supply Input. Connect to the digital logic power supply, V
10nF capacitor as close as possible to the pin.
Digital Attenuator SPI or Parallel Control Selection Logic Input. Logic 0 = parallel control,
Logic 1 = serial control.
State AState BDigital Attenuator
Logic = 0Logic = 0Preprogrammed State 1
Logic = 1Logic = 0Preprogrammed State 2
Logic = 0Logic = 1Preprogrammed State 3
Logic = 1Logic = 1Preprogrammed State 4
Driver Amplifier Supply Voltage Input. Connect to the V
1000pF and 10nF capacitors as close as possible to the pin with the smaller value capacitor
closer to the part.
5-Bit Digital Attenuator Output (50Ω). Internally matched to 50Ω. Requires an external DC
blocking capacitor.
5-Bit Digital Attenuator Input (50Ω). Internally matched to 50Ω. Requires an external DC blocking
capacitor.
E xp osed P ad . Inter nal l y connected to GN D . C onnect E P to GN D for p r op er RF p er for m ance and
enhanced ther m al d i ssi p ati on.
CC
power supply. Bypass to GND with
. Bypass to GND with a
DD
MAX2066
50MHz to 1000MHz High-Linearity,
Serial/Parallel-Controlled Digital VGA
The MAX2066 high-linearity digital variable-gain amplifier is a general-purpose, high-performance amplifier
designed to interface with 50Ω systems operating in the
50MHz to 1000MHz frequency range.
The MAX2066 integrates a digital attenuator to provide
31dB of gain control, as well as a driver amplifier optimized to provide high gain, high IP3, low noise figure,
and low power consumption. For applications that do
not require high linearity, the bias current of the amplifier can be adjusted by an external resistor to further
reduce power consumption.
The attenuator is controlled as a slave peripheral using
either the SPI-compatible interface or a parallel bus
with 31dB total adjustment range in 1dB steps. An
added feature allows “rapid-fire” gain selection
between each of the four unique steps (preprogrammed by the user through the SPI-compatible interface). The 2-pin control allows the user to quickly
access any one of four customized attenuation states
without reprogramming the SPI bus. Because each
stage has its own external RF input and RF output, this
component can be configured to either optimize NF
(amplifier configured first), or OIP3 (amplifier last). The
device’s performance features include 22dB standalone amplifier gain (amplifier only), 5.2dB NF at maximum gain (includes attenuator insertion loss), and a
high OIP3 level of +42.4dBm. Each of these features
makes the MAX2066 an ideal VGA for numerous receiver and transmitter applications.
In addition, the MAX2066 operates from a single +5V
supply, or a single +3.3V supply with slightly reduced
performance, and has adjustable bias to trade current
consumption for linearity performance.
5-Bit Digital Attenuator Control
The MAX2066 integrates a 5-bit digital attenuator to
achieve a high level of dynamic range. The digital
attenuator has a 31dB control range, a 1dB step size,
and is programmed either through a dedicated 5-bit
parallel bus or through the 3-wire SPI. See the
Applications Information
section and Table 1 for attenuator programming details. The attenuator can be used
for both static and dynamic power control.
Driver Amplifier
The MAX2066 includes a high-performance driver with
a fixed gain of 22dB. The driver amplifier circuit is optimized for high linearity for the 50MHz to 1000MHz frequency range.
Applications Information
SPI Interface and Attenuator Settings
The attenuator can be programmed through the 3-wire
SPI/MICROWIRE™-compatible serial interface using
5-bit words. Twenty-eight bits of data are shifted in MSB
first and framed by CS. When CS is low, the clock is
active and data is shifted on the rising edge of the
clock. When CS transitions high, the data is latched
and the attenuator setting changes (Figure 1). See
Table 2 for details on the SPI data format.
Table 1. Control Logic
MICROWIRE is a trademark of National Semiconductor Corp.
To capitalize on its fast 25ns switching capability, the
MAX2066 offers a supplemental 5-bit parallel control
interface. The digital logic attenuator-control pins
(D0–D4) enable the attenuator stages (Table 3).
Direct access to this 5-bit bus enables the user to avoid
any programming delays associated with the SPI
interface. One of the limitations of any SPI bus is the
speed at which commands can be clocked into each
peripheral device. By offering direct access to the 5-bit
parallel interface, the user can quickly shift between
digital attenuator states as needed for critical “fastattack” automatic gain-control (AGC) applications.
“Rapid-Fire” Preprogrammed
Attenuation States
The MAX2066 has an added feature that provides
“rapid-fire” gain selection between four prepro-
grammed attenuation steps. As with the supplemental
5-bit bus mentioned above, this “rapid-fire” gain selection allows the user to quickly access any one of four
customized digital attenuation states without incurring
the delays associated with reprogramming the device
through the SPI bus.
The switching speed is comparable to that achieved
using the supplemental 5-bit parallel bus. However, by
employing this specific feature, the digital attenuator
I/O is further reduced by a factor of either 5 or 2.5 (5
control bits vs. 1 or 2, respectively) depending on the
number of states desired.
The user can employ the STATE_A and STATE_B logicinput pins to apply each step as required (Table 4).
Toggling just the STATE_A pin (one control bit) yields
two preprogrammed attenuation states; toggling both
the STATE_A and STATE_B pins together (two control
bits) yields four preprogrammed attenuation states.
Table 3. Digital Attenuator Settings (Parallel Control)
FUNCTIONBITDESCRIPTION
D7
D6
D5
Reserved
D4
D3
D2
D1
D0 (LSB)
Bits D[7:0] are reserved. Set to logic 0.
INPUTLOGIC = 0 (OR GROUND)LOGIC = 1
D0Disable 1dB attenuator, or when SPI is default programmerEnable 1dB attenuator
D1Disable 2dB attenuator, or when SPI is default programmerEnable 2dB attenuator
D2Disable 4dB attenuator, or when SPI is default programmerEnable 4dB attenuator
D3Disable 8dB attenuator, or when SPI is default programmerEnable 8dB attenuator
D4Disable 16dB attenuator, or when SPI is default programmerEnable 16dB attenuator
As an example, assume that the AGC application
requires a static attenuation adjustment to trim out gain
inconsistencies within a receiver lineup. The same AGC
circuit can also be called upon to dynamically attenuate
an unwanted blocker signal that could de-sense the
receiver and lead to an ADC overdrive condition. In this
example, the MAX2066 would be preprogrammed
(through the SPI bus) with two customized attenuation
states—one to address the static gain trim adjustment,
the second to counter the unwanted blocker condition.
Toggling just the STATE_A control bit enables the user
to switch quickly between the static and dynamic attenuation settings with only one I/O pin.
If desired, the user can also program two additional
attenuation states by using the STATE_B control bit as
a second I/O pin. These two additional attenuation settings are useful for software-defined radio applications
where multiple static gain settings may be needed to
account for different frequencies of operation, or where
multiple dynamic attenuation settings are needed to
account for different blocker levels (as defined by multiple wireless standards).
External Bias
Bias currents for the driver amplifier are set and optimized through external resistors. Resistors R1 and R1A
connected to RSET (pin 18) set the bias current for the
amplifier. The external biasing resistor values can be
increased for reduced current operation at the expense
of performance. See Tables 6 and 7 for details.
+5V and +3.3V Supply Voltage
The MAX2066 features an optional +3.3V supply voltage
operation with slightly reduced linearity performance.
Pin-Compatibility Considerations
The MAX2066 is a simplified version of the MAX2065
analog/digital VGA. The MAX2066 does not contain an
analog attenuator, on-chip DAC, or internal reference.
The associated input/output pins are internally connected
to ground (Table 5). Ground the unused input/output pins
to optimize isolation. (See the
Typical Application Circuit
.)
Layout Considerations
The pin configuration of the MAX2066 has been optimized to facilitate a very compact physical layout of the
device and its associated discrete components.
The exposed paddle (EP) of the MAX2066’s 40-pin thin
QFN-EP package provides a low thermal-resistance
path to the die. It is important that the PCB on which the
MAX2066 is mounted be designed to conduct heat
from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP must be
soldered to a ground plane on the PCB, either directly
or through an array of plated via holes.
Table 4. Preprogrammed Attenuation
State Settings
Table 5. MAX2065/MAX2066 Pin
Comparison
STATE_ASTATE_BDIGITAL ATTENUATOR
00Preprogrammed attenuation state 1
10Preprogrammed attenuation state 2
01Preprogrammed attenuation state 3
11Preprogrammed attenuation state 4
PINMAX2065MAX2066
2VREF_SELECTGND
3VDAC_ENGND
32ATTEN1_OUTGND
37ATTEN1_INGND
38VCC_ANALOGGND
39ANALOG_VCTRLGND
40VREF_INGND
MAX2066
50MHz to 1000MHz High-Linearity,
Serial/Parallel-Controlled Digital VGA
To reduce amplitude overshoot during digital attenuator state change, connect a bandpass filter (parallel
LC type) from ATTEN_OUT (pin 23) to ground. L =
18nH and C = 47pF are recommended for 169MHz
operation (Figure 2). Contact the factory for recommended components for other operating frequencies.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________