MAXIM MAX2059 User Manual

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General Description

The MAX2059 high-linearity digital-variable-gain amplifier
(DVGA) is designed to provide 56dB of total gain range
and typical output IP3 and output P1dB levels of
+31.8dBm and +18.4dBm, respectively. The device is
ideal for a variety of applications, including single and
multicarrier 1700MHz to 2200MHz DCS 1800/PCS 1900
EDGE, cdma2000®, WCDMA/UMTS, and TD-SCDMA
base stations. The MAX2059 yields a high level of com­ponent integration, which includes two 5-bit digital
attenuators, a two-stage driver amplifier, a loopback
mixer, and a serial interface to control the attenuators.

The MAX2059 is pin compatible with the MAX2058
700MHz to 1200MHz DVGA, facilitating an easy
design-in for applications where a common PC board
layout is used for both frequency bands.

The MAX2059 is available in a 40-pin thin QFN pack­age with an exposed paddle. Electrical performance is
guaranteed over a -40°C to +85°C temperature range.

Applications

DCS 1800/PCS 1900 EDGE Base-Station
Transmitters and Power Amplifiers

cdmaOne™ and cdma2000 Base-Station
Transmitters and Power Amplifiers

WCDMA, TD-SCDMA, and Other 3G Base-Station
Transmitters and Power Amplifiers

Transmitter Gain Control

Receiver Gain Control

Broadband Systems

Automatic Test Equipment

Digital and Spread-Spectrum Communication
Systems

Microwave Terrestrial Links

Features

♦ +31.8dBm Typical Output IP3

♦ +18.4dBm Typical Output 1dB Compression Point

♦ 1700MHz to 2200MHz RF Frequency Range

♦ 700MHz to 1200MHz RF Frequency Range

(MAX2058)

♦ 10.9dB Typical Small-Signal Gain

♦ Includes Two Independent 5-Bit Digital Attenuator

Stages, Yielding 56dB of Total Gain-Control
Range with 1dB Steps

♦ 3-Wire SPI™/MICROWIRE™ Compatible

♦ Integrated Loopback Mixer for Tx/Rx Self-

Diagnostics

♦ +5V Single-Supply Operation

♦ External Current-Setting Resistors for Scalable

Device Power

♦ Lead-Free Package Available

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-0566; Rev 0; 7/06

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

*EP = Exposed paddle.

+Denotes lead-free package.
T = Tape-and-reel.

Pin Configuration/Functional Diagram appears at end of data
sheet.

cdma2000 is a registered trademark of Telecommunications
Industry Association.
cdmaOne is a trademark of CDMA Development Group.
SPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.

PART

PKG

CODE

MAX2059ETL

T4066-3

MAX2059ETL-T

( 6m m x 6m m )

T4066-3

MAX2059ETL+

( 6m m x 6m m )

T4066-3

MAX2059ETL+T

( 6m m x 6m m )

T4066-3

TEMP RANGE PIN-PACKAGE

-40°C to +85°C

-40°C to +85°C

-40°C to +85°C

-40°C to +85°C

40 Thi n Q FN - E P *

(6mm x 6mm)

40 Thi n Q FN - E P *

40 Thi n Q FN - E P *

40 Thi n Q FN - E P *

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

DC ELECTRICAL CHARACTERISTICS

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, R1 = 1.2kΩ, R2 = 2kΩ, R3 = 2kΩ, TC= -40°C to +85°C. Typical val­ues are at V

CC

= +5.0V and TC= +25°C, unless otherwise noted.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

V

CC

to GND ...........................................................-0.3V to +5.5V

RSET1, RSET2......................................................+1.2V to +4.0V

LBBIAS .......................................................(V

CC

- 1.5V) to +5.5V

LB_EN, DATA,

CS, CLK .............................-0.3V to (VCC+ 0.3V)

ATTEN_INA, ATTEN_INB, ATTEN_OUTA, ATTEN_OUTB

Input Power .................................................................+24dBm

AMPIN, Differential LO Input Power ...............................+12dBm

Continuous Power Dissipation (T

A

= +70°C)

40-Pin TQFN (derated 26.3mW/°C above +70°C) ......2100mW

Operating Temperature Range (Note A) .............-40°C to +85°C

Junction Temperature......................................................+150°C

θ

JC

....................................................................................10°C/W

θ

JA

....................................................................................38°C/W

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Voltage V

CC

Reference to VCC, VCCLB, VCCLOGIC,
VCCBIAS1, VCCBIAS2, VCCAMP

5.0

V

LB mixer disabled (LB_EN = 1)

241

Total Supply Current I

CC

LB mixer enabled (LB_EN = 0)

275

mA

LOGIC INPUTS (DATA, CS, CLK, LB_EN)

Input High Voltage V

IH

2.4 V

Input Low Voltage V

IL

0.8 V

Input Current with Logic-High I

IH

µA

Input Current with Logic-Low I

IL

µA

AC ELECTRICAL CHARACTERISTICS

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ f

LO

≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, PLO= -6dBm, fLO=

95MHz, f

LBOUT

= fRF- fLO, and TC= +25°C, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

UNITS

MAX2058

RF Frequency (Note 2)

MAX2059

MHz

Small-Signal Gain A

V

fRF = 1850MHz, TC = +25°C 8.0

dB

TC = -40°C to +25°C

Gain Variation vs. Temperature

All attenuation
settings

T

C

= +25°C to +85°C

dB/°C

Output Power P

OUT

PIN = 0dBm, fRF = 1850MHz, TC = +25°C 8.0

dBm

1800MHz to 2000MHz

Output Power Flatness PIN = 0dBm

2000MHz to 2200MHz -2

dB

Attenuation Range 56 dB

Output 3rd-Order Intercept Point

OIP3

Two tones: f

RF1

= 1850MHz, f

RF2

=

1851MHz, P

OUT1

= P

OUT2

= +5dBm

dBm

Note A: TCis the temperature on the exposed paddle of the package.

4.75

189

217

0.01

0.01

SYMBOL

MIN TYP MAX

700 1200

1700 2200

10.9 13.3

-0.024

-0.032

10.9 13.3

-0.77

31.8

5.25

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

_______________________________________________________________________________________ 3

AC ELECTRICAL CHARACTERISTICS (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ f

LO

≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, PLO= -6dBm, fLO=

95MHz, f

LBOUT

= fRF- fLO, and TC= +25°C, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

UNITS

Output -1dB Compression Point OP

1dB

(Note 3)

dBm

RMS Error Vector Magnitude EVM P

OUT

= +12dBm, EDGE modulation 0.5 %

200kHz offset

400kHz offset

600kHz offset

Spurious Emissions in 30kHz
Bandwidth

P

OUT

= +12dBm,
EDGE modulation
(Note 4)

1.2MHz offset

dBc

Noise Figure NF 8.1 dB

Input Return Loss 50Ω source, minimum attenuation setting 19 dB

Output Return Loss 50Ω load, minimum attenuation setting 24 dB

5-BIT DIGITAL ATTENUATORS

Insertion Loss

Attenuator measured separately Z

S

= ZL =

50Ω

5dB

Input 3rd-Order Intercept Point IIP3

Attenuator measured separately Z

S

= ZL =

50Ω, two tones: f

RF1

= 1850MHz, f

RF2

=

1851MHz, P

IN1

= P

IN2

= +5dBm

40

dBm

Control Range (Note 5) 28 dB

1800MHz to 2000MHz

Attenuation Step Size Variation
vs. Frequency

2000MHz to 2200MHz

dB

1800MHz to 2200MHz,
T

C

= -40°C to +25°C

Attenuation Variation vs.
Temperature

1800MHz to 2200MHz,
T

C

= +25°C to +85°C

dB/°C

Step Size 1dB

Relative Step Accuracy

1800MHz to 2000MHz, all states
represented. For steps 0–23dB, accuracy is
significantly improved. See Typical
Operating Characterisitcs.

dB

Absolute Step Accuracy

1800MHz to 2000MHz, all states
represented. For steps 0–23dB, accuracy is
significantly improved. See Typical
Operating Characterisitcs.

-3.5
dB

Spurious Emissions in 300kHz
Bandwidth

No RF input, attenuator A stepped from 0 to
2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB,
31dB to 0dB, with attenuator B at 0dB;
attenuator B stepped from 0 to 2dB, 7dB to
9dB, 15dB to 17dB, 0 to 31dB, 31dB to
0dB, with attenuator A at 0dB (Note 6)

-89

dBm

SYMBOL

MIN TYP MAX

18.4

-39.1

-72.5

-83.1

-85.7

±0.17

±0.29

±0.011

±0.023

+0.53

-0.97

+0.3

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

4 _______________________________________________________________________________________

AC ELECTRICAL CHARACTERISTICS (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ f

LO

≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, PLO= -6dBm, fLO=

95MHz, f

LBOUT

= fRF- fLO, and TC= +25°C, unless otherwise noted.) (Note 1)

PARAMETER

CONDITIONS

UNITS

Switching Speed

From chip select transitioning high to the
output settling to within 1dB of steady state
output

0.3 µs

LOOPBACK MIXER

LO Frequency f

LO

(Note 2) 40 100

MHz

LO Input Power P

LO

-6 0

dBm

Output Power

P

IN

= +5dBm, fRF = 1850MHz, TC = +25°C

(Note 7)

dBm

1800MHz to 2000MHz

Gain Accuracy

P

IN

= +5dBm, T

C

2000MHz to 2200MHz

dB

Output 3rd-Order Intercept Point

OIP3

Tw o tones: f

RF1

= 1850M H z, f

RF2

= 1850.2M Hz,

P

IN 1

= P

IN 2

= + 2d Bm , TC = + 25°C

6.2

dBm

Output Noise Floor PIN = +5dBm

dBc/Hz

LB_EN enable time

ON/OFF Switching Time

LB_EN disable time

µs

LBOUT to ATTEN_OUTB Isolation

Mixer enabled, attenuators A and B both set
to 31dB, P

IN

= +5dBm

55 dB

ATTEN_OUTB to LBOUT Isolation

Mixer disabled, PIN = 0dBm 50 dB

Mixer enabled, 50Ω load 20

Output Return Loss

Mixer disabled, 50Ω load 13

dB

LO Port Return Loss 50Ω source 28 dB

SERIAL PERIPHERAL INTERFACE (SPI)

Maximum Clock Speed 38

MHz

Data to Clock Setup Time t

CS

1ns

Data to Clock Hold Time t

CH

9ns

Clock to CS Setup Time t

ES

4ns

CS Positive Pulse Width t

EW

18 ns

CS Negative Pulse Width t

EWN

24 ns

Clock Pulse Width t

CW

13 ns

Note 1: All limits include external component losses. Output measurements taken at RFOUT or LBOUT ports of the Typical

Application Circuit.

Note 2: Operating outside this range is possible, but with degraded performance of some parameters.
Note 3: Compression point characterized. It is advisable not to continuously operate the VGA RF input above +15dBm.
Note 4: Input RF source contribution to spurious emissions (Agilent ESG 4435B, PSA E4443A): 200kHz = -39.2dBc,

400kHz = -73.5dBc, 600kHz = -83.2dBc, 1.2MHz = -85.7dBc

Note 5: See the Applications Information section regarding effective attenuation range.
Note 6: No SPI clock input applied.
Note 7: Guaranteed by design and characterization.

SYMBOL

MIN TYP MAX

-15.4 -12.6 -9.6

±2.2

= -40°C to +85°C

±2.2

-137

0.12

0.12

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

_______________________________________________________________________________________ 5

Typical Operating Characteristics

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ fLO≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, fLO= 95MHz, f

LBOUT

=

fRF- fLO, and TC= +25°C, unless otherwise noted.)

*Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details.

GAIN vs. RF FREQUENCY*

(MAXIMUM GAIN)

RF FREQUENCY (MHz)

GAIN (dB)

MAX12059 toc01

1500 1600 1700 1800 1900 2000 2100 2200 2300

0

2

4

6

8

10

12

14

TC = +25°C

TC = +5°C

TC = +85°C

TC = -40°C

GAIN vs. RF FREQUENCY*

(MAXIMUM GAIN)

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc02

1500 1600 1700 1800 1900 2000 2100 2200 2300

0

2

4

6

8

10

12

14

VCC = 4.75V

VCC = 5.0V

VCC = 5.25V

GAIN vs. RF FREQUENCY*

ADJUSTING ATTEN A

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc03

1500 1600 1700 1800 1900 2000 2100 2200 2300

-25

-15

-5

5

15

ATTEN A ABS ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc04

1500 1600 1700 1800 1900 2000 2100 2200 2300

-6

-5

-4

-3

-2

-1

0

1

2

3

STATES 24–31dB
ATTEN

ATTEN A REL ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc05

1500 1600 1700 1800 1900 2000 2100 2200 2300

-2.0

-1.5

-1.0

-0.5

0

0.5

1.0

24dB ATTEN

16dB ATTEN

GAIN vs. RF FREQUENCY*

ADJUSTING ATTEN B

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc06

1500 1600 1700 1800 1900 2000 2100 2200 2300

-25

-15

-5

5

15

ATTEN B ABS ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc07

1500 1600 1700 1800 1900 2000 2100 2200 2300

-6

-5

-4

-3

-2

-1

0

1

2

3

STATES 24–31dB
ATTEN

ATTEN B REL ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc08

1500 1600 1700 1800 1900 2000 2100 2200 2300

-2.0

-1.5

-1.0

-0.5

0

0.5

1.0

24dB ATTEN

OUTPUT IP3 vs. RF FREQUENCY*

RF FREQUENCY (MHz)

OUTPUT IP3 (dBm)

MAX2059 toc09

1700 1800 1900 2000 2100 2200 2300

25

26

27

28

29

30

31

32

33

34

35

TC = +85°C

TC = +5°C

TC = +25°C

TC = -40°C

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ fLO≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, fLO= 95MHz, f

LBOUT

=

fRF- fLO, and TC= +25°C, unless otherwise noted.)

*Off-chip tuning can improve performance for applications beyond 2200MHz. Contact factory for details.

OUTPUT IP3 vs. RF FREQUENCY*

RF FREQUENCY (MHz)

OUTPUT IP3 (dBm)

MAX2059 toc10

1700 1800 1900 2000 2100 2200 2300

25

26

27

28

29

30

31

32

33

34

35

VCC = 5.0V

VCC = 4.75V

VCC = 5.25V

NOISE FIGURE vs. RF FREQUENCY*

RF FREQUENCY (MHz)

NOISE FIGURE (dB)

MAX2059 toc11

1700 1800 1900 2000 2100 2200 2300

4

6

8

10

12

14

TC = +85°C

TC = +5°C

TC = +25°C

TC = -40°C

NOISE FIGURE vs. RF FREQUENCY*

RF FREQUENCY (MHz)

NOISE FIGURE (dB)

MAX2059 toc12

1700 1800 1900 2000 2100 2200 2300

4

6

8

10

12

14

VCC = 4.75V, 5.0V, 5.25V

OUTPUT P1dB vs. RF FREQUENCY*

RF FREQUENCY (MHz)

OUTPUT P1dB (dBm)

MAX2059 toc13

1700 1800 1900 2000 2100 2200 2300

14

15

16

17

18

19

20

21

TC = +85°C

TC = +25°C

TC = +5°C

TC = -40°C

OUTPUT P1dB vs. RF FREQUENCY*

RF FREQUENCY (MHz)

OUTPUT P1dB (dBm)

MAX2059 toc14

1700 1800 1900 2000 2100 2200 2300

14

15

16

17

18

19

20

21

VCC = 4.75V

VCC = 5.0V

VCC = 5.25V

INPUT RETURN LOSS vs. RF FREQUENCY

ATTEN A VARIED

RF FREQUENCY (MHz)

INPUT RETURN LOSS (dB)

MAX2059 toc15

1500 1600 1700 1800 1900 2000 2100 2200 2300

40

35

30

25

20

15

10

5

0

4dB

0dB

2dB

1dB

8dB

16dB, 31dB

INPUT RETURN LOSS vs. RF FREQUENCY

ATTEN B VARIED

RF FREQUENCY (MHz)

INPUT RETURN LOSS (dB)

MAX2059 toc16

1500 1600 1700 1800 1900 2000 2100 2200 2300

45

40

35

30

25

20

15

10

5

0

31dB

0dB

OUTPUT RETURN LOSS vs. RF FREQUENCY

ATTEN A VARIED

RF FREQUENCY (MHz)

OUTPUT RETURN LOSS (dB)

MAX2059 toc17

1500 1600 1700 1800 1900 2000 2100 2200 2300

30

25

20

15

10

5

0

0dB

31dB

OUTPUT RETURN LOSS vs. RF FREQUENCY

ATTEN B VARIED

RF FREQUENCY (MHz)

OUTPUT RETURN LOSS (dB)

MAX2059 toc18

1500 1600 1700 1800 1900 2000 2100 2200 2300

30

25

20

15

10

5

0

4dB

0dB

8dB

16dB, 31dB

1dB

2dB

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

_______________________________________________________________________________________ 7

Typical Operating Characteristics (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ fLO≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, fLO= 95MHz, f

LBOUT

=

fRF- fLO, and TC= +25°C, unless otherwise noted.)

REVERSE GAIN vs. RF FREQUENCY

ADJUSTING ATTEN A AND B

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc19

1500 1600 1700 1800 1900 2000 2100 2200 2300

-80

-70

-60

-50

-40

-30

ATTEN A AND B, 0dB

ATTEN A

OR B,

31dB

MIXER CONV LOSS vs. RF FREQUENCY

RF FREQUENCY (MHz)

CONVERSION LOSS (dB)

MAX2059 toc20

1700 1800 1900 2000 2100 2200 2300

10.0

12.5

15.0

17.5

20.0

22.5

25.0

TC = +5°C

TC = -5°C

TC = +85°C

TC = +25°C

MIXER CONV LOSS vs. RF FREQUENCY

RF FREQUENCY (MHz)

CONVERSION LOSS (dB)

MAX2059 toc21

1700 1800 1900 2000 2100 2200 2300

10.0

12.5

15.0

17.5

20.0

22.5

25.0

VCC = 5.0V

VCC = 4.75V

VCC = 5.25V

MIXER CONV LOSS vs. RF FREQUENCY

RF FREQUENCY (MHz)

CONVERSION LOSS (dB)

MAX2059 toc22

1700 1800 1900 2000 2100 2200 2300

10.0

12.5

15.0

17.5

20.0

22.5

25.0

PLO = 0dBm

PLO = -3dBm

PLO = -6dBm

MIXER OUTPUT IP3 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTPUT IP3 (dBm)

MAX2059 toc23

1700 1800 1900 2000 2100 2200 2300

2

3

4

5

6

7

8

9

10

TC = +85°C

TC = +5°C

TC = +25°C

TC = -40°C

MIXER OUTPUT IP3 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTPUT IP3 (dBm)

MAX2059 toc24

1700 1800 1900 2000 2100 2200 2300

2

3

4

5

6

7

8

9

10

VCC = 4.75V

VCC = 5.0V

VCC = 5.25V

MIXER OUTPUT IP3 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTPUT IP3 (dBm)

MAX2059 toc25

1700 1800 1900 2000 2100 2200 2300

2

3

4

5

6

7

8

9

10

PLO = -6dBm

PLO = 0dBm

PLO = -3dBm

MIXER OUTPUT RETURN LOSS

vs. RF FREQUENCY (MIXER ENABLED)

RF FREQUENCY (MHz)

MIXER OUTPUT RETURN LOSS (dB)

MAX2059 toc26

1700 1800 1900 2000 2100 2200 2300

40

35

30

25

20

15

10

5

0

TC = +85°C

TC = +25°C

TC = +5°C

TC = -40°C

MIXER OUTPUT RETURN LOSS

vs. RF FREQUENCY (MIXER ENABLED)

RF FREQUENCY (MHz)

MIXER OUTPUT RETURN LOSS (dB)

MAX2059 toc27

1700 1800 1900 2000 2100 2200 2300

40

35

30

25

20

15

10

5

0

VCC = 4.75V, 5.0V, 5.25V

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

8 _______________________________________________________________________________________

MIXER OUTPUT RETURN LOSS

vs. RF FREQUENCY (MIXER DISABLED)

RF FREQUENCY (MHz)

MIXER OUTPUT RETURN LOSS (dB)

MAX2058 toc28

1700 1800 1900 2000 2100 2200 2300

30

25

20

15

10

5

0

TC = +85°C

TC = +25°C

TC = +5°C

TC = -40°C

MIXER OUTPUT RETURN LOSS

vs. RF FREQUENCY (MIXER DISABLED)

RF FREQUENCY (MHz)

MIXER OUTPUT RETURN LOSS (dB)

MAX2059 toc29

1700 1800 1900 2000 2100 2200 2300

30

25

20

15

10

5

0

VCC = 4.75V, 5.0V, 5.25V

LO RETURN LOSS vs. LO FREQUENCY

(MIXER ENABLED)

LO FREQUENCY (MHz)

LO RETURN LOSS (dB)

MAX2059 toc30

0 50 100 150 200

40

30

20

10

0

TC = -40°C

TC = +5°C

TC = +25°C

TC = +85°C

LO RETURN LOSS vs. LO FREQUENCY

(MIXER ENABLED)

LO FREQUENCY (MHz)

LO RETURN LOSS (dB)

MAX2059 toc31

0 50 100 150 200

40

30

20

10

0

VCC = 4.75V, 5.0V, 5.25V

ATTEN A ONLY (NO PC BOARD LOSS)

GAIN vs. RF FREQUENCY

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc32

1500 1600 1700 1800 1900 2000 2100 2200 2300

-40

-30

-20

-10

0

ATTEN A ONLY

ABS ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc33

1500 1600 1700 1800 1900 2000 2100 2200 2300

-6

-5

-4

-3

-2

-1

0

1

2

3

STATES 24dB–31dB
ATTEN

ATTEN A ONLY

REL ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc34

1500 1600 1700 1800 1900 2000 2100 2200 2300

-2.0

-1.5

-1.0

-0.5

0

0.5

1.0

24dB ATTEN

Typical Operating Characteristics (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ fLO≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, fLO= 95MHz, f

LBOUT

=

fRF- fLO, and TC= +25°C, unless otherwise noted.)

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

_______________________________________________________________________________________ 9

ATTEN B ONLY (NO PC BOARD LOSS)

GAIN vs. RF FREQUENCY

RF FREQUENCY (MHz)

GAIN (dB)

MAX2059 toc35

1500 1600 1700 1800 1900 2000 2100 2200 2300

-40

-30

-20

-10

0

ATTEN B ONLY

ABS ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc36

1500 1600 1700 1800 1900 2000 2100 2200 2300

-6

-5

-4

-3

-2

-1

0

1

2

3

STATES 24dB–31dB
ATTEN

ATTEN B ONLY

REL ACCURACY vs. RF FREQUENCY

RF FREQUENCY (MHz)

ERROR (dB)

MAX2059 toc37

1500 1600 1700 1800 1900 2000 2100 2200 2300

-2.0

-1.5

-1.0

-0.5

0

0.5

1.0

24dB ATTEN

Typical Operating Characteristics (continued)

(MAX2059 Typical Application Circuit, VCC= +4.75V to +5.25V, digital attenuators set for maximum gain, 1700MHz ≤ fRF≤ 2200MHz,
40MHz ≤ fLO≤ 100MHz, TC= -40°C to +85°C. Typical values are at VCC= 5.0V, PIN= 0dBm, fRF= 1850MHz, fLO= 95MHz, f

LBOUT

=

fRF- fLO, and TC= +25°C, unless otherwise noted.)

SUPPLY CURRENT vs. SUPPLY VOLTAGE

(MIXER DISABLED)

VCC (V)

SUPPLY CURRENT (mA)

MAX2059 toc38

4.750 4.875 5.000 5.125 5.250

160

170

180

190

200

210

220

TC = +85°C

TC = +5°C

TC = -40°C

TC = +25°C

SUPPLY CURRENT vs. SUPPLY VOLTAGE

(MIXER ENABLED)

VCC (V)

SUPPLY CURRENT (mA)

MAX2059 toc39

4.750 4.875 5.000 5.125 5.250

180

190

200

210

220

230

240

TC = +85°C

TC = +5°C

TC = -40°C

TC = +25°C

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

10 ______________________________________________________________________________________

Pin Description

PIN NAME FUNCTION

1 LO+ Loopback Mixer Local Oscillator Positive Input

2 LO- Loopback Mixer Local Oscillator Negative Input

3 VCCLB

Loopback Mixer Supply Voltage. +5V supply for the internal loopback mixer. Bypass to GND with
22pF and 0.1µF capacitors as close as possible to the pin.

4 LBOUT Loopback Mixer RF Output. Internally matched to 50Ω. AC-couple with a capacitor.

5 LB_EN Loop b ack M i xer Log i c Inp ut. S et to l og i c- l ow 0 to enab l e the m i xer . S et to l og i c- hi g h 1 to d i sab l e the m i xer .

6 DATA SPI Digital Data Input

7 CLK SPI Clock Input
8 CS SPI Chip-Select Input

9

Logic Supply Voltage. +5V supply for the internal logic circuitry. Bypass to GND with 22pF and 0.1µF
capacitors as close as possible to the pin.

10, 11, 13,
14, 16, 17,
19, 22, 24,
25, 26, 30,
32, 34, 35,

37, 38

GND Ground

12

Attenuator B Output. Internally matched to 50Ω.

15 V

CC

Attenuator B Supply. +5V supply for attenuator B. Bypass to GND with 22pF and 0.01µF capacitors
as close as possible to the pin.

18

Attenuator B Input. Internally matched to 50Ω.

20 RSET2

Output Amplifier Bias-Current-Setting Resistor. Sets the bias current for the output amplifier stage.
Connect a 2kΩ resistor to ground.

21

Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF
and 0.1µF capacitors as close as possible to the pin.

23 AMPOUT RF Amplifier Output. Internally matched to 50Ω.

27 VCCAMP

RF Amplifier Supply Voltage. +5V supply for the RF amplifier. Bypass to GND with 1000pF and 0.1µF
capacitors as close as possible to the pin.

28 AMPIN RF Amplifier Input. Internally matched to 50Ω.

29

Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF
and 0.1µF capacitors as close as possible to the pin.

31 RSET1

Input Amplifier Bias-Current-Setting Resistor. Sets the bias current for the input amplifier stage.
Connect a 1.2kΩ resistor to ground.

33

Attenuator A Output. Internally matched to 50Ω.

36 V

CC

Attenuator A Supply Voltage. +5V supply for attenuator A. Bypass to GND with 22pF and 0.01µF
capacitors as close as possible to the pin.

39

Attenuator A Input. Internally matched to 50Ω.

40 LBBIAS

Loopback Mixer Bias-Current-Setting Resistor. Sets the bias current for the mixer. Connect a 2kΩ
resistor to ground.

EP EP Exposed Ground Paddle. Solder the exposed paddle to GND using multiple vias.

VCCLOGIC

ATTEN_OUTB

ATTEN_INB

VCCBIAS2

VCCBIAS1

ATTEN_OUTA

ATTEN_INA

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

______________________________________________________________________________________ 11

Detailed Description

The MAX2059 high-linearity DVGA consists of two 5-bit
digital attenuators, a fixed-gain two-stage driver amplifi­er, a loopback mixer, and a serial interface to control
the attenuators. This high level of component integra­tion makes the MAX2059 ideal for base-station trans­mitter applications. The MAX2059 is designed to
operate in the 1700MHz to 2200MHz frequency range.
The overall cascaded performance of the MAX2059
produces a typical 10.9dB gain, a +31.8dBm OIP3, an

18.4dBm OP1dB, and a total 56dB gain-control range.

5-Bit Attenuators

The MAX2059 integrates two 5-bit digital attenuators to
achieve a high dynamic range. Each attenuator is pro­grammed with a 3-wire SPI interface, with a total effec­tive range of 28dB and step size of 1dB. See the
Applications Information section and Table 1 for attenu­ator programming details. The attenuators can be used
for both static and dynamic power control.

Driver Amplifier

The MAX2059 includes a two-stage medium power
amplifier with a fixed 18.5dB gain. The driver amplifier
circuit is optimized for high linearity and medium output
power capability for the 1800MHz to 2000MHz frequen­cy range. The driver amplifier is intended to amplify a
modulated signal and drive a high-power amplifier in
base-station transmitters. In a typical application, the
driver amplifier is cascaded in between the two digital
attenuators. See the Typical Application Circuit.

The two-stage amplifier stage can be disabled for
applications where only the digital attenuators and/or
loopback mixer are used. To disable the two-stage
amplifier, ground or leave unconnected the amplifier
supplies VCCBIAS2, VCCAMP, VCCBIAS1, and also
the inputs for setting the amplifier bias currents RSET1,
RSET2. This reduces the supply current by approxi­mately 187mA under typical conditions.

Loopback Mixer

The MAX2059 loopback mixer uses a double-balanced
active architecture designed to operate with a
1700MHz to 2200MHz RF frequency range, and a
40MHz to 100MHz LO frequency range. The RF port of
the mixer is connected internally (with an on-chip
switch) to the input of the first attenuator stage. The
mixer’s IF port is matched for a single-ended 50Ω
impedance, while the LO port requires a differential
input impedance of 100Ω.

The loopback mixer facilitates a self-diagnostic mode
for cellular transceivers, whereby the Tx band signal at
the input of the mixer can be translated up or down to
the corresponding Rx band. This translated signal can
then be fed back to the radio’s receiver for complete
Tx/Rx loop diagnostics. The loopback mixer is enabled
and disabled with LB_EN. Set LB_EN to a logic-low 0 to
enable the mixer, set LB_EN to a logic-high 1 to disable
the mixer.

The MAX2059 loopback mixer accepts a nominal -6dBm
LO input power and exhibits a -12.6dBm output power
and an output IP3 of 6.2dBm (PIN= +5dBm).

Applications Information

SPI Interface and Attenuator Settings

The two 5-bit attenuators are programmed with the 3­wire SPI/MICROWIRE-compatible serial interface using
10-bit words. Bit 9 of the 10-bit data is shifted in first,
along with all remaining data bits, on the rising edge of
the clock regardless of CS being high or low. Once all
the data bits are shifted in, all will be sent to the attenua­tors on the rising edge of CS, thus changing the attenua­tion state. For standard SPI operation, pull CS low for the

ATTENUATOR A (5 MSBs)

ATTENUATOR B (5 LSBs)

Bit 9 = 16dB step Bit 4 = 16dB step

Bit 8 = 8dB step Bit 3 = 8dB step

Bit 7 = 4dB step Bit 2 = 4dB step

Bit 6 = 2dB step Bit 1 = 2dB step

Bit 5 = 1dB step Bit 0 = 1dB step

Table 1. Attenuator Programming

Figure 1. SPI Timing Diagram

Note: Due to finite circuit isolation, the total effective range of
each attenuator is limited to 28dB.

MSBDATA

BIT 9 BIT 8 BIT 1 BIT 0 LSB

CLOCK

CS

NOTES:
DATA ENTERED ON CLOCK RISING EDGE.
ATTENUATOR STATE CHANGE ON CS RISING EDGE.

t

CS

t

EWN

t

CH

t

CW

t

ES

t

EW

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

12 ______________________________________________________________________________________

MAX2058/MAX2059

90°

DUAL DAC QUAD AMP

ZERO-IF

MODS/DEMODS

RF DIGITAL VGAs

MAX9491

VCO + PLL

I

12

Q

12

SPI

LOGIC

31dB

SPI

CONTROL

LOOPBACK

OUT

(FEEDS BACK

INTO Rx CHAIN

FRONT-END)

Rx

OFF

45, 80,

OR

95MHz

LO

18.5dB
RFOUT

31dB

∑

0°

MAX5873 MAX4395

MAX2021/MAX2022/MAX2023

Figure 2. Direct Conversion Transmitter for GSM/EDGE Base Stations

duration of a valid 10-bit data set (t

EWN

). This CS nega-

tive pulse width includes the setup time of the rising
clock edge to CS transitioning high (tES). See Figure 1.

The 5 MSBs of the 10-bit word program attenuator A,
and the 5 LSBs of the 10-bit word program attenuator
B. Each bit sets the attenuators to a corresponding
attenuation level. For example, logic-low 0 for bit 5 and
bit 0 of attenuator A and B, respectively, sets both
attenuators at 1dB. 00000 configures both attenuators
for maximum attenuation and 11111 sets for minimum
attenuation. See Table 1 for programming details.

External Bias

Bias currents for the two-stage amplifier and the loop­back mixer are set and optimized with external resistors.
Resistor R1 (pin 31) sets the bias current for the input
amplifier, R2 (pin 20) sets the bias current for the output
amplifier, and R3 (pin 40) sets the bias for the loopback
mixer. The external biasing resistor values can be
increased for reduced current operation at the expense
of performance. Contact the factory for details.

Board Layout

The pin configuration of the MAX2059 has been opti­mized to facilitate a very compact physical layout of the
device and its associated discrete components.

The exposed paddle (EP) of the MAX2059’s thin QFN­EP package provides a low thermal-resistance path to
the die. It is important that the PC board on which the
MAX2059 is mounted be designed to conduct heat

from the EP. In addition, provide the EP with a low­inductance path to electrical ground. The EP MUST be
soldered to a ground plane on the PC board, either
directly or through an array of plated via holes.

COMPONENT

DESCRIPTION

C1, C4, C10, C13,

C16

Microwave capacitors (0603)

C2, C3, C5, C8,

C11, C14, C17, C24

Microwave capacitors (0402)

C6, C19

Microwave capacitors (0402)

C7, C18

Microwave capacitors (0402)

C9, C12, C15

Microwave capacitors (0402)

C20, C21, C22

Microwave capacitors (0402)

C23

Microwave capacitor (0402)

R1

±1% resistor (0402)

R2, R3

±1% resistors (0402)

R4

±1% resistor (0402)

TI 2:1

RF transformer (100:50)
Mini-Circuits TC2-1T

U1 — MAX2059

Table 2. Component List Referring to the
Typical Application Circuit

VALUE

0.1µF

22pF

120pF

0.01µF

1000pF

0.75pF

1pF

1.2kΩ

2.0kΩ

110Ω

MAX2059

1700MHz to 2200MHz High-Linearity,

SPI-Controlled DVGA with Integrated Loopback Mixer

______________________________________________________________________________________ 13

MAX2059

30

29

28

27

26

36 35 34 33 32 31

R1

GND

GND

GND

GND

GND

AMPOUT

R2

C19

C17

C22

C18

C1 C2

C3

V

CC

V

CC

V

CC

C7

C21

C8

RF INPUT

V

CC

GND

GND

GND

GND

GND

RSET1

ATTEN_OUTB

ATTEN_INB

ATTN_INA

ATTEN_OUTA

LBBIAS
40 39 38 37

15 16 17 18 19 2011 12 13 14

25

23

21

24

22

5

4

3

2

9

8

10

7

6

1

R3

T1

R4

LO+

LO-

VCCLB

VCCLOGIC

DRIVER AMP

VCCBIAS2

LBOUT

LB_EN

DATA

CLK

CS

GND

GND

GND

RSET2

GND

GND

GND

GND

V

CC

5-BIT ATTENUATOR

B

SPI

E.P.

5-BIT ATTENUATOR

A

LO INPUT

LBOUT

RF OUTPUT

C4 C5

C6

V

CC

C10

C11

C14

C9

V

CC

VCCAMP

AMPIN

VCCBIAS1

C13C12

V

CC

C16C15

C20

C24

C23

Typical Application Circuit

Direct-Conversion Base-Station

Transmitter

The MAX2058/MAX2059 are designed to interface
directly with Maxim’s direct-conversion quadrature
modulators and high-speed DACs to provide a com­plete solution for GSM/EDGE base-station transmitter
applications. See Figure 2. The MAX2058/MAX2059,

together with the MAX2021/MAX2022/MAX2023 direct­conversion modulators/demodulators, the MAX5873
dual-channel DAC, and the MAX4395 quad amplifier,
form an ideal total transmitter lineup. This overall sys­tem is highly efficient and low cost, while maintaining
high linearity and low-noise performance.

MAX2059

1700MHz to 2200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

Package Information

For the latest package outline information, go to

www.maxim-ic.com/packages

.

MAX2059

30

29

28

27

26

36 35 34 33 32 31

40 39 38 37

15 16 17 18 19 2011 12 13 14

25

23

21

24

22

5

4

3

2

9

8

10

7

6

1

DRIVER AMP

5-BIT ATTENUATOR

B

SPI

5-BIT ATTENUATOR

A

GND

GND

GND

GND

GND

AMPOUT

V

CC

GND

GND

GND

GND

GND

RSET1

ATTEN_OUTB

ATTEN_INB

ATTEN_INA

ATTEN_OUTA

LBBIAS

LO+

LO-

VCCLB

VCCLOGIC

VCCBIAS2

LBOUT

LB_EN

DATA

CLK

CS

GND

GND

GND

RSET2

GND

GND

GND

GND

V

CC

VCCAMP

AMPIN

VCCBIAS1

Pin Configuration/Functional Diagram

Chip Information

PROCESS: SiGe BiCMOS