The MAX2058 high-linearity digital-variable-gain amplifier (DVGA) is designed to provide 62dB of total gain
range and typical output IP3 and output P1dB levels of
+32.3dBm and +19dBm, respectively. The device is
ideal for a variety of applications, including RFID handheld and portal readers, as well as single and multicarrier 700MHz to 1200MHz GSM/EDGE, cdma2000
®
,
WCDMA, and iDEN®base stations. The MAX2058
yields a high level of component integration, which
includes two 5-bit, 31dB digital attenuators, a two-stage
driver amplifier, a loopback mixer, and a serial interface
to control the attenuators.
The MAX2058 is pin compatible with the MAX2059
1800MHz to 2200MHz DVGA, facilitating an easy
design-in for applications where a common PC board
layout is used for both frequency bands.
The MAX2058 is available in a 40-pin thin QFN package with an exposed paddle. Electrical performance is
guaranteed over a -40°C to +85°C temperature range.
Applications
GSM 850/GSM 900 2G and 2.5G EDGE BaseStation Transmitters and Power Amplifiers
Cellular cdmaOne™, cdma2000, and Integrated
Digital Enhanced Network (iDEN) Base-Station
Transmitters and Power Amplifiers
WCDMA 850MHz and Other 3G Base-Station
Transmitters and Power Amplifiers
Transmitter Gain Control
Receiver Gain Control
Broadband Systems
Automatic Test Equipment
Digital and Spread-Spectrum Communication
Systems
Microwave Terrestrial Links
RFID Handheld and Portal Readers
Features
♦ +32.3dBm Typical Output IP3
♦ +19dBm Typical Output 1dB Compression Point
♦ 700MHz to 1200MHz RF Frequency Range
♦ 1800MHz to 2200MHz RF Frequency Range
(MAX2059)
♦ 10.5dB Typical Small-Signal Gain
♦ Includes Two Independent 31dB Attenuator
Stages, Yielding 62dB of Total Gain-Control
Range with 1dB Steps
♦ 3-Wire SPI™/MICROWIRE™-Compatible
♦ Integrated Loopback Mixer for Tx/Rx Self-
Diagnostics
♦ +5V Single-Supply Operation
♦ External Current-Setting Resistors for Scalable
Device Power
♦ Lead-Free Package Available
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
Pin Configuration/Functional Diagram appears at end of data
sheet.
SPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
cdma2000 is a registered trademark of Telecommunications
Industry Association.
iDEN is a registered trademark of Motorola, Inc.
cdmaOne is a trademark of CDMA Development Group.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PARTTEMP RANGEPIN-PACKAGE
MAX2058ETL-40°C to +85°C
MAX2058ETL-T-40°C to +85°C
MAX2058ETL+-40°C to +85°C
MAX2058ETL+T -40°C to +85°C
40 Thi n Q FN - E P **
(6mm x 6mm)
40 Thi n Q FN - E P **
( 6m m x 6m m )
40 Thi n Q FN - E P **
( 6m m x 6m m )
40 Thi n Q FN - E P **
( 6m m x 6m m )
PKG
CODE
T4066-3
T4066-3
T4066-3
T4066-3
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
, VCC= +4.75V to +5.25V, R1 = 1.2kΩ, R2 = 3.92kΩ, R3 = 2kΩ, TC= -40°C to +85°C. Typical
values are at V
CC
= +5.0V and TC= +25°C, unless otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND ...........................................................-0.3V to +5.5V
RSET1, RSET2......................................................+1.2V to +4.0V
Attenuator measured separately Z
50Ω, two tones: f
941MHz, P
800MHz to 900MHz±0.08
900MHz to 1000MHz±0.06
800MHz to 1000MHz,
T
= -40°C to +25°C
C
800MHz to 1000MHz,
T
= +25°C to +85°C
C
No RF input, attenuator A stepped from 0 to
2dB, 7dB to 9dB, 15dB to 17dB, 0 to 31dB,
31dB to 0dB, with attenuator B at 0dB;
attenuator B stepped from 0 to 2dB, 7dB to
9dB, 15dB to 17dB, 0 to 31dB, 31dB to
0dB, with attenuator A at 0dB
IN1
400kHz offset-73.5
600kHz offset-82.7
1.2MHz offset-85.7
= ZL =
S
= ZL =
S
RF2
=
= P
RF1
IN2
= 940MHz, f
= +5dBm
19dBm
3.3dB
44dBm
±0.002
±0.003
-0.2
+0.4
-0.2
+0.5
-85dBm
dBc
dB
dB/°C
dB
dB
Switching Speed
From chip select transitioning high to the
output settling to within 1dB of steady state
output
0.3µs
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
Note 1: All limits include external component losses. Output measurements taken at RFOUT or LBOUT ports of the
Typical
Application Circuit
.
Note 2: Operating outside this range is possible, but with degraded performance of some parameters.
Note 3: Compression point characterized. It is advisable not to continuously operate the VGA RF input above +15dBm.
Note 4: Input RF source contribution to spurious emissions (Agilent ESG 4435B, PSA E4443A): 200kHz = -39.2dBc,
12ATTEN_OUTB Attenuator B Output. Internally matched to 50Ω.
15V
18ATTEN_INBAttenuator B Input. Internally matched to 50Ω.
20RSET2
21VCCBIAS2
23AMPOUTRF Amplifier Output. Internally matched to 50Ω.
27VCCAMP
28AMPINRF Amplifier Input. Internally matched to 50Ω.
29VCCBIAS1
31RSET1
33ATTEN_OUTA Attenuator A Output. Internally matched to 50Ω.
36V
39ATTEN_INAAttenuator A Input. Internally matched to 50Ω.
40LBBIAS
EPGNDExposed Ground Paddle. Solder the exposed paddle to GND using multiple vias.
GNDGround
CC
CC
Loopback Mixer Supply Voltage. +5V supply for the internal loopback mixer. Bypass to GND with
100pF and 0.1µF capacitors as close as possible to the pin.
Logic Supply Voltage. +5V supply for the internal logic circuitry. Bypass to GND with 100pF and
0.1µF capacitors as close as possible to the pin.
Attenuator B Supply. +5V supply for attenuator B. Bypass to GND with 100pF and 0.01µF capacitors
as close as possible to the pin.
Output Amplifier Bias-Current-Setting Resistor. Sets the bias current for the output amplifier stage.
Connect a 3.92kΩ resistor to ground.
Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF
and 0.1µF capacitors as close as possible to the pin.
RF Amplifier Supply Voltage. +5V supply for the RF amplifier. Bypass to GND with 1000pF and 0.1µF
capacitors as close as possible to the pin.
Bias Circuit Supply Voltage. +5V supply for the internal bias circuitry. Bypass to GND with 1000pF
and 0.1µF capacitors as close as possible to the pin.
Input Amplifier Bias-Current-Setting Resistor. Sets the bias current for the input amplifier stage.
Connect a 1.2kΩ resistor to ground.
Attenuator A Supply Voltage. +5V supply for attenuator A. Bypass to GND with 100pF and 0.01µF
capacitors as close as possible to the pin.
Loopback Mixer Bias-Current-Setting Resistor. Sets the bias current for the mixer. Connect a 2kΩ
resistor to ground.
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
The MAX2058 high-linearity DVGA consists of two 5-bit,
31dB digital attenuators, a fixed-gain two-stage driver
amplifier, a loopback mixer, and a serial interface to
control the attenuators. This high level of component
integration makes the MAX2058 ideal for base-station
transmitter applications. The MAX2058 is designed to
operate in the 700MHz to 1200MHz frequency ranges.
The overall cascaded performance of the MAX2058
produces a typical 10.5dB gain, a +32.3dBm OIP3, a
19dBm OP1dB, and a total 62dB gain-control range.
5-Bit Attenuators
The MAX2058 integrates two 5-bit digital attenuators to
achieve a high dynamic range. Each attenuator has a
31dB control range, a 1dB step size, and is programmed with the 3-wire SPI. See the
Applications
Information
section and Table 1 for attenuator programming details. The attenuators can be used for both static and dynamic power control.
Driver Amplifier
The MAX2058 includes a two-stage medium power
amplifier with a fixed 17.5dB gain. The driver amplifier
circuit is optimized for high linearity and medium output
power capability for the 800MHz to 1000MHz frequency range. The driver amplifier is intended to amplify a
modulated signal and drive a high-power amplifier in
base-station transmitters. In a typical application, the
driver amplifier is cascaded in between the two digital
attenuators. See the
Typical Application Circuit.
The two-stage amplifier stage can be disabled for
applications where only the digital attenuators and/or
loopback mixer are used. To disable the two-stage
amplifier, ground or leave unconnected the amplifier
supplies VCCBIAS2, VCCAMP, VCCBIAS1, and also
the inputs for setting the amplifier bias currents RSET1,
RSET2. This reduces the supply current by approximately 132mA under typical conditions.
Loopback Mixer
The MAX2058 loopback mixer uses a double-balanced
active architecture designed to operate with a 700MHz
to 1200MHz RF frequency range, and a 40MHz to
100MHz LO frequency range. The RF port of the mixer is
connected internally (with an on-chip switch) to the input
of the first attenuator stage. The mixer’s IF port is
matched for a single-ended 50Ω impedance, while the
LO port requires a differential input impedance of 100Ω.
The loopback mixer facilitates a self-diagnostic mode
for cellular transceivers, whereby the Tx band signal at
the input of the mixer can be translated up or down to
the corresponding Rx band. This translated signal can
then be fed back to the radio’s receiver for complete
Tx/Rx loop diagnostics. The loopback mixer is enabled
and disabled with LB_EN. Set LB_EN to a logic-low 0 to
enable the mixer, set LB_EN to a logic-high 1 to disable
the mixer.
Applications Information
SPI Interface and Attenuator Settings
The two 5-bit attenuators are programmed with the 3wire SPI/MICROWIRE-compatible serial interface using
10-bit words. Bit 9 of the 10-bit data is shifted in first,
along with all remaining data bits, on the rising edge of
the clock regardless of CS being high or low. Once all
the data bits are shifted in, all will be sent to the attenuators on the rising edge of CS, thus changing the attenuation state. For standard SPI operation, pull CS low for the
duration of a valid 10-bit data set (t
EWN
). This CS nega-
tive pulse width includes the setup time of the rising
clock edge to CS transitioning high (tES). See Figure 1.
Table 1. Attenuator Programming
Figure 1. SPI Timing Diagram
ATTENUATOR A (5 MSBs)ATTENUATOR B (5 LSBs)
Bit 9 = 16dB stepBit 4 = 16dB step
Bit 8 = 8dB stepBit 3 = 8dB step
Bit 7 = 4dB stepBit 2 = 4dB step
Bit 6 = 2dB stepBit 1 = 2dB step
Bit 5 = 1dB stepBit 0 = 1dB step
MSBDATA
BIT 9 BIT 8BIT 1 BIT 0LSB
CLOCK
CS
NOTES:
DATA ENTERED ON CLOCK RISING EDGE.
ATTENUATOR STATE CHANGE ON CS RISING EDGE.
t
CS
t
t
CH
CW
t
EWN
t
ES
t
EW
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
Figure 2. Direct Conversion Transmitter for GSM/EDGE Basestations
The 5 MSBs of the 10-bit word program attenuator A,
and the 5 LSBs of the 10-bit word program attenuator
B. Each bit sets the attenuators to a corresponding
attenuation level. For example, logic-low 0 for bit 5 and
bit 0 of attenuator A and B, respectively, sets both
attenuators at 1dB. 00000 configures both attenuators
for 31dB attenuation and 11111 sets for 0dB attenuation. See Table 1 for programming details.
External Bias
Bias currents for the two-stage amplifier and the loopback mixer are set and optimized with external resistors.
Resistor R1 (pin 31) sets the bias current for the input
amplifier, R2 (pin 20) sets the bias current for the output
amplifier, and R3 (pin 40) sets the bias for the loopback
mixer. The external biasing resistor values can be
increased for reduced current operation at the expense
of performance. Contact the factory for details.
Board Layout
The pin configuration of the MAX2058 has been optimized to facilitate a very compact physical layout of the
device and its associated discrete components.
The exposed paddle (EP) of the MAX2058’s thin QFNEP package provides a low thermal-resistance path to
the die. It is important that the PC board on which the
MAX2058 is mounted be designed to conduct heat
from the EP. In addition, provide the EP with a lowinductance path to electrical ground. The EP MUST be
soldered to a ground plane on the PC board, either
directly or through an array of plated via holes.
Table 2. Component List Referring to the
Typical Application Circuit
COMPONENTVALUEDESCRIPTION
C1, C4, C10, C13,
C16
C2, C5, C8, C17100pFMicrowave capacitors (0402)
C3, C6, C14, C1947pFMicrowave capacitors (0402)
C7, C180.01µFMicrowave capacitors (0402)
C9, C12, C151000pF Microwave capacitors (0402)
C113.9pFMicrowave capacitor (0402)
R11.2kΩ
R23.92kΩ
R32.0kΩ±1% resistor (0402)
R4110Ω±1% resistor (0402)
T12:1
U1—
0.1µFMicrowave capacitors (0603)
±1% resistor (0402)
±1% resistor (0402)
RF transformer (100:50)
Mini-Circuits TC2-1T
MAX2058 MAXIM IC
MAX2021/MAX2022/MAX2023*
MAX5873MAX4395
DUAL DACQUAD AMP
I
12
Q
12
*FUTURE PRODUCTS—CONTACT FACTORY FOR SAMPLES
ZERO-IF
MODS/DEMODS
0°
90°
∑
MAX9491*
VCO + PLL
45, 80,
OR
95MHz
LO
MAX2058/MAX2059*
RF DIGITAL VGAs
17.5dB31dB
LOOPBACK
OUT
(FEEDS BACK
INTO Rx CHAIN
FRONT-END)
Rx
OFF
31dB
RF OUT
SPI
LOGIC
SPI
CONTROL
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
The MAX2058/MAX2059 are designed to interface
directly with Maxim’s direct-conversion quadrature
modulators and high-speed DACs to provide a complete solution for GSM/EDGE base-station transmitter
applications. See Figure 2. The MAX2058/MAX2059,
together with the MAX2021/MAX2022/MAX2023* directconversion modulators/demodulators, the MAX5873
dual-channel DAC, and the MAX4395 quad amplifier,
form an ideal total transmitter lineup. This overall system is highly efficient and low cost, while maintaining
high linearity and low noise performance.
RF INPUT
C19
R3
ATTN_INA
LBBIAS
40393837
1
2
3
4
5
6
7
8
9
10
GND
C6
SPI
ATTEN_OUTB
LO INPUT
LBOUT
T1
V
CC
C1C2
V
CC
C4C5
R4
C3
LO+
LO-
VCCLB
LBOUT
LB_EN
DATA
CLK
CS
VCCLOGIC
GND
RF OUTPUT
GND
GND
5-BIT ATTENUATOR
5-BIT ATTENUATOR
GND
GND
V
CC
C17C18
R1
CC
V
GND
GND
363534333231
A
MAX2058
DRIVER AMP
B
15161718192011121314
CC
V
GND
GND
C8
C7
GND
ATTEN_OUTA
GND
ATTEN_INB
E.P.
RSET1
RSET2
30
29
28
27
26
25
24
23
22
21
R2
GND
VCCBIAS1
AMPIN
VCCAMP
GND
GND
GND
AMPOUT
GND
VCCBIAS2
C9
C14
C13C12
C10
C11
V
CC
C16C15
V
CC
V
CC
MAX2058
700MHz to 1200MHz High-Linearity,
SPI-Controlled DVGA with Integrated Loopback Mixer
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________