MAXIM MAX19588 Technical data

General Description

The MAX19588 is a 3.3V, high-speed, high-perfor­mance analog-to-digital converter (ADC) featuring a
fully differential wideband track-and-hold (T/H) and a
16-bit converter core. The MAX19588 is optimized for
multichannel, multimode receivers, which require the
ADC to meet very stringent dynamic performance
requirements. With a -82dBFS noise floor, the
MAX19588 allows for the design of receivers with supe­rior sensitivity requirements.

At 100Msps, the MAX19588 achieves a 79dB signal-to­noise ratio (SNR) and an 82.1dBc/97.7dBc single-tone
spurious-free dynamic range performance (SFDR1/
SFDR2) at f

IN

= 70MHz. The MAX19588 is not only opti­mized for excellent dynamic performance in the 2nd
Nyquist region, but also for high-IF input frequencies. For
instance, at 130MHz, the MAX19588 achieves an

82.3dBc SFDR and its SNR performance stays flat (within

2.3dB) up to 175MHz. This level of performance makes
the part ideal for high-performance digital receivers.

The MAX19588 operates from a 3.3V analog supply
voltage and a 1.8V digital voltage, features a 2.56V

P-P

full-scale input range, and allows for a guaranteed sam­pling speed of up to 100Msps. The input track-and-hold
stage operates with a 600MHz full-scale, full-power
bandwidth.

The MAX19588 features parallel, low-voltage CMOS­compatible outputs in two’s-complement output format.

The MAX19588 is manufactured in an 8mm x 8mm,
56-pin thin QFN package with exposed paddle (EP) for
low thermal resistance, and is specified for the extended
industrial (-40°C to +85°C) temperature range.

Applications

Cellular Base-Station Transceiver Systems (BTS)

Wireless Local Loop (WLL)

Multicarrier Receivers

Multistandard Receivers

E911 Location Receivers

High-Performance Instrumentation

Antenna Array Processing

Features

♦ 100Msps Conversion Rate
♦ -82dBFS Noise Floor
♦ Excellent Low-Noise Characteristics

SNR = 79.4dB at f

IN

= 10MHz

SNR = 79dB at fIN= 70MHz

♦ Excellent Dynamic Range (SFDR1/SFDR2)

93.2dBc/102.5dBc at fIN= 10MHz

82.1dBc/97.7dBc at fIN= 70MHz

♦ Less than 0.1ps Sampling Jitter
♦ 1275mW Power Dissipation
♦ 2.56V

P-P

Fully Differential Analog Input Voltage

Range

♦ CMOS-Compatible Two’s-Complement Data

Output

♦ Separate Data Valid Clock and Over-Range Outputs
♦ Flexible Input Clock Buffer
♦ Small 56-Pin, 8mm x 8mm x 0.8mm Thin QFN

Package

♦ EV Kit Available for MAX19588

(Order MAX19588EVKIT)

MAX19588

High-Dynamic-Range, 16-Bit,

100Msps ADC with -82dBFS Noise Floor

________________________________________________________________

Maxim Integrated Products

1

Pin Configuration

Ordering Information

19-0513; Rev 0; 5/06

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

+

Denotes lead-free package.

D = Dry pack.

*

EP = Exposed paddle.

PART

MAX19588ETN-D

MAX19588ETN+D

RANGE

-40°C to

-40°C to

TEMP

+85°C

+85°C

PIN-PACKAGE

56 Thin QFN-EP* T5688-2

56 Thin QFN-EP* T5688-2

PKG
CODE

TOP VIEW

DD

DVDDDV

42 41 40 39 38 37 36 35 34 33 32 31 30 29

D9

43

D10

44

D11

45

D12

46

D13

47

D14

48

D15

49

DAV

50

DV

51

DD

DGND

52

53

DOR

54

N.C.

55

AV

DD

56

AV

DD

1 2 3 4 5 6 7 8 91011121314

MAX19588

EP

DDAAVDDA

CLKP

CLKN

AGND

AGND

AGND

AV

THIN QFN

8mm x 8mm

AGND

AGND

INP

DD

DGND

DGND

DV

D0D1D2D3D4D5D6D7D8

28

AGND

27

REFIN

26

REFOUT

25

AV

DD

24

AV

DD

23

AV

DD

22

AGND

21

AGND

20

AGND

19

AV

DD

18

AV

DD

17

AV

DD

16

N.C.

15

N.C.

INN

AGND

AGND

AGND

MAX19588

High-Dynamic-Range, 16-Bit,
100Msps ADC with -82dBFS Noise Floor

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AVDD= AV

DDA

= 3.3V, DVDD= 1.8V, AGND = DGND = 0, internal reference, INP and INN driven differentially, CLKP and CLKN driven

differentially, C

L

= 5pF at digital outputs (D0–D15, DOR), CL= 15pF for DAV, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.

Typical values are at T

A

= +25°C, unless otherwise noted.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVDD, AV

DDA

to AGND ........................................ -0.3V to +3.6V

DV

DD

to DGND..................................................... -0.3V to +2.4V

AGND to DGND.................................................... -0.3V to +0.3V

INP, INN, CLKP, CLKN, REFP, REFN,

REFIN, REFOUT to AGND....................-0.3V to (AV

DD

+ 0.3V)

D0–D15, DAV, DOR to GND....................-0.3V to (DV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

56-Pin Thin QFN-EP

(derate 47.6mW/°C above +70°C).........................3809.5mW

Operating Temperature Range ..........................-40°C to +85°C

Thermal Resistance θ

JA

..................................................21°C/W

Thermal Resistance θ

JC

.................................................0.6°C/W

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

DC ACCURACY

Resolution N 16 Bits

Offset Error V

Gain Error GE -3.5 +3.5 %FS

ANALOG INPUTS (INP, INN)

Input Voltage Range V

Common-Mode Voltage V

Differential Input Resistance R

Differential Input Capacitance C

Full-Power Analog Bandwidth BW

REFERENCE INPUT/OUTPUT (REFIN, REFOUT)

Reference Input Voltage Range REFIN

Reference Output Voltage REFOUT 1.28 V

DYNAMIC SPECIFICATIONS (f

Thermal Plus Quantization Noise
Floor

Signal-to-Noise Ratio
(First 4 Harmonics Excluded)
(Note 2)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

OS

DIFF

CM

IN

IN

-3dB

= 100Msps)

CLK

NF A

SNR

Fully differential input, VIN = V

Internally self-biased 2.4 V

-3dB rolloff for FS Input 600 MHz

< -35dBFS -82 dBFS

IN

fIN = 10MHz, AIN = -2dBFS 79.4

fIN = 70MHz, AIN = -2dBFS, TA = +25°C 77.5 79

fIN = 70MHz, AIN = -2dBFS 75.3 79

fIN = 105MHz, AIN = -2dBFS 78.3

fIN = 130MHz, AIN = -2dBFS 77.5

= 168MHz, AIN = -2dBFS 76.6

f

IN

- V

INP

01020mV

INN

2.56 V

10

±20%

7pF

1.28

±10%

P-P

kΩ

V

dB

MAX19588

High-Dynamic-Range, 16-Bit,

100Msps ADC with -82dBFS Noise Floor

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= AV

DDA

= 3.3V, DVDD= 1.8V, AGND = DGND = 0, internal reference, INP and INN driven differentially, CLKP and CLKN driven

differentially, C

L

= 5pF at digital outputs (D0–D15, DOR), CL= 15pF for DAV, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.

Typical values are at T

A

= +25°C, unless otherwise noted.) (Note 1)

Signal-to-Noise Plus Distortion
(Note 2)

Spurious-Free Dynamic Range
(Worst Harmonic, 2nd and 3rd)

Spurious-Free Dynamic Range
(Worst Harmonic, 4th and Higher)
(Note 2)

Second-Order Harmonic
Distortion

Third-Order Harmonic Distortion HD3

Third-Order Intermodulation
Distortion

Two-Tone SFDR TTSFDR

CONVERSION RATE

Maximum Conversion Rate f

Minimum Conversion Rate f

Aperture Jitter t

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

fIN = 10MHz, AIN = -2dBFS 79

fIN = 70MHz, AIN = -2dBFS, TA = +25°C 75 77.1

SINAD

SFDR1

SFDR2

HD2

IM3

CLKMAX

CLKMIN

fIN = 70MHz, AIN = -2dBFS 73.5 77.1

fIN = 105MHz, AIN = -2dBFS 77.1

fIN = 130MHz, AIN = -2dBFS 75.8

f

= 168MHz, AIN = -2dBFS 70.8

IN

fIN = 10MHz, AIN = -2dBFS 93.2

fIN = 70MHz, AIN = -2dBFS, TA = +25°C 79.6 82.1
fIN = 70MHz, AIN = -2dBFS 79.3 82.1

fIN = 105MHz, AIN = -2dBFS 86.6

fIN = 130MHz, AIN = -2dBFS 82.3

f

= 168MHz, AIN = -2dBFS 75.4

IN

fIN = 10MHz, AIN = -2dBFS 102.5

fIN = 70MHz, AIN = -2dBFS, TA = +25°C 90.4 97.7
fIN = 70MHz, AIN = -2dBFS 85 97.7
fIN = 105MHz, AIN = -2dBFS 94.2

fIN = 130MHz, AIN = -2dBFS 94.1

= 168MHz, AIN = -2dBFS 91.5

f

IN

fIN = 10MHz, AIN = -2dBFS -94.3

fIN = 70MHz, AIN = -2dBFS, TA = +25°C -93 -83
fIN = 70MHz, AIN = -2dBFS -93 -78.3
fIN = 105MHz, AIN = -2dBFS -88

fIN = 130MHz, AIN = -2dBFS -82.3

f

= 168MHz, AIN = -2dBFS -77.6

IN

fIN = 10MHz, AIN = -2dBFS -94.3

fIN = 70MHz, AIN = -2dBFS, TA = +25°C -82.1 -79.6
fIN = 70MHz, AIN = -2dBFS -82.1 -79.3
fIN = 105MHz, AIN = -2dBFS -87.4

fIN = 130MHz, AIN = -2dBFS -92.5

f

= 168MHz, AIN = -2dBFS -75.4

IN

f

= 65.1MHz, A

IN1

f

= 70.1MHz, A

IN2

f

= 65.1MHz, f

IN1

< A

< -10dBFS

IN

J

= -8dBFS

IN1

= -8dBFS

IN2

= 70.1MHz, -100dBFS

IN2

100 MHz

-87.7 dBc

98 dBFS

20 MHz

85 fs

dB

dBc

dBc

dBc

dBc

RMS

MAX19588

High-Dynamic-Range, 16-Bit,
100Msps ADC with -82dBFS Noise Floor

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVDD= AV

DDA

= 3.3V, DVDD= 1.8V, AGND = DGND = 0, internal reference, INP and INN driven differentially, CLKP and CLKN driven

differentially, C

L

= 5pF at digital outputs (D0–D15, DOR), CL= 15pF for DAV, f

CLK

= 100MHz, TA= T

MIN

to T

MAX

, unless otherwise noted.

Typical values are at T

A

= +25°C, unless otherwise noted.) (Note 1)

Note 1: TA≥ +25°C guaranteed by production test, TA< +25°C guaranteed by design and characterization. Typical values are at TA=

+25°C.

Note 2: AC parameter measured in a 32,768-point FFT record, where the first 2 bins of the FFT and 2 bins on either side of the carrier

are excluded. For SNR and SINAD measurements, bins dominated by production test system noise are excluded.

Note 3: Parameter guaranteed by design and characterization.

CLOCK INPUTS (CLKP, CLKN)

Differential Input Swing V

Common-Mode Voltage V

Differential Input Resistance R

Differential Input Capacitance C

CMOS-COMPATIBLE DIGITAL OUTPUTS (D0–D15, DOR, DAV)

Digital Output High Voltage V

Digital Output Low Voltage V

TIMING SPECIFICATIONS (Figures 4, 5), CL = 7.5pF (D0–D15, DOR); CL = 35pF (DAV)

CLKP - CLKN High t

CLKP - CLKN Low t

Effective Aperture Delay t

Output Data Delay t

Data Valid Delay t

Pipeline Latency t

CLKP Rising Edge to DATA Not
Valid

CLKP Rising Edge to DATA
Guaranteed Valid

DATA Setup Time Before Rising
DAV

DATA Hold Time After Rising
DAV

POWER SUPPLIES

Analog Power-Supply Voltage

Digital Output Power-Supply
Voltage

Analog Power-Supply Current

Digital Output Power-Supply
Current

Power Dissipation P

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DIFFCLK

CMCLK

INCLK

INCLK

OH

OL

CLKP

CLKN

AD

DAT

DAV

LATENCY

t

DNV

t

DGV

t

t

H

AV
A

VDDA

DV

I

AVDD

I

AVDDA

I

DVDD

DISS

Fully differential inputs

Self-biased 1.6 V

DV

I

I

= 200µA

SOURCE

= 200µA 0.2 V

SINK

DD

0.2

(Note 3) 4 ns

(Note 3) 4 ns

(Note 3) 2.5 4 5.2 ns

(Note 3) 1.1 ns

(Note 3) 7.5 ns

Clock duty cycle = 50% (Note 3) 2 ns

S

Clock duty cycle = 50% (Note 3) 2.5 ns

,

DD

DD

3.13 3.3 3.46 V

1.7 1.8 1.9 V

+

1.0 to

5.0

V

P-P

10 kΩ

3pF

­V

-300 ps

3.4 ns

7

Clock

Cycles

369 450 mA

31 42 mA

1275 1561 mW

MAX19588

High-Dynamic-Range, 16-Bit,

100Msps ADC with -82dBFS Noise Floor

_______________________________________________________________________________________

5

Typical Operating Characteristics

(AVDD= AV

DDA =

3.3V, DVDD= 1.8V, INP and INN driven differentially, internal reference, CLKP and CLKN driven differentially, CL=

7.5pF at digital outputs (D0–D15, DOR), C

L

= 35pF for DAV, f

CLK

= 100MHz, TA= +25°C. Unless otherwise noted, all AC data based

on 32k-point FFT records.)

FFT PLOT

(524,288-POINT DATA RECORD)

0

f

= 100MHz

CLK

= 70.164MHz

f

IN

-20
= -1.94dBFS

A

IN

-40

-60

-80

AMPLITUDE (dBFS)

-100

-120

-140

3

0105 152025 35 4530 40

ANALOG INPUT FREQUENCY (MHz)

2

SFDR1/SFDR2 vs. ANALOG INPUT FREQUENCY

= 100MHz, AIN = -2dBFS)

(f

110

105

100

95

90

85

SFDR1/SFDR2 (dBc)

80

75

70

CLK

SFDR2

SFDR1

0 40608020 100 120 140 160 180

fIN (MHz)

0

f

CLK

f

IN

-20
A

MAX19588 toc01

IN

-40

-60

-80

AMPLITUDE (dBFS)

-100

-120

-140
0105 152025 35 45

HD2/HD3 vs. ANALOG INPUT FREQUENCY

-70

MAX19588toc04

-80

-90

-100

HD2/HD3 (dBc)

-110

-120
0 40608020 100 120 140 160 180

(524,288-POINT DATA RECORD)

= 100MHz

= 130.001MHz

= -1.98dBFS

(f

FFT PLOT

3

30 40

ANALOG INPUT FREQUENCY (MHz)

= 100MHz, AIN = -2dBFS)

CLK

HD3

HD2

fIN (MHz)

SNR/SINAD vs. ANALOG INPUT FREQUENCY

82

80

MAX19588 toc02

78

76

MAX19588toc05

74

SNR/SINAD (dB)

72

70

68

04020 60 80 100 120 140 160 180

90

80

70

60

50

40

SNR (dB, dBFS)

30

20

10

0

-80 -60 -50 -40-70 -30 -20 -10 0

2

= 100MHz, AIN = -2dBFS)

(f

CLK

SNR

SINAD

fIN (MHz)

SNR vs. ANALOG INPUT AMPLITUDE

= 100MHz, fIN = 10MHz)

(f

CLK

SNR (dBFS)

SNR (dB)

ANALOG INPUT AMPLITUDE (dBFS)

MAX19588 toc03

MAX19588toc06

SFDR1 vs. ANALOG INPUT AMPLITUDE

= 100MHz, fIN = 10MHz)

(f

120

110

100

90

80

70

SFDR1 (dBc, dBFS)

60

50

40

30

CLK

SFDR1 (dBFS)

SFDR1 (dBc)

SFDR = 90dB

REFERENCE LINE

-80 -60 -50 -40-70 -30 -20 -10 0
ANALOG INPUT AMPLITUDE (dBFS)

MAX19588toc07

SFDR2 (dBc, dBFS)

SFDR2 vs. ANALOG INPUT AMPLITUDE

= 100MHz, fIN = 10MHz)

(f

120
110
100

90
80
70
60
50
40
30
20
10

CLK

SFDR2 (dBFS)

SFDR2 (dBc)

SFDR = 90dB
REFERENCE LINE

0

-80 -60 -50 -40-70 -30 -20 -10 0
ANALOG INPUT AMPLITUDE (dBFS)

MAX19588toc08

SNR vs. ANALOG INPUT AMPLITUDE

= 100MHz, fIN = 70MHz)

(f

90

80

70

60

50

40

SNR (dB, dBFS)

30

20

10

CLK

SNR (dBFS)

SNR (dB)

0

-80 -60 -50 -40-70 -30 -20 -10 0
ANALOG INPUT AMPLITUDE (dBFS)

MAX19588toc09

Typical Operating Characteristics (continued)

(AVDD= AV

DDA =

3.3V, DVDD= 1.8V, INP and INN driven differentially, internal reference, CLKP and CLKN driven differentially, CL=

7.5pF at digital outputs (D0–D15, DOR), C

L

= 35pF for DAV, f

CLK

= 100MHz, TA= +25°C. Unless otherwise noted, all AC data based

on 32k-point FFT records.)

70

80

95

75

85

100

90

105

20 40 50 6030 70 80 90 100 110

SFDR1/SFDR2 vs. SAMPLING FREQUENCY

(f

IN

= 70MHz, AIN = -2dBFS)

MAX19588toc16

f

CLK

(MHz)

SFDR/SFDR2 (dB)

SFDR2

SFDR1

-110

-100

-90

-105

-95

-70

20 40 50 6030 70 80 90 100 110

HD2/HD3 vs. SAMPLING FREQUENCY

(f

IN

= 70MHz, AIN = -2dBFS)

MAX19588toc17

f

CLK

(MHz)

HD2/HD3 (dBc)

-80

-85

-75

HD3

HD2

72

74

76

82

-40 -15 10 35 60 85

SNR/SINAD vs. TEMPERATURE

(f

CLK

= 100MHz, fIN = 10.1MHz, AIN = -2dBFS)

MAX19588toc18

TEMPERATURE (°C)

SNR/SINAD (dB)

78

80

SNR

SINAD

MAX19588

High-Dynamic-Range, 16-Bit,
100Msps ADC with -82dBFS Noise Floor

6 _______________________________________________________________________________________

SFDR1 vs. ANALOG INPUT AMPLITUDE

120

110

100

90
80
70
60
50

SFDR1 (dBc, dBFS)

40
30
20
10

0

-80 -60 -50 -40-70 -30 -20 -10 0

= 100MHz, fIN = 70MHz)

(f

CLK

SFDR1 (dBFS)

SFDR1 (dBc)

SFDR = 90dB

REFERENCE LINE

ANALOG INPUT AMPLITUDE (dBFS)

SFDR2 vs. ANALOG INPUT AMPLITUDE

120
110
100

MAX19588toc10

90
80
70
60
50
40

SFDR2 (dBc, dBFS)

30
20
10

0

-80 -60 -50 -40-70 -30 -20 -10 0

SNR/SINAD vs. SAMPLING FREQUENCY

= 100MHz, fIN = 70MHz)

(f

CLK

SFDR2 (dBFS)

SFDR2 (dBc)

SFDR = 90dB

REFERENCE LINE

ANALOG INPUT AMPLITUDE (dBFS)

MAX19588toc11

81

80

79

78

77

76

75

SNR/SINAD (dB)

74

73

72

71

20 40 50 6030 70 80 90 100 110

= 10MHz, AIN = -2dBFS)

(f

IN

SNR

SINAD

f

(MHz)

CLK

MAX19588toc12

SFDR1/SFDR2 vs. SAMPLING FREQUENCY

= 10MHz, AIN = -2dBFS)

(f

110

105

100

95

90

85

SFDR1/SFDR2 (dBc)

80

75

70

IN

SFDR2

20 30 40 50 60 70 80 90 100 110

HD2/HD3 vs. SAMPLING FREQUENCY

= 10MHz, AIN = -2dBFS)

(f

-70

-75

MAX19588toc13

-80

-85

-90

-95

SFDR1

f

(MHz)

CLK

-100

HD2/HD3 (dBc)

-105

-110

-115

-120

IN

HD3

HD2

20 30 40 50 60 70 80 90 100 110

f

(MHz)

CLK

MAX19588toc14

SNR/SINAD vs. SAMPLING FREQUENCY

= 70MHz, AIN = -2dBFS)

(f

82

80

78

76

74

SNR/SINAD (dB)

72

70

68

IN

SNR

SINAD

20 30 40 50 60 70 80 90 100 110

f

(MHz)

CLK

MAX19588toc15