MAXIM MAX1954A Technical data

General Description

The MAX1954A synchronous current-mode, pulse­width modulation (PWM) buck controller is pin compati­ble with the popular MAX1954 and is suitable for
applications where cost and size are critical.

The MAX1954A operates from an input voltage range of

3.0V to 13.2V, independent of the IC supply. The output
voltage is adjustable down to 0.8V. The IC operates at
a fixed 300kHz switching frequency and provides up to
25A of output current with efficiency up to 95%. This
controller has excellent transient response resulting in
smaller output capacitance.

The MAX1954A features foldback current limiting that
greatly reduces input current and component power
dissipation during output overload or short-circuit
conditions.

The compensation and shutdown control (COMP) input,
in addition to providing compensation to the error
amplifier, can be pulled low to shut down the converter.
An input undervoltage lockout is provided to ensure
proper operation during power sags to prevent the
external power MOSFETs from overheating. Internal
digital soft-start is included to reduce inrush current
and save an external capacitor.

The MAX1954A is available in a tiny 10-pin µMAX

®

package to minimize PC board space.

Applications

Printers and Scanners

Graphic Cards and Video Cards

PCs and Servers

Microprocessor Cores

Low-Voltage Distributed Power

Telecom/Networks

Features

♦ Current-Mode Controller

♦ Fixed-Frequency PWM

♦ Foldback Current Limit
♦ Output Down to 0.8V with ±1% FB Accuracy

♦ 3.0V to 13.2V Input Voltage

♦ 300kHz Switching Frequency

♦ 25A Output-Current Capability

♦ 93% Efficiency

♦ All-N-Channel-MOSFET Design for Low Cost

♦ No Current-Sense Resistor Needed

♦ Internal Digital Soft-Start

♦ Small 10-Pin µMAX Package

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

________________________________________________________________ Maxim Integrated Products 1

Pin Configuration

19-3154; Rev 1; 5/05

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

EVALUATION KIT

AVAILABLE

µMAX is a registered trademark of Maxim Integrated Products, Inc.

+Denotes lead-free package.

PART TEMP RANGE PIN-PACKAGE

MAX1954AEUB -40°C to +85°C 10 µMAX
MAX1954AEUB+ -40°C to +85°C 10 µMAX

TOP VIEW

HSD

COMP

1

2

MAX1954A

3

FB

4

5

µMAX

10

BST

9

LX

8

DH

7

PGNDGND

DLIN

6

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

IN, FB to GND...........................................................-0.3V to +6V

LX to BST..................................................................-6V to +0.3V

BST to GND ............................................................-0.3V to +20V

DH to LX................................................... -0.3V to (V

BST

+ 0.3V)

DL, COMP to GND.......................................-0.3V to (V

IN

+ 0.3V)

HSD to GND..............................................................-0.3V to 14V

PGND to GND .......................................................-0.3V to +0.3V

Continuous Power Dissipation (T

A

= +70°C)

10-Pin µMAX (derate 5.6mW/°C above +70°C) ...........444mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range............................+65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

ELECTRICAL CHARACTERISTICS

(V

IN

= 5V, V

BST

- V

LX

= 5V, TA= 0°C to +85°C, unless otherwise noted.)

PARAMETER CONDITIONS

UNITS

GENERAL

Operating Input Voltage Range

3.0 5.5 V

HSD Voltage Range (Note 1) 3.0

V

Quiescent Supply Current V

FB

= 1.5V 1 2

mA

Standby Supply Current

V

IN

= V

BST

= 5.5V, V

HSD

= 13.2V, LX = unconnected,

COMP = GND

2

mA

Undervoltage-Lockout Trip Level

Falling V

IN

, 50mV (typ) hysteresis 2.5 2.7 2.9 V

DC-DC CONTROLLER
Output-Voltage Adjust Range

(V

OUT

)

Maximum output voltage depends on external components

and maximum duty cycle

0.8 V

ERROR AMPLIFIER
FB Regulation Voltage

%

Transconductance 70

µS

Voltage Gain

V/ V

FB Input Leakage Current V

FB

= 0.9V 50

NA

FB Input Common-Mode Range

V

COMP Output-Voltage Swing

V

Current-Sense Amplifier

Voltage Gain

3.5

V / V

V

FB

= 0.8V

Current-Limit Threshold V

PGND

- V

LX

V

FB

= 0V 21 36 51

mV

OSCILLATOR
Switching Frequency MAX1954A

kHz

Maximum Duty Cycle Measured at DH 89 91 93 %
Minimum Duty Cycle V

COMP

= 1.25V, LX = GND, V

BST

= V

IN

= 3.3V 2.5 3 %

MIN TYP MAX

13.2

-1.0 +0.8 +1.0
110 160
200

500

-0.1

0.80

3.15

+1.5

2.36

3.85

110 135 145

240 300 360

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(V

IN

= 5V, V

BST

- V

LX

= 5V, TA= 0°C to +85°C, unless otherwise noted.)

PARAMETER CONDITIONS

MIN

TYP

MAX

UNITS

SOFT-START
Soft-Start Period 3.4 ms
Soft-Start Levels

mV
FET DRIVERS
DH, DL Output Low Voltage I

SINK

= 10mA 0.1 V

DH, DL Output High Voltage I

SOURCE

= 10mA

V

IN

- 0.1V or

V

DH Pullup/Pulldown,
DL Pullup On-Resistance

1.5 3 Ω

DL Pulldown On-Resistance 1 2 Ω
LX, BST, HSD Leakage Current V

BST

= 18.7V, VLX = 13.2V, VIN = 5.5V, V

HSD

= 13.2V 30 µA

THERMAL PROTECTION
Thermal Shutdown Rising temperature, 15°C hysteresis

°C
SHUTDOWN CONTROL
COMP Logic-Level Low 3V < V

IN

< 5.5V

V

COMP Logic-Level High 3V < V

IN

< 5.5V 0.8 V

COMP Pullup Current

µA

ELECTRICAL CHARACTERISTICS

(V

IN

= 5V, V

BST

- V

LX

= 5V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)

PARAMETER CONDITIONS

UNITS

GENERAL

3.0 5.5 V

HSD Voltage Range (Note 1) 3.0

V

Quiescent Supply Current V

FB

= 1.5V 2

mA

Standby Supply Current

V

IN

= V

BST

= 5.5V, V

HSD

= 13.2V, LX = unconnected,

COMP = GND

2

mA

Rising V

IN

3% (typ) hysteresis

V

DC-DC CONTROLLER
Output-Voltage Adjust Range

(V

OUT

)

0.8

V

ERROR AMPLIFIER
FB Regulation Voltage

%

Transconductance 70

µS

FB Input Leakage Current V

FB

= 0.9V

NA

V

COMP Output-Voltage Swing 0.8 2.2 V

V

BS T

- 0.1V

12.5

+160

0.25

100

MIN

MAX

Operating Input Voltage Range

13.2

Undervoltage Lockout Trip Level

FB Input Common-Mode Range

2.50

2.93

0.9 x V

IN

-2.5

-0.1

+1.0

160
500

+1.5

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

4 _______________________________________________________________________________________

Note 1: HSD and IN are externally connected for applications where HSD < 5.5V.
Note 2: Specifications to -40°C are guaranteed by design and not production tested.

ELECTRICAL CHARACTERISTICS (continued)

(V

IN

= 5V, V

BST

- V

LX

= 5V, TA= -40°C to +85°C, unless otherwise noted.) (Note 2)

PARAMETER CONDITIONS

UNITS

Current-Sense Amplifier

Voltage Gain

V/V

V

FB

= 0.8V

Current-Limit Threshold V

PGND

- V

LX

, MAX1954A

V

FB

= 0V 21 51

mV

OSCILLATOR
Switching Frequency

kHz

Maximum Duty Cycle Measured at DH 89 93 %
Minimum Duty Cycle V

COMP

= 1.25V, LX = GND, V

BST

= V

IN

= 3.3V 3 %

FET DRIVERS
DH, DL Output Low Voltage I

SINK

= 10mA 0.1 V

DH, DL Output High Voltage I

SOURCE

= 10mA

V

IN

- 0.1V or

V

DH Pullup/Pulldown,
DL Pullup On-Resistance

3 Ω

DL Pulldown On-Resistance 2 Ω
LX, BST, HSD Leakage Current V

BST

= 18.7V, VLX = 13.2V, VIN = 5.5V, V

HSD

= 13.2V 30 µA

SHUTDOWN CONTROL
COMP Logic-Level Low 3V < V

IN

< 5.5V

V

COMP Logic-Level High 3V < V

IN

< 5.5V 0.8 V

COMP Pullup Current

µA

MIN

MAX

V

3.15

110

240

BS T

- 0.1V

3.85

145

360

0.25

100

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

_______________________________________________________________________________________ 5

Typical Operating Characteristics

(TA = +25°C, unless otherwise noted.)

EFFICIENCY

vs. LOAD CURRENT

MAX1954A toc01

LOAD CURRENT (A)

EFFICIENCY (%)

100

40

50

60

70

80

90

0.1 1 10

V

OUT

= 2.5V

VIN = V

HSD

= 5V

V

OUT

= 1.5V

2.60

2.55

2.50

2.45

2.40
021 345

OUTPUT VOLTAGE

vs. LOAD CURRENT

MAX1954A toc02

LOAD CURRENT (A)

OUTPUT VOLTAGE (V)

VIN = V

HSD

= 5V

-70

-30

-50

10

-10

50

30

70

3.0 4.03.5 4.5 5.0 5.5

OUTPUT VOLTAGE CHANGE

vs. INPUT VOLTAGE

MAX1954A toc03

INPUT VOLTAGE (V)

CHANGE IN OUTPUT VOLTAGE (mV)

V

OUT

= 2.5V

V

OUT

= 0.8V

VIN = V

HSD

I

OUT

= 5A

0.81

0.81

0.80

0.80

0.79

10.8 12.011.4 12.6 13.2

OUTPUT VOLTAGE

vs. INPUT VOLTAGE

MAX1954A toc04

INPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

VIN = V

HSD

I

OUT

= 5A

250

270

310

290

330

350

3.0 4.03.5 4.5 5.0 5.5

OSCILLATOR FREQUENCY

vs. INPUT VOLTAGE

MAX1954A toc05

INPUT VOLTAGE (V)

OSCILLATOR FREQUENCY (kHz)

TA = -40°C

TA = +85°C

TA = +25°C

VIN = V

HSD

LOAD TRANSIENT

MAX1954A toc06

40µs/div

100mV/div

V

OUT

AC-COUPLED

I

OUT

5A/µs

5A

500mA

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(TA = +25°C, unless otherwise noted.)

LOAD TRANSIENT

MAX1954A toc07

40µs/div

100mV/div

V

OUT

AC-COUPLED

I

OUT

5A/µs

5A

2.5A

NO-LOAD SWITCHING WAVEFORMS

MAX1954A toc08

2µs/div

2A/div

I

L

DH

LX

DL

5V/div

10V/div

5V/div

HEAVY-LOAD SWITCHING WAVEFORMS

I

LOAD

= 5A

MAX1954A toc09

2µs/div

2A/div

I

L

DH

LX

DL

5V/div

10V/div

5V/div

SHORT CIRCUIT AND RECOVERY

MAX1954A toc11

200µs/div

1V/div

V

OUT

V

IN

I

LX

5A/div

2V/div

I

IN

2A/div

POWER-UP/POWER-DOWN WAVEFORMS

MAX1954A toc10

4ms/div

5V/div

V

IN

V

OUT

I

LX

5A/div

2V/div

STARTUP INTO PREBIASED OUTPUT

(OUTPUT PREBIASED AT ~1.7V)

MAX1954A toc12

2ms/div

1V/div

V

OUT

V

IN

DL

5V/div

5V/div

DH

5V/div

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

_______________________________________________________________________________________ 7

Detailed Description

The MAX1954A single-output, current-mode, PWM, step­down DC-DC controller features foldback current limit
and switches at 300kHz for high efficiency. The
MAX1954A is designed to drive a pair of external N­channel power MOSFETs in a synchronous buck topolo­gy to improve efficiency and cost compared with a
P-channel power-MOSFET topology. The on-resistance
of the low-side MOSFET is used for short-circuit current­limit sensing, while the high-side MOSFET’s on-resis­tance is used for current-mode feedback, thus
eliminating the need for current-sense resistors. The
short-circuit current limit is fixed at 135mV. The foldback
current scheme reduces the input current during short­circuit and severe-overload conditions. The MAX1954A
is configured with a high-side drain input (HSD) allowing
an extended input voltage range of 3V to 13.2V that is
independent of the IC input supply (Figure 1).

DC-DC Converter Control Architecture

The MAX1954A step-down converter uses a PWM, cur­rent-mode control scheme. An internal transconductance
amplifier establishes an integrated error voltage. An
open-loop comparator compares the integrated voltage­feedback signal against the amplified current-sense sig­nal plus the slope compensation ramp, which is summed
into the main PWM comparator to preserve inner-loop sta­bility and eliminate inductor staircasing. At each rising
edge of the internal clock, the high-side MOSFET turns on
until the PWM comparator trips or the maximum duty
cycle is reached. During this on-time, current ramps up
through the inductor, storing energy in a magnetic field
and sourcing current to the output. The current-mode
feedback system regulates the peak inductor current as a
function of the output-voltage error signal. The circuit acts
as a switch-mode transconductance amplifier because
the average inductor current is close to the peak inductor
current (assuming the inductor is large enough to provide
a reasonably small ripple current). This pushes the output
inductance-capacitance filter pole normally found in a
voltage-mode PWM to a higher frequency.

Pin Description

PIN NAME FUNCTION

1 HSD

High-Side Drain Current-Sense Input. HSD senses the voltage at the drain of the high-side, N-channel MOSFET.

Connect to the high-side MOSFET drain using a Kelvin connection.

Compensation and Shutdown Control Pin. Connect appropriate RC networks to compensate the control loop.

2 COMP

3 FB

Pull to GND to shut down the IC. See the Compensation Design section for instructions on calculating the RC
values.

Feedback Input. Regulates at V
GND to set the output voltage.

= 0.8V. Connect FB to the center tap of a resistor-divider from the output to

FB

4 GND Ground

5 IN

6 DL

IC Supply Voltage. Provides power for the IC. Connect to a 3V to 5.5V power supply. Bypass to GND with a

0.22µF ceramic capacitor and to PGND with a 1µF ceramic capacitor.

Low-Side Gate-Drive Output. Drives the synchronous-rectifier MOSFET. Swings from 0 to V
shutdown and UVLO.

7 PGND Power Ground

8 DH

9 LX

10 BST

High-Side Gate-Drive Output. Drives the high-side N-channel MOSFET. DH is a floating driver output that swings

to V

from V

LX

. DH is low in shutdown and UVLO.

BST

Controller Current-Sense Input. Connect LX to the junction of the MOSFETs and inductor. LX is the reference

point for the current limit.

High-Side MOSFET Supply Input. Connect a 0.1µF ceramic capacitor from BST to LX to supply the necessary
gate drive for the high-side N-channel MOSFET.

. DL is low in

IN

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

8 _______________________________________________________________________________________

During the second half of the cycle, the high-side
MOSFET turns off and the low-side MOSFET turns on. The
inductor releases the stored energy as the current ramps
down, providing current to the output. The output capaci­tor stores charge when the inductor current exceeds the
required load current and discharges when the inductor
current is lower, smoothing the voltage across the load.
Under overload conditions, when the inductor current
exceeds the current limit (see the Current-Limit Circuit
section), the high-side MOSFET is not turned on at the ris­ing clock edge and the low-side MOSFET remains on to
let the inductor current ramp down.

The MAX1954A operates in a forced-PWM mode; there­fore, the controller maintains a constant switching fre­quency, regardless of load, to allow for easier post­filtering of the switching noise.

Current-Sense Amplifier

The current-sense circuit amplifies the current-sense
voltage (the high-side MOSFET’s on-resistance
(R

DS(ON)

) multiplied by the inductor current). This ampli­fied current-sense signal and the internal slope-compen­sation signal are summed (V

SUM

) together and fed into
the PWM comparator’s inverting input. The PWM com­parator shuts off the high-side MOSFET when V

SUM

exceeds the integrated feedback voltage (V

COMP

).

Functional Diagram

IN

COMP

FB

SHUTDOWN

COMPARATOR

0.5V

2.36V
CLAMP

ERROR

AMPLIFIER

REFERENCE

AND

SOFT-START

DIGITAL-TO-ANALOG

CONVERTER

THERMAL

LIMIT

SLOPE

COMPENSATION

CLOCK

PWM

CONTROL

CIRCUITRY

UVLO

SHORT-CIRCUIT
CURRENT-LIMIT

CIRCUITRY

CURRENT-

SENSE

CIRCUITRY

CURRENT-LIMIT

COMPARATOR

MAX1954A

HSD

BST

DH

LX

IN

DL

PGND

FOLDBACK CURRENT-

LIMIT CIRCUITRY

GND

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

_______________________________________________________________________________________ 9

Place the high-side MOSFET as close as possible to
the controller and connect HSD and LX to the MOSFET
using Kelvin-sense connections to guarantee current­sense accuracy and improve stability.

Current-Limit Circuit

The current-limit circuit employs a lossless, foldback,
valley current-limiting algorithm that uses the low-side
MOSFET’s on-resistance as the sensing element. Once

the high-side MOSFET turns off, the voltage across the
low-side MOSFET is monitored. If the voltage across the
low-side MOSFET (R

DS(ON)

x I

INDUCTOR

) does not
exceed the current limit, the high-side MOSFET turns on
normally. In this condition, the output drops smoothly out
of regulation. If the voltage across the low-side MOSFET
exceeds the current-limit threshold at the beginning of a
new oscillator cycle, the low-side MOSFET remains on
and the high-side MOSFET remains off.

Typical Application Circuits

Figure 1. MAX1954A Typical Application Circuit

Figure 2. MAX1954A Circuit Capable of 20A Output

V

3V TO 5.5V

V

HSD

5.5V TO 13.2V

C

C

IN

C1 C2

HSD

R

C

COMP

C

F

GND

V

IN

3V TO 5.5V

0.22µF

C1

C15

HSD

IN

BST

DH

MAX1954A

560pF

R

C

270kΩ

C

C

15pF

COMP

C

F

GND

LX

DL

PGND

FB

IN

MAX1954A

D1

N1

C7

0.1µF

N3 N4

BST

PGND

C3

D1

N1

DH

C4

LX

DL

FB

N2

R3

C14

R3

C6

L1

0.8µH

L1

C2–C6

10µF

10kΩ

8.06kΩ

V

OUT

C8–C13

270µF

1.8V

V

OUT

+1.8V AT 20A

R1

R2

R1

R2

C5

V

HSD

10.8V TO 13.2V

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

10 ______________________________________________________________________________________

When the output is shorted, the foldback current limit
reduces the current-limit threshold linearly to 20% of
the nominal value to reduce the power dissipation of
components and the input current. Once the voltage
across the low-side MOSFET drops below the current­limit threshold, the high-side MOSFET is turned on at
the next clock cycle. During severe-overload and short­circuit conditions, the frequency of the MAX1954A
appears to decrease because the on-time of the
low-side MOSFET extends beyond a clock cycle. The
current-limit threshold is preset to 135mV.

In addition to the valley current limit, the MAX1954A
also features a cycle-by-cycle peak-current clamp that
limits the voltage across the high-side MOSFET by ter­minating its on-time. This, together with the valley fold­back current limit, provides a very robust overload and
short-circuit protection.

Synchronous-Rectifier Driver (DL)

Synchronous rectification reduces conduction losses in
the rectifier by replacing the normal Schottky catch
diode with a low-resistance MOSFET switch. The
MAX1954A also uses the synchronous rectifier to ensure
proper startup of the boost gate-driver circuit and to
provide the current-limit signal. The DL low-side wave­form is always the complement of the DH high-side
drive waveform (with controlled dead time to prevent
crossconduction or shoot-through). A dead-time circuit
monitors the DL output and prevents the high-side
MOSFET from turning on until DL is fully off. For the
dead-time circuit to work properly, there must be a low­resistance, low-inductance path from the DL driver to
the MOSFET gate. Otherwise, the sense circuitry in the
MAX1954A interprets the MOSFET gate as off although
gate charge actually remains. Use very short, wide
traces (50 mils to 100 mils wide if the MOSFET is 1in
from the device). The dead time at the other edge (DH
turning off) is also determined through gate sensing.

High-Side Gate-Drive Supply (BST)

Gate-drive voltage for the high-side, N-channel switch
is generated by a flying-capacitor boost circuit (Figure

3). The capacitor between BST and LX is charged from
the VINsupply up to VINminus the diode drop while the
low-side MOSFET is on. When the low-side MOSFET is
switched off, the stored voltage of the capacitor is
stacked above LX to provide the necessary turn-on
voltage (VGS) for the high-side MOSFET. The controller
then closes an internal switch between BST and DH to
turn the high-side MOSFET on.

Undervoltage Lockout (UVLO)

If VINdrops below 2.7V, the MAX1954A assumes that
the supply voltage is too low for proper circuit opera­tion, so the UVLO circuitry inhibits switching and forces
the DL and DH gate drivers low. After V

IN

rises above

2.7V, the controller goes into the startup sequence and
resumes normal operation.

Startup

The MAX1954A begins switching when VINrises above
the UVLO threshold. However, the controller is not
enabled unless five conditions are met:

1) VINexceeds the 2.7V UVLO threshold.

2) The internal reference exceeds 92% of its nominal

value (V

REF

> 1V).

3) The internal bias circuitry powers up.

4) The thermal-overload limit is not exceeded.

5) The feedback voltage is below the regulation

threshold.

If these conditions are met, the step-down controller
enables soft-start and begins switching. The soft-start cir­cuitry gradually ramps up the output voltage until the volt­age at FB is equal to the reference voltage. This controls
the rate of rise of the output voltage and reduces input
surge currents during startup. The soft-start period is
1024 clock cycles (1024 / f

S

). The output voltage is incre­mented through 64 equal steps. The output reaches reg­ulation when soft-start is completed, regardless of output
capacitance and load.

The MAX1954A also has internal circuitry to prevent
discharging of a precharged output capacitor during
soft-start or in UVLO. This feature (monotonic startup)
is needed in applications where the MAX1954A output
is connected in parallel with another power-supply
output, such as redundant-power or standby-power
applications.

Figure 3. DH Boost Circuit

MAX1954A

IN

BST

DH

LX

DL

N

N

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

______________________________________________________________________________________ 11

Table 1. Suggested Components

PART DESIGNATOR

C1

C2

C3

C4 0.1µF, 6.3V X7R ceramic capacitor

C5

C6

C7 —

C8 —

C9–C13 —

Cc

C

F

R1 16.9kΩ ±1% resistor 10kΩ ±1% resistor
R2 8.06kΩ ±1% resistor 8.06kΩ ±1% resistor
R3 2Ω ±5% resistor —

R

C

D1

N1, N2

N3, N4 —

L1

0.22µF, 10V X7R ceramic capacitor
Kemet C0603C224M8RAC

1µF, 6.3V X5R ceramic capacitor
Taiyo Yuden JMK212BJ106MG

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

180µF, 4V SP polymer capacitor
Panasonic EEFUEOG181R

1500pF, 50V X7R ceramic capacitor
TDK C1608X7R1H152K

680pF, 10V X7R ceramic capacitor
Kemet C0402C681M8RAC

—

62kΩ ±5% resistor 270kΩ ±5% resistor

Schottky diode
Central Semiconductor CMPSH1-4

20V, 5A dual MOSFETs
Fairchild FDS6898A

1µH, 3.6A inductor
TOKO 817FY-1R0M

MAX1954A
(FIGURE 1)

20A CIRCUIT

(FIGURE 2)

0.22µF, 10V X7R ceramic capacitor
Kemet C0603C224M8RAC

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

10µF, 16V X5R ceramic capacitor
Taiyo Yuden EMK325BJ106MN

0.1µF, 50V X7R ceramic capacitor
Taiyo Yuden UMK107BJ104KA

270µF, 2V SP polymer capacitor
Panasonic EEFUEOD271R

270µF, 2V SP polymer capacitors
Panasonic EEFUEOD271R

560pF, 10V X7R ceramic capacitor
Kemet C0402C561M8RAC

15pF, 10V C0G ceramic capacitor
Kemet C0402C150K8GAC

Schottky diode
Central Semiconductor CMPSH1-4

30V N-channel MOSFETs
International Rectifier IRF7811

30V N-channel MOSFETs
Siliconix Si4842DY

0.8µH, 27.5A inductor
Sumida CEP125U-0R8

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

12 ______________________________________________________________________________________

Shutdown

The MAX1954A features a low-power shutdown mode.
Use an open-collector, NPN transistor to pull COMP low
and shut down the IC. COMP must be pulled below

0.25V to shut down the MAX1954A. Choose a transistor
with a V

CE(SAT)

below 0.25V. During shutdown, the out­put is high impedance. Shutdown reduces the quies­cent current (IQ) to 220µA (typ). Note that implementing
shutdown in this fashion discharges the output only
until the inductor runs out of energy. Upon recovery,
soft-start is not available. Only the foldback current limit
results in pseudo-soft-start mode.

Thermal-Overload Protection

Thermal-overload protection limits total power dissipa­tion in the MAX1954A. When the junction temperature
exceeds T

J

= +160°C, an internal thermal sensor shuts

down the IC, allowing the IC to cool. The thermal sensor
turns the IC on again after the junction temperature
cools by 15°C, resulting in a pulsed output during con­tinuous thermal-overload conditions.

Design Procedures

Setting the Output Voltage

To set the output voltage for the MAX1954A, connect
FB to the center of an external resistor-divider from the
output to GND (Figures 1 and 2). Select R2 between
8kΩ and 24kΩ, and calculate R1 by:

where VFB= 0.8V. R1 and R2 should be placed as
close as possible to the IC.

Inductor Value

There are several parameters that must be examined
when determining which inductor to use. Input voltage,
output voltage, load current, switching frequency, and
LIR. LIR is the ratio of inductor current ripple to DC load
current. A higher LIR value allows for a smaller induc­tor, but results in higher losses and higher output rip­ple. A good compromise between size and efficiency is
an LIR of 30%. Once all of the parameters are chosen,
the inductor value is determined as follows:

where fS is the switching frequency. Choose a standard
value close to the calculated value. The exact inductor
value is not critical and can be adjusted to make trade­offs among size, cost, and efficiency. Lower inductor val-

ues minimize size and cost, but they also increase the
output ripple and reduce the efficiency due to higher
peak currents. On the other hand, higher inductor values
increase efficiency, but eventually resistive losses, due to
extra turns of wire, exceed the benefit gained from lower
AC levels. Find a low-loss inductor with the lowest possi­ble DC resistance that fits the allotted dimensions. Ferrite
cores are often the best choice. However, powdered iron
is inexpensive and can work well at 300kHz. The chosen
inductor’s saturation current rating must exceed the peak
inductor current determined as:

Setting the Current Limit

The MAX1954A uses a valley current-sense method for
current limiting. The voltage drop across the low-side
MOSFET due to its on-resistance is used to sense the
inductor current. The voltage drop across the low-side
MOSFET at the valley point and at I

LOAD(MAX)

is:

The calculated V

VALLEY

must be less than the minimum

current-limit threshold specified.

Additionally, the high-side MOSFET R

DS(ON)

must meet
the following equation to avoid tripping the internal
peak-current clamp circuit prematurely:

R

DS(ON)

< 0.8V / (3.65 x (I

LOAD(MAX)

x ( 1 + LIR / 2)))

Use the maximum R

DS(ON)

value at the desired maxi­mum operating junction temperature of the MOSFET. A
good general rule is to allow 0.5% additional resistance
for each °C of MOSFET junction-temperature rise.

MOSFET Selection

The MAX1954A drives two external, logic-level, N-chan­nel MOSFETs as the circuit-switch elements. The key
selection parameters are:

1) On-resistance (R

DS(ON)

): the lower, the better.

However, the current-sense signal (RDSx I

PEAK

)

must be greater than 16mV at maximum load.

2) Maximum drain-to-source voltage (V

DSS

): it should
be at least 20% higher than the input supply rail at
the high-side MOSFET’s drain.

3) Gate charges (Qg, Qgd, Qgs): the lower, the better.

For a 3.3V input application, choose a MOSFET with a
rated R

DS(ON)

at VGS= 2.5V. For a 5V input application,

choose the MOSFETs with rated R

DS(ON)

at VGS≤ 4.5V.

For a good compromise between efficiency and cost,

VR I

LIR

I

VALLEY DS ON LOAD MAX LOAD MAX

=× −

⎛

⎝

⎜

⎞

⎠

⎟

×

()

()

() ( )

2

II

LIR

I

PEAK LOAD MAX LOAD MAX

=+

⎛
⎝

⎜

⎞
⎠

⎟

×

() ()

2

L

VVV

V f I LIR

OUT IN OUT

IN S LOAD MAX

=

×−

()

×× ×

()

RR

V

V

OUT

FB

12 1=× −

⎛
⎝

⎜

⎞
⎠

⎟

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

______________________________________________________________________________________ 13

choose the high-side MOSFET (N1) that has conduction
losses equal to switching loss at nominal input voltage
and output current. The selected MOSFETs must have an
R

DS(ON)

that satisfies the current-limit setting condition
above. For N2, ensure that it does not spuriously turn on
due to dV/dt caused by N1 turning on, as this would
result in shoot-through current degrading the efficiency.
MOSFETs with a lower Qgd/Q

gs

ratio have higher immuni-

ty to dV/dt.

For proper thermal-management design, the power dis­sipation must be calculated at the desired maximum
operating junction temperature, T

J(MAX)

. N1 and N2
have different loss components due to the circuit oper­ation. N2 operates as a zero-voltage switch; therefore,
major losses are the channel-conduction loss (P

N2CC

)

and the body-diode conduction loss (P

N2DC

).

where VFis the body-diode forward-voltage drop, tdtis
the dead time between N1 and N2 switching transitions,
fSis the switching frequency, and tdtis 20ns (typ).

N1 operates as a duty-cycle control switch and has the
following major losses: the channel-conduction loss
(P

N1CC

), the VL overlapping switching loss (P

N1SW

),

and the drive loss (P

N1DR

). N1 does not have body­diode conduction loss, because the diode never con­ducts current.

where I

GATE

is the average DH-driver output current

capability determined by:

where R

DS(ON)(N2)

is the high-side MOSFET driver’s

on-resistance (1.5Ω typ) and R

GATE

is the internal gate

resistance of the MOSFET (~2Ω).

where VGS~V

IN.

In addition to the losses above, allow approximately
20% for additional losses due to MOSFET output capac­itances and N2 body-diode reverse-recovery charge
dissipated in N1 that exists, but is not well defined, in
the MOSFET data sheet. Refer to the MOSFET data
sheet for thermal-resistance specification to calculate
the PC board area needed to maintain the desired maxi­mum operating junction temperature with the above cal­culated power dissipations.

To reduce electromagnetic interference (EMI) caused
by switching noise, add a 0.1µF ceramic capacitor from
the high-side switch drain to the low-side switch source
or add resistors in series with DH and DL to slow down
the switching transitions. However, adding series resis­tors increases the power dissipation of the MOSFET, so
be sure this does not overheat the MOSFET.

The minimum load current must exceed the high-side
MOSFET’s maximum leakage-current overtemperature
if fault conditions are expected.

MOSFET Snubber Circuit

Fast-switching transitions cause ringing because of
resonating circuit parasitic inductance and capaci­tance at the switching nodes. This high-frequency ring­ing occurs at LX’s rising and falling transitions and can
interfere with circuit performance and generate EMI. To
dampen this ringing, a series RC snubber circuit is
added across each switch. Below is the procedure for
selecting the value of the series RC circuit:

1) Connect a scope probe to measure the voltage
from LX to GND, and observe the ringing frequen­cy, fR.

2) Find the capacitor value (connected from LX to
GND) that reduces the ringing frequency by half.

The circuit parasitic capacitance (C

PAR

) at LX is then
equal to 1/3rd of the value of the added capacitance
above. The circuit parasitic inductance (L

PAR

) is calculat-

ed by:

The resistor for critical dampening (R

SNUB

) is equal to

2π x fR x L

PAR

. Adjust the resistor value up or down to
tailor the desired damping and the peak voltage excur­sion. The capacitor (C

SNUB

) should be at least two to

four times the value of the C

PAR

to be effective. The

power loss of the snubber circuit (P

RSNUB

) is dissipat-

ed in the resistor R

SNUB

and can be calculated as:

PCVf

RSNUB SNUB IN S

=×

()

×

2

L

fC

PAR

R PAR

=

()

×

1

22π

PQVf

R

RR

NDR g GS

S

GATE

GATE DS ON N12

=× ××

+

()()

I

V

RR

GATE

IN

DS ON N GATE

.

()()

≅×

+

05

2

.

()

() ( )

P

V

V

IR

Use R at T

PVI

QQ

I

f

NCC

OUT

IN

LOAD

DS ON

DS ON J MAX

N SW IN LOAD

gs gd

GATE

S

1

2

1

=

⎛

⎝

⎜

⎞

⎠

⎟

××

=× ×

+

⎛

⎝

⎜
⎜

⎞

⎠

⎟
⎟

×

(

.

() ( )

() ( )

VR I

LIR

I

Use R at T

PIVtf

VALLEY DS ON LOAD MAX LOAD MAX

DS ON J MAX

N DC LOAD F dt S

=× −

⎛

⎝

⎜

⎞

⎠

⎟

×

=× × × ×

()

2

2

2

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

14 ______________________________________________________________________________________

where VINis the input voltage and fSis the switching
frequency. Choose a R

SNUB

power rating that meets
the specific application’s derating rule for the power
dissipation calculated.

Input Capacitor

The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor must meet the ripple current
requirement (I

RMS

) imposed by the switching currents

defined by the following equation:

I

RMS

has a maximum value when the input voltage

equals twice the output voltage (VIN= 2 x V

OUT

); there-

fore, I

RMS(MAX)

= I

LOAD

/ 2. Ceramic capacitors are
recommended due to their low equivalent series resis­tance (ESR) and equivalent series inductance (ESL) at
high frequencies, and their relatively low cost. Choose
a capacitor that exhibits less than 10°C temperature
rise at the maximum operating root-mean-square (RMS)
current for optimum long-term reliability.

Output Capacitor

The key selection parameters for the output capacitor
are the actual capacitance value, ESR, ESL, and the
voltage-rating requirements. These parameters affect
the overall stability, output voltage ripple, and transient
response. The output ripple has three components: vari­ations in the charge stored in the output capacitor, and
the voltage drop across the capacitor’s ESR and ESL
caused by the current into and out of the capacitor. The
equation below estimates the maximum ripple voltage:

The output voltage ripple as a consequence of the ESR,
output capacitance, and ESL are as follows:

where I

P-P

is the peak-to-peak inductor current (see the
Inductor Value section). These equations are suitable
for initial capacitor selection, but final values should be
chosen based on a prototype or evaluation circuit. As a
general rule, a smaller current ripple results in less out­put voltage ripple. Since the inductor ripple current is a
factor of the inductor value and input voltage, the out­put voltage ripple decreases with larger inductance,
and increases with higher input voltages. For the
MAX1954A polymer, tantalum, or aluminum electrolytic
capacitors are recommended. Lower-cost aluminum
electrolytic capacitors with relatively low ESR are avail­able and can be used for the MAX1954A, if the larger
physical size is acceptable. For reliable and safe oper­ation, ensure that the capacitor’s voltage and ripple­current ratings exceed the calculated values.

The devices’ response to a load transient depends on
the selected output capacitors. After a load transient,
the output voltage instantly changes by ESR x ∆I

LOAD

.
Before the controller can respond, the output voltage
deviates further depending on the inductor and output
capacitor values. After a short period of time (see the
Typical Operating Characteristics), the controller
responds by regulating the output voltage back to its
nominal state. The controller response time depends on
its closed-loop bandwidth. With a higher bandwidth, the
response time is faster, thus preventing the output volt­age from deviating further from its regulation value.

Compensation Design

The MAX1954A uses an internal transconductance
error amplifier whose output compensates the control
loop. The external inductor, high-side MOSFET, output
capacitor, compensation resistor, and compensation
capacitors determine the loop stability. The inductor
and output capacitors are chosen based on perfor­mance, size, and cost. Additionally, the compensation
resistor and capacitors are selected to optimize control­loop stability. The component values in Figures 1 and 2
yield stable operation over the given range of input-to­output voltages and load currents. The controller uses a
current-mode control scheme that regulates the output
voltage by forcing the required current through the
external inductor. The MAX1954A uses the voltage
across the high-side MOSFET’s on-resistance
(R

DS(ON)

) to sense the inductor current. Current-mode
control eliminates the double pole in the feedback loop
caused by the inductor and output capacitor, resulting
in a smaller phase shift and requiring less elaborate
error-amplifier compensation. A single-series compen­sation resistor (RC) and compensation capacitor (CC) is
all that is needed to have a stable high-bandwidth loop
in applications where ceramic capacitors are used for

V I ESR

V

I

Cf

V

V

L

ESL

I

VV

fL

V

V

RIPPLE

ESR

PP

RIPPLE C

PP

OUT

S

RIPPLE ESL

IN

PP

IN OUT

S

OUT

IN

()

()

()

=×

=

××

⎛

⎝

⎜

⎞

⎠

⎟

×

=

−
×

⎛

⎝

⎜

⎞

⎠

⎟

×

⎛

⎝

⎜

⎞

⎠

⎟

−

−

=

−

8

VV V V

RIPPLE RIPPLE

ESR

RIPPLE C RIPPLE ESL

=++

()

() ( )

I

IVVV

V

RMS

LOAD OUT IN OUT

IN

=

××−

()

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

______________________________________________________________________________________ 15

output filtering. For other types of capacitors, due to the
higher capacitance and ESR, the frequency of the zero
created by the capacitance and ESR is lower than the
desired closed-loop crossover frequency. Another
compensation capacitor should be added to cancel
this zero.

The basic regulator loop can be thought of as a power
modulator, output feedback divider, and an error ampli­fier. The power modulator has DC gain set by gmcx
R

LOAD

, with a pole and zero pair set by R

LOAD

, the out-

put capacitor (C

OUT

) and its equivalent series resis-

tance (R

ESR

). Below are equations that define the

power modulator:

where R

LOAD

= V

OUT

/ I

OUT(MAX)

, and gmc= 1 / (ACSx

R

DS(ON)

), where ACSis the gain of the current-sense

amplifier and R

DS(ON)

is the on-resistance of the high­side power MOSFET. ACSis 3.5. The frequencies at
which the pole and zero due to the power modulator
occur are determined as follows:

The feedback voltage-divider used has a gain of GFB=
V

FB

/ V

OUT

, where VFBis equal to 0.8V. The transcon-

ductance error amplifier has DC gain, G

EA(DC)

= gmx

RO. The amplifier output resistance (RO) is typically
10MΩ. The CC, RO, and the RCset a dominant pole.
The RCand the CCset a zero. There is an optional pole
set by CFand RCto cancel the output-capacitor ESR
zero if it occurs before crossover frequency (fC):

The fCshould be much higher than the power modula­tor pole f

PMOD

. Also, the crossover frequency should

be less than 1/8th of the switching frequency:

Therefore, the loop-gain equation at the crossover fre­quency is:

When f

zMOD

is greater than fC:

then RCis calculated as:

where g

mEA

= 110µs.

The error-amplifier compensation zero formed by R

C

and CCshould be set at the modulator pole f

pMOD

. C

C

is calculated by:

If f

zMOD

is less than 5 x fC, add a second compensa­tion capacitor, Cf, from COMP to GND to cancel the
ESR zero. Cf is calculated by:

As the load current decreases, the modulator pole also
decreases. However, the modulator gain increases
accordingly and the crossover frequency remains
the same.

When f

zMOD

is less than fC, the power-modulator gain

at fCis:

GG

f

f

MOD fC MOD DC

pMOD

zMOD

() ( )

=×

C

Rf

f

C zMOD

=

××

1

2π

C

RfLC

RfLR

C

LOAD

S

OUT

LOAD

S

C

=

×××

+×

()

×

( )

R

V

gVG

C

OUT

mEA FB MOD fC

=

××

()

G g R and G g R

f

f

EA fC mEA C MOD fC mc LOAD

pMOD

C

() ()

=× =××

GG

V

V

EA fC MOD fC

FB

OUT

() ()

××=1

ff

f

pMOD C

S

<< <

8

f

CRR

f

CR

f

CR

pdEA

COC

zEA

CC

pEA

FC

=

××+

=

××

=

××

1

2

1

2

1

2

π

π

π

()

f

C

RfL

RfL

R

f

CR

pMOD

OUT

LOAD

S

LOAD

S

ESR

zMOD

OUT ESR

=

××

××

+×

+

⎛

⎝

⎜

⎞

⎠

⎟

=

××

1

2

1

2ππ

Gg

RfL
RfL

MOD mc

LOAD

S

LOAD

S

=×

××
+×

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

16 ______________________________________________________________________________________

The error-amplifier gain at fCis:

RCis then calculated as:

C

C

and Cfcan then be calculated as:

Applications Information

See Table 2 for suggested manufacturers of the com­ponents used with the MAX1954A.

PC Board Layout Guidelines

Careful PC board layout is critical to achieve low
switching losses and clean, stable operation. The
switching power stage requires particular attention.
Follow these guidelines for good PC board layout:

1) Place IC decoupling capacitors as close as possible
to IC pins. Keep separate the power-ground plane
(connected to pin 7) and the signal-ground plane
(connected to pin 4). The IN pin has two decoupling
capacitors. One connects to pin 7 and one connects
to pin 4.

2) Place the MOSFETs’ decoupling capacitors as
close as possible and place them directly across
from the high-side MOSFET drain and the low-side
MOSFET source.

3) Input and output capacitors are connected to the
power-ground plane; all other capacitors are con­nected to the signal-ground plane.

4) Keep the high-current paths as short as possible.

5) Connect the drain leads of the power MOSFET to a
large copper area to help cool the device. Refer to
the power MOSFET data sheet for recommended
copper area.

6) Connect HSD directly to the drain leads of the high­side MOSFET.

7) Connect LX directly to the drain of the low-side
MOSFET.

8) Place the low-side MOSFET so that its source is as
close as possible to pin 7.

9) Ensure all feedback connections are short and
direct. Place the feedback resistors as close as
possible to the IC.

10) Route high-speed switching nodes away from sen­sitive analog areas (FB, COMP).

11)The trace length from the gates of the low-side and
high-side MOSFETs to DH and DL should be no
longer than 700 mils.

To aid design, a sample layout is available in the
MAX1954A evaluation kit.

C

RfLC

RfLR

C

Rf

C

LOAD

S

OUT

LOAD

S

C

f

C zMOD

=

×××

+×

()

×

=

××

1

2π

R

V

V

f

gf G

C

OUT

FB

C

mEA zMOD MOD fC

=×

××

()

GgR

f

f

EA fC mEA C

zMOD

C

()

=××

Table 2. Suggested Manufacturers

MANUFACTURER COMPONENT PHONE WEBSITE

Central Semiconductor Diodes 631-435-1110 www.centralsemi.com

Coilcraft Inductors 800-322-2645 www.coilcraft.com

Fairchild MOSFETs 800-341-0392 www.fairchildsemi.com

Kemet Capacitors 864-963-6300 www.kemet.com

Panasonic Capacitors 714-373-7366 www.panasonic.com

Taiyo Yuden Capacitors 408-573-4150 www.t-yuden.com

TOKO Inductors 800-745-8656 www.toko.com

MAX1954A

Low-Cost, Current-Mode PWM Buck

Controller with Foldback Current Limit

______________________________________________________________________________________ 17

Typical Operating Circuit Chip Information

TRANSISTOR COUNT: 2963

PROCESS: BiCMOS

V

IN

3V TO 5.5V

V

HSD

5.5V TO 13.2V

IN

HSD

MAX1954A

COMP

GND

BST

PGND

DH

LX

DL

FB

N

N

V

OUT

0.8V TO 0.93 V

IN

MAX1954A

Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages

.)

e

10

0.6±0.1

1

0.6±0.1

TOP VIEW

A2

FRONT VIEW

Ø0.50±0.1

D2

D1

4X S

10

DIM

A1
A2 0.030 0.037 0.75 0.95
D1

H

1

BOTTOM VIEW

D2
E1
E2
H
L
L1
b
e

S

α

E2

GAGE PLANE

A

b

A1

α

E1

L

L1

INCHES

MAX

MIN

0.043

-A

0.006

0.002

0.120

0.116

0.118

0.114

0.120

0.116

0.118

0.114

0.199

0.187

0.0275

0.0157

0.037 REF

0.0106

0.007

0.0197 BSC

0.0078

0.0035

c

0.0196 REF
6°

0° 0° 6°

c

MILLIMETERS

MAX

MIN

1.10

-

0.15

0.05

3.05

2.95

3.00

2.89

3.05

2.95

2.89

3.00

4.75

5.05

0.40

0.70

0.940 REF

0.177

0.270

0.500 BSC

0.090

0.200

0.498 REF

10LUMAX.EPS

SIDE VIEW

PROPRIETARY INFORMATION

TITLE:

PACKAGE OUTLINE, 10L uMAX/uSOP

REV.DOCUMENT CONTROL NO.APPROVAL

21-0061

1

I

1