MAXIM MAX19538 Technical data

General Description

The MAX19538 is a 3.3V, 12-bit, 95Msps analog-to-digi­tal converter (ADC) featuring a fully differential wide­band track-and-hold (T/H) input amplifier, driving a
low-noise internal quantizer. The analog input accepts
single-ended or differential signals. The MAX19538 is
optimized for low power, small size, and high dynamic
performance. Excellent dynamic performance is main­tained from baseband to input frequencies of 175MHz
and beyond, making the MAX19538 ideal for intermedi­ate frequency (IF) sampling applications.

Powered from a single 3.3V supply, the MAX19538 con­sumes only 492mW while delivering a typical 68.4dB
signal-to-noise ratio (SNR) performance at a 175MHz
input frequency. In addition to low operating power, the
MAX19538 features a 63µW power-down mode to con­serve power during idle periods.

A flexible reference structure allows the MAX19538 to use
the internal 2.048V bandgap reference or accept an
externally applied reference. The reference structure
allows the full-scale analog input range to be adjusted
from ±0.35V to ±1.10V. The MAX19538 provides a com­mon-mode reference to simplify design and reduce exter­nal component count in differential analog input circuits.

The MAX19538 supports either a single-ended or differ­ential input clock drive. The internal clock duty-cycle
equalizer accepts a wide range of clock duty cycles.

Analog-to-digital conversion results are available
through a 12-bit, parallel, CMOS-compatible output bus.
The digital output format is pin selectable to be either
two’s complement or Gray code. A data-valid indicator
eliminates external components that are normally
required for reliable digital interfacing. A separate digital
power input accepts a wide 1.7V to 3.6V supply allow­ing the MAX19538 to interface with various logic levels.

The MAX19538 is available in a 6mm x 6mm x 0.8mm,
40-pin thin QFN package with exposed paddle (EP),
and is specified for the extended industrial (-40°C to
+85°C) temperature range.

See the Pin-Compatible Versions table for a complete
family of 14-bit and 12-bit high-speed ADCs.

Applications

IF and Baseband Communication Receivers
Cellular, Point-to-Point Microwave, HFC
Medical Imaging Including Positron

Emission Tomography (PET)
Video Imaging
Portable Instrumentation
Low-Power Data Acquisition

Features

♦ Direct IF Sampling Up to 400MHz
♦ Excellent Dynamic Performance

70.9dB/68.4dB SNR at fIN= 3MHz/175MHz

89.0dBc/76.2dBc SFDR at fIN= 3MHz/175MHz

-71.5dBFS Small-Signal Noise Floor

♦ 3.3V Low-Power Operation

465mW (Single-Ended Clock Mode)
492mW (Differential Clock Mode)
63µW (Power-Down Mode)

♦ Fully Differential or Single-Ended Analog Input
♦ Adjustable Full-Scale Analog Input Range: ±0.35V

to ±1.10V

♦ Common-Mode Reference
♦ CMOS-Compatible Outputs in Two’s Complement

or Gray Code

♦ Data-Valid Indicator Simplifies Digital Design
♦ Data Out-of-Range Indicator
♦ Miniature 6mm x 6mm x 0.8mm 40-Pin Thin QFN

Package with Exposed Paddle

♦ Evaluation Kit Available (Order MAX1211EVKIT)

MAX19538

12-Bit, 95Msps, 3.3V ADC

________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-3403; Rev 0; 10/04

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

Pin Configuration appears at end of data sheet.

+Denotes lead-free package.
*All devices are specified over the -40°C to +85°C operating

range.

PART* PIN-PACKAGE PKG CODE

MAX19538ETL 40 Thin QFN T4066-3

MAX19538ETL+

40 Thin QFN T4066-3

Pin-Compatible Versions

SAMPLING

PART

MAX12555 95 14 IF/Baseband

MAX12554 80 14 IF/Baseband

MAX12553 65 14 IF/Baseband

MAX19538 95 12 IF/Baseband

MAX1209 80 12 IF

MAX1211 65 12 IF

MAX1208 80 12 Baseband

MAX1207 65 12 Baseband

MAX1206 40 12 Baseband

RATE

(Msps)

RESOLUTION

(BITS)

TARGET

APPLICATION

MAX19538

12-Bit, 95Msps, 3.3V ADC

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDD= 3.3V, OVDD= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/

T = low, f

CLK

= 95MHz (50% duty cycle), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

VDDto GND...........................................................-0.3V to +3.6V

OV

DD

to GND........-0.3V to the lower of (VDD+ 0.3V) and +3.6V

INP, INN to GND ...-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

REFIN, REFOUT, REFP, REFN,

COM to GND.....-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

CLKP, CLKN, CLKTYP, G / T, DCE,

PD to GND ........-0.3V to the lower of (V

DD

+ 0.3V) and +3.6V

D11–D0, I.C., DAV,

DOR to GND........................................-0.3V to (OV

DD

+ 0.3V)

Continuous Power Dissipation (T

A

= +70°C)

40-Pin Thin QFN 6mm x 6mm x 0.8mm (derated

26.3mW/°C above +70°C) ......................................2105.3mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering 10s) ..................................+300°C

PARAMETER

CONDITIONS

DC ACCURACY (Note 2)

Resolution 12 Bits

Integral Nonlinearity INL fIN = 3MHz

LSB

Differential Nonlinearity DNL

LSB

Offset Error V

REFIN

= 2.048V

Gain Error V

REFIN

= 2.048V

ANALOG INPUT (INP, INN)

Differential Input Voltage Range V

DIFF

Differential or single-ended inputs

V

Common-Mode Input Voltage

V

C

PAR

Fixed capacitance to ground 2

Input Capacitance
(Figure 3)

Switched capacitance 4.5

pF

CONVERSION RATE

Maximum Clock Frequency f

CLK

95

Minimum Clock Frequency 5

Data Latency Figure 6 8.5

DYNAMIC CHARACTERISTICS (Differential Inputs) (Note 2)

Small-Signal Noise Floor SSNF Input at less than -35dBFS

fIN = 3MHz at -0.5dBFS (Note 3)

fIN = 70MHz at -0.5dBFS

Signal-to-Noise Ratio SNR

f

IN

= 175MHz at -0.5dBFS (Note 3)

dB

fIN = 3MHz at -0.5dBFS (Note 3)

fIN = 70MHz at -0.5dBFS

Signal-to-Noise and Distortion SINAD

f

IN

= 175MHz at -0.5dBFS (Note 3)

dB

SYMBOL

f

= 3M H z, n o m i ssi ng codes over tem per atur e -0.55 ±0.30 +0.95

IN

MIN TYP MAX UNITS

-1.7 ±0.4 +1.4

±0.10 ±0.58 %FS

±0.6 ±4.9 %FS

±1.024

V

/ 2

DD

C

SAMPLE

-71.5 dBFS

67.2 70.9

70.4

65.5 68.4

66.5 70.8

70.0

63.3 67.5

MHz

MHz

Clock

cycles

MAX19538

12-Bit, 95Msps, 3.3V ADC

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f

CLK

= 95MHz (50% duty cycle), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

fIN = 3MHz at -0.5dBFS (Note 3)

fIN = 70MHz at -0.5dBFS

Spurious-Free Dynamic Range SFDR

f

IN

= 175MHz at -0.5dBFS (Note 3)

dBc

fIN = 3MHz at -0.5dBFS (Note 3)

fIN = 70MHz at -0.5dBFS

Total Harmonic Distortion THD

f

IN

= 175MHz at -0.5dBFS (Note 3)

dBc

fIN = 3MHz at -0.5dBFS

fIN = 70MHz at -0.5dBFS

Second Harmonic HD2

f

IN

= 175MHz at -0.5dBFS

dBc

fIN = 3MHz at -0.5dBFS

fIN = 70MHz at -0.5dBFS

Third Harmonic HD3

f

IN

= 175MHz at -0.5dBFS

dBc

f

IN1

= 68.5MHz at -7dBFS

f

IN2

= 71.5MHz at -7dBFS

Intermodulation Distortion IMD

f

IN1

= 172.5MHz at -7dBFS

f

IN2

= 177.5MHz at -7dBFS

dBc

f

IN1

= 68.5MHz at -7dBFS

f

IN2

= 71.5MHz at -7dBFS

Third-Order Intermodulation IM3

f

IN1

= 172.5MHz at -7dBFS

f

IN2

= 177.5MHz at -7dBFS

dBc

f

IN1

= 68.5MHz at -7dBFS

f

IN2

= 71.5MHz at -7dBFS

Two-Tone Spurious Free
Dynamic Range

f

IN1

= 172.5MHz at -7dBFS

f

IN2

= 177.5MHz at -7dBFS

dBc

Aperture Delay t

AD

Figure 4 1.2 ns

Aperture Jitter t

AJ

Figure 4

ps

RMS

Output Noise n

OUT

INP = INN = COM

LSB

RMS

Overdrive Recovery Time ±10% beyond full scale 1

Clock

cycles

INTERNAL REFERENCE (REFIN = REFOUT; V

REFP

, V

REFN

, and V

COM

are generated internally)

REFOUT Output Voltage

V

COM Output Voltage V

COM

V

DD

/ 2

V

Differential-Reference Output
Voltage

V

REF

V

REF

= V

REFP

- V

REFN

= V

REFIN

x 3/4

V

REFOUT Load Regulation -1.0mA < I

REFOUT

< 0.1mA 35

mV/mA

REFOUT Temperature Coefficient

TC

REF

ppm/°C

Short to VDD, sinking

REFOUT Short-Circuit Current

Short to GND, sourcing 2.1

mA

SFDR

TT

V

REFOUT

73.5 89.0

83.5

67.2 76.2

-86.3 -72.9

-81.2

-74.7 -66.2

-92.4

-91.3

-82.3

-89.6

-83.7

-76.2

-82.5

-73.6

-84.3

-76.0

84.7

75.6

<0.2

0.36

1.996 2.048 2.063

1.65

1.536

+50

0.24

MAX19538

12-Bit, 95Msps, 3.3V ADC

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f

CLK

= 95MHz (50% duty cycle), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER

CONDITIONS

UNITS

BUFFERED EXTERNAL REFERENCE (REFIN driven externally; V

REFIN

= 2.048V, V

REFP

, V

REFN

, and V

COM

are generated

internally)

REFIN Input Voltage V

REFIN

V

REFP Output Voltage V

REFP

(V

DD

/ 2) + (V

REFIN

x 3/8)

V

REFN Output Voltage V

REFN

(V

DD

/ 2) - (V

REFIN

x 3/8)

V

COM Output Voltage V

COM

V

DD

/ 2

V

Differential-Reference Output
Voltage

V

REF

V

REF

= V

REFP

- V

REFN

= V

REFIN

x 3/4

V

Differential-Reference
Temperature Coefficient

ppm/°C

REFIN Input Resistance

MΩ

UNBUFFERED EXTERNAL REFERENCE (REFIN = GND; V

REFP

, V

REFN

, and V

COM

are applied externally)

COM Input Voltage V

COM

V

DD

/ 2

V

REFP Input Voltage V

REFP

- V

COM

V

REFN Input Voltage V

REFN

- V

COM

V

D i ffer enti al - Refer ence Inp ut V ol tag e

V

REF

V

REF

= V

REFP

- V

REFN

= V

REFIN

x 3/4

V

REFP Sink Current I

REFP

V

REFP

= 2.418V 1.4 mA

REFN Source Current I

REFN

V

REFN

= 0.882V 1.0 mA

COM Sink Current I

COM

V

COM

= 1.65V 1.0 mA

REFP, REFN Capacitance 13 pF

COM Capacitance 6pF

CLOCK INPUTS (CLKP, CLKN)

Single-Ended-Input High
Threshold

V

IH

CLKTYP = GND, CLKN = GND

0.8 x
V

DD

V

Single-Ended-Input Low
Threshold

V

IL

CLKTYP = GND, CLKN = GND

0.2 x
V

Differential Input Voltage Swing CLKTYP = high 1.4 V

P-P

Differential Input Common-Mode
Voltage

CLKTYP = high

V

Input Resistance R

CLK

Figure 5 5 kΩ

Input Capacitance C

CLK

2pF

DIGITAL INPUTS (CLKTYP, DCE, G / TTTT , PD)

Input High Threshold V

IH

0.8 x
V

Input Low Threshold V

IL

0.2 x
V

VIH = OV

DD

±5

Input Leakage Current

V

IL

= 0 ±5

µA

Input Capacitance C

DIN

5pF

SYMBOL

MIN TYP MAX

2.048

2.418

0.882

1.60 1.65 1.70

1.462 1.536 1.594

±25

>50

1.65

+0.768

-0.768

1.536

V

/ 2

DD

OV

DD

OV

V

DD

DD

MAX19538

12-Bit, 95Msps, 3.3V ADC

_______________________________________________________________________________________ 5

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f

CLK

= 95MHz (50% duty cycle), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER

CONDITIONS

UNITS

DIGITAL OUTPUTS (D11–D0, DAV, DOR)

D11–D0, DOR, I

SINK

= 200µA 0.2

Output-Voltage Low V

OL

DAV, I

SINK

= 600µA 0.2

V

D11–D0, DOR, I

SOURCE

= 200µA

OV

DD

-

0.2

Output-Voltage High V

OH

DAV, I

SOURCE

= 600µA

OV

DD

-

0.2

V

Tri-State Leakage Current I

LEAK

(Note 4) ±5 µA

D11–D0, DOR Tri-State Output
Capacitance

C

OUT

(Note 4) 3 pF

DAV Tri-State Output
Capacitance

C

DAV

(Note 4) 6 pF

POWER REQUIREMENTS

Analog Supply Voltage V

DD

V

Digital Output Supply Voltage OV

DD

1.7 1.8

V

DD

+

V

Normal operating mode,

single-ended clock

Normal operating mode,

differential clock

163

Analog Supply Current I

VDD

Power-down mode clock idle PD = OV

DD

mA

Normal operating mode,

single-ended clock

Normal operating mode,

differential clock

538

Analog Power Dissipation P

DISS

Power-down mode clock idle PD = OV

DD

mW

Normal operating mode,
f

IN

= 175MHz at -0.5dBFS, CL ≈ 5pF

9.9 mA

Digital Output Supply Current I

OVDD

Power-down mode clock idle PD = OV

DD

1.0 µA

SYMBOL

fIN = 175MHz at -0.5dBFS CLKTYP = GND,

fIN = 175MHz at -0.5dBFS CLKTYP = OVDD,

fIN = 175MHz at -0.5dBFS CLKTYP = GND,

fIN = 175MHz at -0.5dBFS CLKTYP = OVDD,

MIN TYP MAX

3.15 3.30 3.60

141

149

0.22

465

492

0.3V

0.063

MAX19538

12-Bit, 95Msps, 3.3V ADC

6 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(VDD= 3.3V, OVDD= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,
G/T = low, f

CLK

= 95MHz (50% duty cycle), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)

PARAMETER

CONDITIONS

UNITS

TIMING CHARACTERISTICS (Figure 6)

Clock Pulse-Width High t

CH

ns

Clock Pulse-Width Low t

CL

ns

Data-Valid Delay t

DAV

CL ≈ 5pF (Note 5) 6.8 ns

Data Setup Time Before Rising
Edge of DAV

t

SETUP

CL ≈ 5pF (Notes 5, 6) 5.7 ns

Data Hold Time After Rising Edge
of DAV

t

HOLD

CL ≈ 5pF (Notes 5, 6) 4.2 ns

Wake-Up Time from Power-Down

t

WAKE

V

REFIN

= 2.048V 10 ms

Note 1: Specifications ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: See definitions in the Parameter Definitions section at the end of this data sheet.
Note 3: Limit specifications include performance degradations due to production test socket. Performance is improved when the

MAX19538 is soldered directly to the PC board.

Note 4: During power-down, D11–D0, DOR, and DAV are high impedance.
Note 5: Digital outputs settle to V

IH

or VIL.

Note 6: Guaranteed by design and characterization.

SYMBOL

MIN TYP MAX

5.26

5.26

MAX19538

12-Bit, 95Msps, 3.3V ADC

_______________________________________________________________________________________ 7

Typical Operating Characteristics

(V

DD

= 3.3V, OV

DD

= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 95MHz (50% duty cycle), TA= +25°C, unless otherwise noted.

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

MAX19538 toc01

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

HD4

f

CLK

= 95MHz

f

IN

= 3.00354004MHz

A

IN

= -0.519dBFS
SNR = 70.89dB
SINAD = 70.83dB
THD = -89.3dBc
SFDR = 93.6dBc

HD3

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

MAX19538 toc02

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

HD2

HD5

f

CLK

= 95MHz

f

IN

= 47.30285645MHz

A

IN

= -0.510dBFS
SNR = 70.80dB
SINAD = 70.41dB
THD = -81.0dBc
SFDR = 83.2dBc

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

MAX19538 toc03

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

HD3

HD5

HD2

f

CLK

= 95MHz

f

IN

= 69.89318848MHz

A

IN

= -0.472dBFS
SNR = 70.65dB
SINAD = 70.35dB
THD = -82.1dBc
SFDR = 85.8dBc

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

MAX19538 toc04

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

HD3

HD5

HD2

f

CLK

= 95MHz

f

IN

= 174.8895264MHz

A

IN

= -0.521dBFS
SNR = 69.02dB
SINAD = 68.19dB
THD = -75.8dBc
SFDR = 76.8dBc

SINGLE-TONE FFT PLOT

(8192-POINT DATA RECORD)

MAX19538 toc05

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

HD3

HD5

HD2

f

CLK

= 95MHz

f

IN

= 224.8944092MHz

A

IN

= -0.531dBFS
SNR = 68.14dB
SINAD = 66.42dB
THD = -71.3dBc
SFDR = 72.4dBc

TWO-TONE FFT PLOT

(16,384-POINT DATA RECORD)

MAX19538 toc06

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

2 × f

IN1

+ f

IN2

f

IN1

+ f

IN2

3 × f

IN1

+ 2 × f

IN2

2 × f

IN2

+ f

IN1

f

IN2

f

IN1

f

CLK

= 95MHz

f

IN1

= 68.50739MHz

A

IN1

= -7.0dBFS

f

IN2

= 71.51093MHz

A

IN2

= -7.0dBFS

SFDR

TT

= 84.7dB
IMD = -82.4dBc
IM3 = -84.3dBc

TWO-TONE FFT PLOT

(16,384-POINT DATA RECORD)

MAX19538 toc07

FREQUENCY (MHz)

AMPLITUDE (dBFS)

454030 3510 15 20 255

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-110
0

2 × f

IN1

+ f

IN2

f

IN1

+ f

IN2

f

IN2

- f

IN1

2 × f

IN2

+ f

IN1

f

IN2

f

IN1

f

CLK

= 95MHz

f

IN1

= 172.4716MHz

A

IN1

= -7.0dBFS

f

IN2

= 177.4698MHz

A

IN2

= -7.0dBFS

SFDR

TT

= 75.5dBc
IMD = -73.6dBc
IM3 = -76.0dBc

INTEGRAL NONLINEARITY

MAX19538 toc08

DIGITAL OUTPUT CODE

INL (LSB)

358430722048 25601024 1536512

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1.0

-1.0
0 4096

DIFFERENTIAL NONLINEARITY

MAX19538 toc09

DIGITAL OUTPUT CODE

DNL (LSB)

358430722048 25601024 1536512

-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1.0

-1.0
0 4096

Typical Operating Characteristics (continued)

(V

DD

= 3.3V, OV

DD

= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 95MHz (50% duty cycle), TA= +25°C, unless otherwise noted.

MAX19538

12-Bit, 95Msps, 3.3V ADC

8 _______________________________________________________________________________________

SNR, SINAD vs. SAMPLING RATE

MAX19538 toc10

f

CLK

(MHz)

SNR, SINAD (dB)

100755025

63

64

65

66

67

68

69

70

71

72

62

0125

SNR
SINAD

fIN = 70MHz

SFDR, -THD vs. SAMPLING RATE

MAX19538 toc11

f

CLK

(MHz)

SFDR, -THD (dBc)

65

70

75

80

90

85

95

100

60

1007550250125

SFDR

-THD

fIN = 70MHz

POWER DISSIPATION

vs. SAMPLING RATE

MAX19538 toc12

f

CLK

(MHz)

POWER DISSIPATION (mW)

100755025

350

400

450

500

550

300

0125

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

IN

= 70MHz

C

L

≈ 5pF

SNR, SINAD vs. SAMPLING RATE

MAX19538 toc13

f

CLK

(MHz)

SNR, SINAD (dB)

100755025

61

62

63

64

65

66

67

68

69

70

60

0125

SNR
SINAD

fIN = 175MHz

SFDR, -THD

vs. SAMPLING RATE

MAX19538 toc14

f

CLK

(MHz)

SFDR, -THD (dBc)

65

70

75

80

90

85

95

100

60

1007550250125

SFDR

-THD

fIN = 175MHz

POWER DISSIPATION

vs. SAMPLING RATE

MAX19538 toc15

f

CLK

(MHz)

POWER DISSIPATION (mW)

100755025

350

400

450

500

550

600

650

700

300

0125

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

IN

= 175MHz

C

L

≈ 5pF

SNR, SINAD

vs. ANALOG INPUT FREQUENCY

MAX19538 toc16

ANALOG INPUT FREQUENCY (MHz)

SNR, SINAD (dB)

350300200 250100 15050

57

59

61

63

65

67

69

71

73

75

55

0400

SNR
SINAD

f

CLK

= 95MHz

SFDR, -THD

vs. ANALOG INPUT FREQUENCY

MAX19538 toc17

SFDR, -THD (dBc)

60

65

70

75

80

85

90

95

100

55

ANALOG INPUT FREQUENCY (MHz)

350300200 250100 150500400

SFDR

-THD

f

CLK

= 95MHz

POWER DISSIPATION

vs. ANALOG INPUT FREQUENCY

MAX19538 toc18

ANALOG INPUT FREQUENCY (MHz)

POWER DISSIPATION (mW)

35030025020015010050

450

500

550

600

650

700

400

0400

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

CLK

= 95MHz

C

L

≈ 5pF

MAX19538

12-Bit, 95Msps, 3.3V ADC

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)

(V

DD

= 3.3V, OV

DD

= 1.8V, GND = 0, REFIN = REFOUT (internal reference), VIN= -0.5dBFS, CLKTYP = high, DCE = high, PD = low,

G/T = low, f

CLK

≈ 95MHz (50% duty cycle), TA= +25°C, unless otherwise noted.

SNR, SINAD

vs. ANALOG INPUT AMPLITUDE

MAX19538 toc19

ANALOG INPUT AMPLITUDE (dBFS)

SNR, SINAD (dB)

-5-10-20 -15-30 -25-35

30

35

40

45

50

55

60

65

70

75

25

-40 0

SNR
SINAD

f

CLK

= 95MHz

f

IN

= 175MHz

SFDR, -THD

vs. ANALOG INPUT AMPLITUDE

MAX19538 toc20

ANALOG INPUT AMPLITUDE (dBFS)

SFDR, -THD (dBc)

-5-10-20 -15-30 -25-35

45

50

55

60

65

70

75

80

85

90

40

-40 0

f

CLK

= 95MHz

f

IN

= 175MHz

SFDR

-THD

POWER DISSIPATION

vs. ANALOG INPUT AMPLITUDE

MAX19538 toc21

ANALOG INPUT AMPLITUDE (dBFS)

POWER DISSIPATION (mW)

-5-10-15-20-25-30-35

450

500

550

600

650

700

400

-40 0

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

CLK

= 96MHz

f

IN

= 175MHz

C

L

≈ 5pF

SNR, SINAD

vs. ANALOG SUPPLY VOLTAGE

MAX19538 toc22

VDD (V)

SNR, SINAD (dB)

3.43.23.02.8

63

64

65

66

67

68

69

70

71

72

62

2.6 3.6

SNR
SINAD

f

CLK

= 95MHz

f

IN

= 175MHz

SFDR, -THD

vs. ANALOG SUPPLY VOLTAGE

MAX19538 toc23

VDD (V)

SFDR, -THD (dBc)

65

70

75

80

90

85

95

100

60

3.43.23.02.82.6 3.6

SFDR

-THD

f

CLK

= 95MHz

f

IN

= 175MHz

POWER DISSIPATION

vs. ANALOG SUPPLY VOLTAGE

MAX19538 toc24

VDD (V)

POWER DISSIPATION (mW)

3.43.23.02.8

350

400

450

500

550

600

300

2.6 3.6

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

CLK

= 95MHz

f

IN

= 175MHz

C

L

≈ 5pF

SNR, SINAD

vs. DIGITAL SUPPLY VOLTAGE

MAX19538 toc25

OVDD (V)

3.4

3.02.62.21.81.4 3.8

SNR, SINAD (dB)

63

64

65

66

67

68

69

70

71

72

62

SNR
SINAD

fIN = 174.8953247MHz
f

CLK

= 95MHz

SFDR, -THD

vs. DIGITAL SUPPLY VOLTAGE

MAX19538 toc26

SFDR, -THD (dBc)

65

70

75

80

85

90

95

100

60

OVDD (V)

3.43.02.62.21.81.4 3.8

SFDR

-THD

fIN = 174.8953247MHz
f

CLK

= 95MHz

POWER DISSIPATION

vs. DIGITAL SUPPLY VOLTAGE

MAX19538 toc27

OVDD (V)

POWER DISSIPATION (mW)

3.43.02.62.21.8

450

500

550

600

650

700

400

1.4 3.8

ANALOG + DIGITAL POWER
ANALOG POWER

DIFFERENTIAL CLOCK
f

IN

= 175.8953247MHz

f

IN

= 95MHz

C

L

≈ 5pF