The MAX17710 is a complete system for charging and
protecting micropower-storage cells such as Infinite Power
Solution’s THINERGY® microenergy cells (MECs). The IC
can manage poorly regulated sources such as energyharvesting devices with output levels ranging from 1FW to
100mW. The device also includes a boost regulator circuit
for charging the cell from a source as low as 0.75V (typ).
An internal regulator protects the cell from overcharging.
Output voltages supplied to the target applications are
regulated using a low-dropout (LDO) linear regulator with
selectable voltages of 3.3V, 2.3V, or 1.8V. The output regulator operates in a selectable low-power or ultra-low-power
mode to minimize drain of the cell. Internal voltage protection prevents the cell from overdischarging.
The device is available in an ultra-thin, 3mm x 3mm x
0.5mm 12-pin UTDFN package.
Applications
Powered/Smart Cards
Remote Wireless
Sensors
Memory and Real-Time
Clock Backup
Semiactive RFID Tags
Medical Devices
High-Temperature
Applications
Military/DoD and
Aerospace
Toys
Features
SIntegrated Power-Management IC for Energy
Storage and Load Management
SLithium Charger
1nA Standby I
625nA Linear Charging
QBATT
1µW Boost Charging
SLithium Cell Undervoltage Protection
SCharger Overvoltage Shunt Protection
S1.8V, 2.3V, or 3.3V LDO (150nA I
QBATT
)
SLithium Cell Output Buffering
SUltra-Thin, 3mm x 3mm x 0.5mm UTDFN Package
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to: www.maxim-ic.com/MAX17710.related
Simplified Operating Circuit
THINERGY
MEC101
RF OR OTHER
HIGH-VOLTAGE
SOURCE
TEG, SOLAR,
OR OTHER
LOW-VOLTAGE
SOURCE
THINERGY is a registered trademark of Infinite Power Solutions, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX17710
Energy-Harvesting Charger and Protector
ABSOLUTE MAXIMUM RATINGS
BATT to GND ........................................................... -0.3V to +6V
CHG to GND ...........................................................-0.3V to +6V
LX to PGND .............................................................-0.3V to +6V
GND to PGND ......................................................-0.3V to +0.3V
FB, AE, LCE, SEL1, SEL2, REG,
PCKP to GND .......................................-0.3V to V
BATT
+ 0.3V
CHG Continuous Current
(limited by power dissipation of package) ...................100mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +4.3V, Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at T
CHG
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
CHG Input Maximum VoltageLimited by shunt regulator (Note 2)4.8755.35.7V
= +4.3V, Figure 1, TA = -40NC to +85NC, unless otherwise noted. Typical values are at T
CHG
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
BOOST REGULATOR
CHG Regulation VoltageV
FrequencyV
Boost Turn-On Timet
FB Threshold
FB Input Current LowVFB = GND, momentary 600nA
LX nMOS On-ResistanceR
Note 1: Specifications are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by
design and characterization.
Note 2: Since the CHG shunt regulator has a 25Fs delay, the user must limit the voltage to the Absolute Maximum Rating until the
internal CHG shunt provides the voltage limit at the pin in response to 50mA input. Larger currents must be shunted with
an external clamp to protect the CHG pin from damage.
Note 3: LCE mode is entered by pulsing AE high, then pulsing AE low.
Note 4: For logic-high, connect LCE to the REG output. Do not connect to the BATT or PCKP pins.
Note 5: Since LCE is compared to the REG pin voltage for operation, the low-power regulator cannot be switched off under condi-
1BATTCell Input. Connect to the positive terminal of the cell without a bypass capacitor.
2CHG
3FB
4GNDDevice Ground. Connect to system ground.
5LXBoost Input. Controls current drive through inductor of external boost circuit.
6PGNDPower Ground. Connect to system ground.
7AE
8SEL2
9SEL1
10REG
11LCE
12PCKP
—EPExposed Pad. Connect to GND.
Charge Input. The IC charges the cell from the power source applied to this pin. Connect to the
output of the boost circuit or directly to a 4.21V or higher charge source.
Boost Enable. The boost circuit is enabled by driving this pin above the FBON threshold. Afterwards,
the boost circuit is disabled by driving this pin below FB
OFF
.
Active Enable. Pulse high to enable high-power regulator output. Pulse low to disable regulator
output.
Boost R
Select. Connect to system ground to select a boost R
DS-ON
of 0.5I for typical
DS-ON
applications.
Regulator Voltage Select. Ground this pin to select a regulator output voltage of 2.3V, leave
disconnected for a regulator output voltage of 3.3V, or connect to the BATT pin for a regulator
output voltage 1.8V.
Regulator Output. Connect to load circuit. Bypass to system ground with a 1FF (typ) capacitor.
Low-Current Enable. Pulse high to enable the low-current regulator output after the high-current
regulator output is already active. Pulse low to disable.
Protected Output of Pack. Connect an external capacitor to PCKP to support energy buffering to
the load, especially in low-temperature applications (see Table 4). PCKP is used for pulsed current
storage.
The MAX177710 controls two main functions related to
management of an energy-harvesting application: charging
a low-capacity cell with overcharge protection and an LDO
regulator output with overdischarge protection. With the
exception of protection features, charging and regulation
functions operate completely independently of one another.
Initial power-up of the device occurs when a cell is connected to the BATT pin. In this state, the device pulls only
1nA (typ) from the cell and LDO functions are disabled. Only
after a charger has been applied and V
4.15V (VCE) does the device initialize to full operation and
allow discharging.
Charge-Regulator Operation
The device charges the cell from an external energy
source connected to the CHG pin. Whenever the voltage on CHG is greater than the voltage on BATT, the
energy-harvesting circuit directly passes current to the
cell without any interaction from the device. When CHG
rises above VCE, the input linear regulator turns on to limit
the charging voltage to 4.125V and protects the cell from
overcharge. Also at this time, any UVLO is reset, allowing the LDO to power the application load. This release
of the lockout is latched by CHG exceeding VCE and
rises above
CHG
remains active after the removal of the charge voltage.
The state of this latch is off when initial power is applied
to the BATT pin.
While charging, the device consumes approximately
625nA from the CHG source until the voltage on CHG
exceeds 4.15V. Above 4.15V, the IC enters dropout and
BATT quiescent current increases from 1nA to 450nA.
CHG Shunt
Whenever a harvest source pulls the CHG pin above
5.3V, an internal shunt regulator enables a path to GND
to limit the voltage at the CHG pin. The internal shunt
path can sustain currents up to 50mA. If it is possible for
the harvest source to exceed this power limit, an external
protection circuit is required to prevent damage to the
device. Figure 1 shows the typical application charge circuit harvesting from high-voltage charge sources. Note
that a 0.22FF on CHG is recommended for shunt stability
when charging from high-voltage sources.
In the application circuit example, the cell is charged by
several high-voltage harvest sources. Whenever either harvest source voltage is higher than the cell voltage, charge
is transferred directly. If either charge source exceeds
4.15V, the device begins to limit current flow to regulate the
cell’s voltage to 4.125V. If either charge source exceeds
5.3V, the internal CHG shunt discharges up to 50mA
through the device to GND to protect the CHG pin.
The device includes a simple boost regulator controller to
support energy harvesting from low-voltage solar or thermoelectric generator (TEG) devices. The boost converter
can harvest energy down to approximately 1FW when
operated in pulsed harvest mode and as high as 100mW
in continuous conversion. For a 0.8V harvest source and
a 4.1V cell, the device can deliver over 20mA (80mW), as
long as the harvest source can support it. Figure 2 shows
the typical application boost circuit boost harvesting
from a low-voltage solar-cell array.
In the application circuit example, the solar cell array
charges the 47FF harvest-source capacitor until the voltage on FB exceeds the FBON threshold. At this time, the
LX pin is pulled low to force current through the external
inductor. LX begins to oscillate at a fixed 1.0MHz with
90% duty cycle. Each time LX is released by the device,
the external inductor forces the voltage of LX above CHG
and charges the 0.1FF CHG pin capacitor. When CHG
rises above the voltage of V
, charge is delivered to
BATT
the cell. If the CHG pin exceeds 4.5V during this time,
the boost converter enters a skip-mode operation to
limit voltage on CHG to 4.5V. Operation continues until
the voltage of the harvest-source capacitor collapses,
driving FB below the FB
threshold, which disables
OFF
the boost circuit. The process repeats after the harvest
source capacitor is recharged.
Because the boost converter draws its quiescent current
directly from the cell (for startup reasons), it is important
to only enable the boost converter when it can provide
more power than the boost converter consumes from the
cell. This can be guaranteed as long as the capacitor
across the TEG is large enough to boost CHG above the
BATT pin. Note that it is important to use a high-speed
Schottky diode between LX and CHG to guarantee LX
does not exceed its absolute maximum voltage rating
during boost operation.
Charge Regulator Component Selection
External component selection depends on the charge
sources available to the device. Proper component
selection provides the highest efficiency operation of the
IC during energy harvesting. See Figure 2 as a reference.
This section describes component selection for boost
sources with operational voltages of 1.0V or high-voltage
sources. For boost charge sources with operational voltages between 1.0V and 2.0V, additional components
are required. See the FB Dividersection for a detailed
description.
THINERGY
MEC101
0.1µF
ZLLS410TA
HIGH-SPEED
SCHOTTKY
1.5µH
SOLAR CELL 2
SOLAR CELL 1
Figure 2. Typical Application Boost Circuit Boost Harvesting from a Low-Voltage Solar-Cell Array
The CHG pin capacitor should be minimized to 0.1FF
for highest charge efficiency. However, when charging
from a high-voltage source, at least 0.22FF is required
for shunt stability.
LX Inductor
The LX pin inductor is not required for high-voltage
charge sources. For low-voltage sources, a minimum
inductor value of 0.68FH is required to prevent the maximum current rating of the LX pin from being exceeded.
Minimum inductor value is calculated as follows:
LX inductor = V
FB-ON
x t
BOOST-ON
/LX
IMAX
= 1.0V x
850ns/1A = 0.85FH
Boost Diode
The boost circuit diode must be a high-speed Schottky,
such as the ZLLS410TA from Diodes Incorporated. The
diode must turn on quickly to clamp the LX pin voltage rise at 6.0V or lower when the LX driver turns off.
The LX pin can be damaged if the maximum voltage is
exceeded.
Harvest Source Capacitor
The harvest source capacitor must be a minimum of 70
times larger than the CHG pin capacitor to boost the
charge pin to the maximum charge voltage under worstcase conditions:
Source capacitor = (4.125V)2/(0.485V)2 x
CHG capacitor
This is the minimum size required for operation. Increasing
the size of the harvest source capacitor beyond this
level improves charge circuit efficiency at extremely low
input power (< 10FW), but care should be taken not to
increase the capacitor so large that the harvest source
cannot overcome the capacitor’s leakage. A maximum
value of 47FF is recommended.
Minimum capacitor and inductor values are required for
proper operation of the charge circuit. Recommended
capacitor and inductor values provide optimum charge
efficiency. Components should be sized as close to
the recommended values that the application allows.
Component values below the minimum values, or above
the optimum values, are not recommended.
FB Divider
Charge sources with operational voltages between 1.0V
and 2.0V require boosting, but are too high a voltage to
control the boost circuit efficiently. Under these conditions, a voltage-divider is required to lower the voltage
seen by the FB pin (see Figure 3). The divider formed by
R1 and R2 allows the voltage on the FB pin to transition
properly between the FBON and FB
thresholds during
OFF
boosting. The value for R2 is calculated as follows:
The C1 1nF capacitor acts as a voltage-level feed forward to increase the responsiveness of the divider circuit
as the harvest source capacitor is discharged. The minimum voltage is defined as:
V
HARVEST-OFF
V
HARVEST-OFF
where V
HARVEST-OFF
source capacitor during boost.
Because of the divider on the FB pin, the voltage seen by
the LX pin inductor is higher than the typical circuit. The
inductor must be resized so that the LX pin current limits
are not exceeded:
LX Inductor = V
All other components are selected as normal.
Energy-Harvesting Design Approaches
When designing an optimal energy harvest system,
there are three types of design approaches: linear harvest, boost harvest, and maximum-power-point tracking
(MPPT). In harvesting applications, it is very critical to
not discharge the cell when charging is failing. When
the harvesting power is low enough, eventually the system discharges the cell rather than charges. This is the
break-even point of the harvester. For linear harvesting,
this break-even point is lower because the required
quiescent current is less. However, for boost harvesting,
the breakeven threshold is 1FA. While an MPPT system
can utilize the harvesting source more intelligently in
high-power situations, it inevitably results in higher quiescent current and a poorer break-even threshold. MPPT
systems must measure the current and voltage, multiply
to determine power, and make decisions to improve the
power. These required measurements automatically
significantly increase the quiescent current budget
by tens of µA. Figure 4 shows energy-harvesting modes
of operation vs. charge efficiency.
~= V
~= V
HARVEST-ON
HARVEST-ON
- (FBON - FB
- 0.5V (typ)
is the lowest voltage of the harvest
HARVEST-ON
V
HARVEST-ON
x t
BOOST-ON
x (8.5 x 10-7)
/LX
OFF
IMAX
)
=
MAX17710
CHG
0.1µF
ZLLS410TA
1.0V TO 2.0V
CHARGE
SOURCE
47µF
Figure 3. FB Divider Circuit to Improve Boost Efficiency for
Charge Sources Between 1.0V and 2.0V
BREAK-EVEN
CHARGE EFFICIENCY
THRESHOLDS
C1
1nF
500kI
LINEAR
HARVEST
R1
L1
R2
MAX17710
LX
FB
MPPT
(MAX POWER
TRACKING)
BOOST HARVEST
LDO Output Operation
The device regulates voltage from the cell to a load
circuit on the REG pin through an LDO regulator. The
regulator can be configured for 3.3V, 2.3V, or 1.8V operation. The LDO supports loads up to 75mA (high-current
mode). For lighter load applications, a low-power mode
of operation reduces the quiescent current drain on the
cell. A UVLO circuit prevents the regulator from starting up or disabling the regulator when active if the cell
becomes overdischarged.
Figure 4. Energy-Harvesting Modes of Operation vs. Charge
Efficiency
MAX17710
Energy-Harvesting Charger and Protector
The LDO becomes active when the AE pin is pulsed
above or held above its logic-high threshold, but the
regulator output is not immediately enabled. The device
first charges the external capacitor on PCKP. When the
voltage level on PCKP reaches 3.7V, the regulator output
is enabled in high-current mode. Powering the LDO from
PCKP instead of directly from the cell allows the device
to support large surge or startup inrush currents from the
load that the cell would be unable to handle directly.
Once in high-current mode, the AE pin can remain logichigh or transition to an open state, and the ouput remains
active. The LDO returns to shutdown only when the AE
pin is driven below its logic-low threshold. Alternatively,
the LDO is transitioned to low-current mode by pulsing
or holding the LCE to the REG pin voltage, followed by
pulsing or holding the AE pin logic-low. Note that the regulator transitions through a state where both high-current
and low-current modes are active at the same time. While
in low-current mode, the quiescent current drain of the
cell is reduced to 150nA, while the maximum load current
able to be supplied becomes 50FA. Similar to the AE pin
operation, the regulator remains active if the LCE pin is
SHUTDOWN
PCKP OFF
I
QBATT
REG OFF
= 1nA (typ)
AE PULSED LOW
open or pulled to REG, and returns to shutdown mode
when LCE is driven below its logic-low threshold. Figure
5 is the regulator output state diagram.
Cell Undervoltage Lockout (UVLO)
If the cell and PCKP capacitance cannot provide sustained support for the load, then the voltage at PCKP collapses. When PCKP collapses, the system load typically
stops and allows the PCKP voltage to recover, resulting
in a perpetual retry in a futile attempt to support a load
that cannot be supported. When PCKP fails in this way,
the device shuts off the REG output to prevent futile load
retries and protect the cell from overdischarge. When the
REG output is latched off, the BATT quiescent current
reduces to 1nA (typ). Once UVLO occurs, the regulator
output remains disabled until the device detects that a
charge source has been connected to the system (V
CHG
> 4.15V). Figure 6 shows the UVLO protection modes.
Connecting any load to REG or PCKP instead of connecting directly to the cell is highly recommended. This controls the quiescent current during shutdown, enables the
device to support startup during cold, and also protects
the cell from overdischarge.
The SEL1 pin selects at which voltage REG operates.
Connect SEL1 to BATT for 1.8V operation, three-state for
3.3V operation, or connect to GND for 2.3V operation.
Note that the voltage regulation value is latched when
enabled. To change the regulation voltage point, the regulator must be disabled and then reenabled. See Table 3.
PCKP Pin Capacitor Selection
There are several cases when the system might overload
the cell, potentially causing damage. They are prevented
with the PCKP load switch block and external capacitor:
U During startup, when there is an inrush current due to
the application’s load and capacitance.
U When the cell is cold (such as -40NC), and due to
increased cell resistance, it is unable to support highload currents.
U If the system requires a load current higher than can be
supported by the cell alone.
The device provides cell undervoltage protection by
limiting the current from BATT to PCKP and guaranteeing that the cell voltage does not fall below 2.15V. In
addition to voltage protection, the ramp of the PCKP
switch impedance is changed slowly (5ms to full on) to
gradually load the cell and not collapse the voltage on a
room-temperature cell. Because of these protection features, an application can now support brief high-current
pulses by including a large capacitance at PCKP. This
allows support for pulse loads many times higher than
that naturally supported by the cell alone.
A large PCKP capacitance can be selected to support
a pulse load even while the cell is very cold, and would
normally be incapable of supporting a significant load.
Choose this capacitor according to Table 4 or the following equation:
C
PCKP
= I
TASK
x t
TASK
/(3.7 - V
MIN
)
where:
I
is the current required to sustain a required task,
TASK
t
is the time duration of the task, and V
TASK
MIN
is the
minimum voltage of the load doing the task.
This equation assumes that the BATT impedance is high
and cannot support the load.
Table 3. Regulator Output Voltage Selection
SEL1 PIN CONNECTIONREG PIN OUTPUT VOLTAGE (V)
Connect to BATT1.8
Open circuit3.3
Connect to GND2.3
Table 4. PCKP Pin Capacitor Values by Application
V
MIN
3.058100
3.05450
2.85528
2.852.514
2.35518
2.351036
*Capacitance value tolerances need to be considered.
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Corrections and clarifications made based on customer feedback; added
new TOC #9 and updated two EC table limits
PAGES
CHANGED
3–7, 9, 10, 12–15
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 17