Maxim MAX1714BEEE, MAX1714AEEP Datasheet

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General Description
The MAX1714 pulse-width modulation (PWM) controller provides the high efficiency, excellent transient response, and high DC output accuracy needed for stepping down high-voltage batteries to generate low­voltage CPU core or chip-set/RAM supplies in notebook computers.
Maxim’s proprietary Quick-PWM™ quick-response, constant-on-time PWM control scheme handles wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency.
The MAX1714 achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronous­rectifier MOSFETs.
Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. Alternatively, two-stage conversion (stepping down the +5V system supply instead of the battery) at a higher switching frequency allows the mini­mum possible physical size.
The MAX1714 is intended for CPU core, chipset, DRAM, or other low-voltage supplies as low as 1V. The MAX1714A is available in a 20-pin QSOP package and includes overvoltage protection. The MAX1714B is available in a 16-pin QSOP package with no overvolt­age protection. For applications requiring VID compli­ance or DAC control of output voltage, refer to the MAX1710/MAX1711 data sheet. For a dual output ver­sion, refer to the MAX1715†data sheet.
Applications
Notebook Computers
CPU Core Supply
Chipset/RAM Supply as Low as 1V
1.8V and 2.5V I/O Supply
Features
Ultra-High Efficiency
No Current-Sense Resistor (Lossless I
LIMIT
)
Quick-PWM with 100ns Load-Step Response
1% V
OUT
Accuracy Over Line and Load
2.5V/3.3V Fixed or 1V to 5.5V Adjustable Output
Range
2V to 28V Battery Input Range
200/300/450/600kHz Switching Frequency
Overvoltage Protection (MAX1714A)
Undervoltage Protection
1.7ms Digital Soft-Start
Drives Large Synchronous-Rectifier FETs
2V ±1% Reference Output
Power-Good Indicator
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
________________________________________________________________ Maxim Integrated Products 1
19-1536; Rev 1; 12/99
Pin Configurations appear at end of data sheet.
Quick-PWM is a trademark of Maxim Integrated Products.
Future product—contact factory for availability.
-40°C to +85°C
PART
MAX1714AEEP
TEMP. RANGE PIN-PACKAGE
20 QSOP
Ordering Information
EVALUATION KIT MANUALS
FOLLOW DATA SHEET
V
CC
+5V INPUT
BATTERY
4.5V TO 28V
OUTPUT
1.25V TO 2V
SHDN
ILIM
DL
LX
V+
BST
DH
PGND (GND)
OUT
SKIP
V
DD
MAX1714
REF
PGOOD
FB
AGND (GND)
( ) ARE FOR THE MAX1714B ONLY.
Minimal Operating Circuit
MAX1714BEEE -40°C to +85°C 16 QSOP
MAX1714
High-Speed Step-Down Controller for Notebook Computers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
V+ to AGND (Note 1)..............................................-0.3V to +30V
V
DD
, VCCto AGND (Note 1).....................................-0.3V to +6V
PGND to AGND (Note 1) ................................................... ±0.3V
SHDN, PGOOD, OUT to AGND (Note 1)..................-0.3V to +6V
ILIM, FB, REF, SKIP,
TON to AGND (Notes 1, 2)....................-0.3V to (V
CC
+ 0.3V)
DL to PGND (Note 1)..................................-0.3V to (V
DD
+ 0.3V)
BST to AGND (Note 1) ...........................................-0.3V to +36V
DH to LX.....................................................-0.3V to (BST + 0.3V)
LX to BST..................................................................-6V to +0.3V
REF Short Circuit to AGND.........................................Continuous
Continuous Power Dissipation (T
A
= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)..........667mW
20-Pin QSOP (derate 9.1mW/°C above +70°C)..........727mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
V+ = 4.5V to 28V, SKIP = V
CC
V
SHDN
= 0 , V+ = 28V, VCC= VDD= 0 or 5V
V
SHDN
= 0
V
CC,VDD
V
SHDN
= 0
Battery voltage, V+
FB forced above the regulation point
FB forced above the regulation point
Rising edge of SHDN to full I
LIM
(Note 4)
V+ = 24V, V
OUT
= 2V
(Note 4)
I
LOAD
= 0 to 3A, SKIP = V
CC
VCC= 4.5V to 5.5V, V+ = 4.5V to 28V
CONDITIONS
µA<1 5Shutdown Supply Current (V+)
µA<1 5Shutdown Supply Current (VDD)
µA<1 5Shutdown Supply Current (VCC)
µA25 40Quiescent Supply Current (V+)
µA<1 5Quiescent Supply Current (VDD)
µA550 750Quiescent Supply Current (VCC)
ns400 500Minimum Off-Time
380 425 470
260 290 320
175 200 225
V
0.99 1.0 1.01
Error Comparator Threshold (DC Output Voltage Accuracy) (Note 3)
TON = REF (450kHz)
4.5 5.5
V
228
Input Voltage Range
TON = AGND (600kHz)
ns
140 160 180
On-Time
ms1.7Soft-Start Ramp Time
µA-0.1 0.1FB Input Bias Current
TON = unconnected (300kHz)
mV9Load Regulation Error
mV5Line Regulation Error
UNITSMIN TYP MAXPARAMETER
Falling edge, hysteresis = 40mV
REF in regulation
I
REF
= 0 to 50µA
VCC= 4.5V to 5.5V, no external REF load
V1.6REF Fault Lockout Voltage
µA10REF Sink Current
V0.01Reference Load Regulation
V1.98 2 2.02Reference Voltage
TON = VCC(200kHz)
Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND. Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault
detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC= VDD= +5V, SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.) (Note 1)
FB = AGND k100 190 300OUT Input Resistance
FB = OUT
2.475 2.5 2.525FB = AGND
FB = V
CC
3.267 3.3 3.333
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC= VDD= +5V, SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.) (Note 1)
CONDITIONS UNITSMIN TYP MAXPARAMETER
PGND - LX
PGND - LX, I
LIM
= V
CC
From SHDN signal going high
mV
40 50 60
Current-Limit Threshold (Positive Direction, Adjustable)
mV90 100 110
Current-Limit Threshold (Positive Direction, Fixed)
ms10 30
Output Undervoltage Protection Blanking Time
%65 70 75
Output Undervoltage Protection Threshold
PGND - LX, SKIP = VCC, TA= +25°C, with respect to positive current-limit threshold
%-90 -120 -140
Current-Limit Threshold (Negative Direction)
V
ILIM
= 0.5V
V
ILIM
= 2.0V 170 200 230
Rising edge, hysteresis = 20mV, PWM disabled below this level
V4.1 4.4
VCCUndervoltage Lockout Threshold
BST - LX forced to 5V 1.5 5DH Gate-Driver On-Resistance
DL, high state 1.5 5
DL Gate-Driver On-Resistance (Pull-Up)
DL, low state 0.5 1.7
DL Gate-Driver On-Resistance (Pull-Down)
DH forced to 2.5V, BST - LX forced to 5V A1
DH Gate-Driver Source/Sink Current
DL forced to 2.5V A1DL Gate-Driver Source Current
DL forced to 2.5V A3DL Gate-Driver Sink Current
FB forced 2% above trip threshold (MAX1714A only) µs1.5
Overvoltage Fault Propagation Delay
%10.5 12.5 14.5Overvoltage Trip Threshold
FB forced 2% below PGOOD trip threshold, falling edge µs1.5PGOOD Propagation Delay
PGND - LX, SKIP = AGND
mV3
Current-Limit Threshold (Zero Crossing)
I
SINK
= 1mA V0.4PGOOD Output Low Voltage
High state, forced to 5.5V µA1PGOOD Leakage Current
Hysteresis = 10°C °C150Thermal Shutdown Threshold
With respect to error comparator threshold (MAX1714A only)
With respect to error comparator threshold
DL rising
ns
35
Dead Time
DH rising 26
mA
SKIP Input Current Logic Threshold
To disable overvoltage and undervoltage fault detection, T
A
= +25°C
-1.5 -0.1
%PGOOD Trip Threshold
Measured at FB with respect to error comparator threshold, falling edge
-8 -6 -4
VLogic Input High Voltage
SHDN, SKIP
2.4
VLogic Input Low Voltage
SHDN, SKIP
0.8
µALogic Input Current
SHDN, SKIP
-1 1
nAILIM Input Current
SHDN, SKIP
±
10
MAX1714
High-Speed Step-Down Controller for Notebook Computers
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, 4A components from Table 1, V+ = 15V, V
CC
= VDD= +5V, SKIP = AGND, TA= -40°C to +85°C, unless other-
wise noted.) (Notes 1, 5)
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, VCC= VDD= +5V, SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.) (Note 1)
CONDITIONS
VVCC- 0.4TON VCCLevel
V3.15 3.85TON Float Voltage
V1.65 2.35TON Reference Level
V0.5TON AGND Level
Forced to AGND or V
CC
µA-3 3TON Input Current
UNITSMIN TYP MAXPARAMETER
TON = VCC(200kHz)
Reference Voltage 1.98 2.02 VVCC= 4.5V to 5.5V, no external REF load
PARAMETER MIN TYP MAX UNITS
TON = unconnected (300kHz)
On-Time
140 180
ns
TON = AGND (600kHz)
Input Voltage Range
228
V
4.5 5.5
TON = REF (450kHz)
Error Comparator Threshold (DC Output Voltage Accuracy) (Note 3)
0.985 1.015
V
175 225
With respect to error comparator threshold (MAX1714A only)
260 320
380 470
Minimum Off-Time
FB = AGND
500 ns
Quiescent Supply Current (VCC)
FB = OUT
750 µA
3.25 3.35
2.462 2.538
Logic Input Current -1 1 µA
SHDN, SKIP
Logic Input Low Voltage 0.8 V
SHDN, SKIP
Logic Input High Voltage
FB = V
DD
V
2.4 V
SHDN, SKIP
VCCUndervoltage Lockout Threshold
4.1 4.4
Rising edge, hysteresis = 20mV, PWM disabled below this level
Output Undervoltage Protection Threshold
65 75
CONDITIONS
%
160 240
With respect to error comparator threshold
V
ILIM
= 2.0V
V
ILIM
= 0.5V
Current-Limit Threshold (Positive Direction, Adjustable)
35 65
V+ = 24V, V
OUT
= 2V
(Note 4)
(Note 4)
mV
Overvoltage Trip Threshold
FB forced above the regulation point
PGND - LX
Current-Limit Threshold (Positive Direction, Fixed)
Battery voltage, V+
85 115
V
CC,VDD
mVPGND - LX, ILIM = V
CC
V+ = 4.5V to 28V, SKIP = V
CC
10 15 %
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
_______________________________________________________________________________________ 5
Note 1: For the MAX1714B, AGND and PGND refer to a single pin designated GND. Note 2: SKIP may be forced below -0.3V, temporarily exceeding the absolute maximum rating, disabling over/undervoltage fault
detection for the purpose of debugging prototypes (Figure 6). Limit the current drawn to 5mA maximum.
Note 3: When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the error-
comparator threshold by 50% of the ripple. In discontinuous conduction (SKIP = AGND, light-loaded), the output voltage will have a DC regulation level higher than the trip level by approximately 1.5% due to slope compensation.
Note 4: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, V
BST
= 5V,
and a 250pF capacitor connected from DH to LX. Actual in-circuit times may differ due to MOSFET switching speeds.
Note 5: Specifications to -40°C are guaranteed by design, not production tested.
__________________________________________Typical Operating Characteristics
(Circuit of Figure 1, components from Table 1, VIN= +15V, SKIP = AGND, TON = unconnected, TA= +25°C, unless otherwise noted.)
CONDITIONS
Measured at FB with respect to error comparator threshold, falling edge
%-8 -4PGOOD Trip Threshold
I
SINK
= 1mA V0.4PGOOD Output Low Voltage
High state, forced to 5.5V µA1PGOOD Leakage Current
UNITMIN TYP MAXPARAMETER
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, 4A components from Table 1, V+ = +15V, V
CC
= VDD= +5V, SKIP = AGND, TA= -40°C to +85°C, unless other-
wise noted.) (Notes 1, 5)
EFFICIENCY vs. LOAD CURRENT
(4A COMPONENTS, V
100
VIN = 7V
90
= 2.5V, 300kHz)
OUT
MAX1714B-01
EFFICIENCY vs. LOAD CURRENT
(8A COMPONENTS, V
100
90
= 1.6V, 300kHz)
OUT
VIN = 7V
MAX1714B-02
EFFICIENCY vs. LOAD CURRENT
(1.5A COMPONENTS, V
TON = GND, 600kHz)
100
VIN = 5V
90
OUT
= 2.5V,
MAX1714B-03
80
EFFICIENCY (%)
70
60
0.01 1010.1
VIN = 12V
LOAD CURRENT (A)
VIN = 20V
80
EFFICIENCY (%)
70
60
0.01 1010.1
VIN = 12V
LOAD CURRENT (A)
VIN = 20V
80
EFFICIENCY (%)
70
60
0.01 1010.1 LOAD CURRENT (A)
MAX1714
High-Speed Step-Down Controller for Notebook Computers
6 _______________________________________________________________________________________
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, components from Table 1, VIN= +15V, SKIP = AGND, TON = unconnected, TA= +25°C, unless otherwise noted.)
0
2
1
3
4
5
6
7
8
9
0105 15202530
INDUCTOR CURRENT PEAKS AND VALLEYS
vs. INPUT VOLTAGE (4A COMPONENTS,
AT CURRENT-LIMIT TRIP POINT)
MAX1714B-09
INPUT VOLTAGE (V)
INDUCTOR CURRENT (A)
I
PEAK
I
VALLEY
0
200
400
600
800
0 10203051525
NO-LOAD SUPPLY CURRENT
(4A COMPONENTS, SKIP MODE, 300kHz)
MAX1714B-10
INPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
I
CC
I
IN
I
DD
10
8
0
0 5 20 30
NO-LOAD SUPPLY CURRENT vs.
INPUT VOLTAGE
(4A COMPONENTS, PWM MODE, 300kHz)
4
6
2
MAX1714B-11
INPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
10 15 25
I
CC
I
DD
I
IN
0
200
100
400
300
500
600
4.0 5.04.5 5.5 6.0
NO-LOAD SUPPLY CURRENT vs. INPUT
VOLTAGE (1.5A COMPONENTS,
SKIP MODE, V
OUT
= 2.5V, 600kHz)
MAX1714B-12
VCC, VDD, VIN INPUT VOLTAGE (V)
SUPPLY CURRENT (µA)
I
CC
I
DD
I
IN
0
12
10
2
4
8
6
I
OUT
AT CURRENT LIMIT vs.
TEMPERATURE
(4A COMPONENTS, V
OUT =
2.5V)
MAX1714B-07
TEMPERATURE (°C)
OUTPUT CURRENT (A)
-40
20 40-20 0 60 80
V
ILIM
= 1V
V
ILIM
= 0.5V
0
200
100
300
400
500
600
700
0105 15202530
CONTINUOUS TO DISCONTINUOUS INDUCTOR
CURRENT POINT vs. INPUT VOLTAGE
(4A COMPONENTS, V
OUT
= 2.5V)
MAX1714B-08
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
300
0
0.01 1010.1
FREQUENCY vs. LOAD CURRENT (4A COMPONENTS, V
OUT
= 2.5V)
100
50
250
200
350
150
MAX1714B-04
LOAD CURRENT (A)
FREQUENCY (kHz)
VIN = 7V, 15V, PWM MODE
VIN = 15V SKIP MODE
VIN = 7V SKIP MODE
280
290
300
310
320
FREQUENCY vs. INPUT VOLTAGE
(4A COMPONENTS, V
OUT
= 2.5V, I
OUT
= 1A)
MAX1714B-05
INPUT VOLTAGE (V)
FREQUENCY (kHz)
0
10 15520
3025
TEMPERATURE (°C)
FREQUENCY (kHz)
300
310
305
320
315
330
325
FREQUENCY vs. TEMPERATURE
(4A COMPONENTS, V
OUT
= 2.5V)
MAX1714B-06
-40
20 40-20 0 60 80
I
OUT
= 4A
I
OUT
= 1A
C
B
A
A = V
OUT
, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 2A/div C = DL, 10V/div
10µs/div
LOAD-TRANSIENT RESPONSE
(4A COMPONENTS, V
OUT
= 2.5V, 300kHz)
MAX1714B-13
C
B
A
A = V
OUT
, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div
10µs/div
LOAD-TRANSIENT RESPONSE
(8A COMPONENTS, V
OUT
= 1.6V, 300kHz)
MAX1714B-14
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
_______________________________________________________________________________________ 7
_____________________________Typical Operating Characteristics (continued)
(Circuit of Figure 1, components from Table 1, VIN= +15V, SKIP = AGND, TON = unconnected, TA= +25°C, unless otherwise noted.)
C
B
A
A = V
OUT
, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div
500µs/div
START-UP WAVEFORM
(4A COMPONENTS, I
OUT
= 4A, ACTIVE LOAD,
V
OUT
= 2.5V, 300kHz)
MAX1714B-16
C
B
A
A = V
OUT
, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div
200µs/div
OUTPUT OVERLOAD WAVEFORM
(4A COMPONENTS, V
OUT
= 2.5V, 300kHz)
MAX1714B-17
OUTPUT UNDERVOLTAGE PROTECTION THRESHOLD
C
B
A
A = V
OUT
, 1V/div B = INDUCTOR CURRENT, 5A/div C = DL, 5V/div
50µs/div
SHUTDOWN WAVEFORM
(4A COMPONENTS, V
OUT
= 2.5V, 300kHz)
MAX1714B-18
C
B
A
A = V
OUT
, AC-COUPLED, 100mV/div B = INDUCTOR CURRENT, 1A/div C = DL, 5V/div
5µs/div
LOAD-TRANSIENT RESPONSE
(1.5A COMPONENTS, V
IN
= 5V,
V
OUT
= 2.5V, 600kHz)
MAX1714B-15
PIN
MAX1714
High-Speed Step-Down Controller for Notebook Computers
8 _______________________________________________________________________________________
Pin Description
Analog and Power Ground. AGND and PGND connect together internally.GND
No Connection. These pins are not connected to any internal circuitry. Connect N.C. pins to the ground plane to enhance thermal conductivity.
N.C.
2, 9,
11
Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 6% below the normal regulation point or during soft-start. PGOOD is high impedance when the output is in regulation and the soft-start circuit has terminated.
PGOOD10
High-Side Gate Driver Output. Swings from LX to BST.DH1
Current-Limit Threshold Adjustment. Connect ILIM to VCCfor 100mV current-limit threshold. For an adjustable threshold, connect an external voltage source to ILIM, or use a two-resis­tor divider from REF to AGND. The external adjustment range of 0.5V to 2.0V corresponds to a current-limit threshold of 50mV to 200mV.
ILIM6
+2.0V Reference Voltage Output. Bypass to AGND with 0.22µF (minimum) capacitor. Can supply 50µA for external loads.
REF7
Analog Ground.AGND8
Shutdown Control Input. Drive SHDN to AGND to force the MAX1714 into shutdown. Drive or connect to V
CC
for normal operation. A rising edge on SHDN clears the fault latch.
SHDN
3
Feedback Input. Connect to AGND for a +2.5V fixed output or to VCCfor a +3.3V fixed output, or connect FB to a resistor divider from OUT for an adjustable output.
FB4
PIN
Output Voltage Connection. Connect directly to the junction of the external and output fil­ter capacitors. OUT senses the output voltage to determine the on-time and also serves as the feedback input in fixed-output modes.
OUT5
FUNCTIONNAME
Low-Side Gate-Driver Output. Swings from PGND to VDD. DL13
Supply Input for the DL Gate Drive. Connect to the system supply voltage, +4.5V to +5.5V. Bypass to PGND with a 1µF (min) ceramic capacitor.
V
DD
14
Analog-Supply Input. Connect to the system supply voltage, +4.5V to +5.5V, with a series 20resistor. Bypass to AGND with a 1µF (min) ceramic capacitor.
V
CC
15
On-Time Selection-Control Input. This is a four-level input used to determine DH on-time. Connect to AGND, REF, or VCC, or leave TON unconnected to set the following switching frequencies: AGND = 600kHz, REF = 450kHz, floating = 300kHz, and VCC= 200kHz.
TON16
Battery Voltage Sense Connection. Connect to input power source. V+ is used only to set the PWM one-shot timing.
V+17
Pulse-Skipping Control Input. Connect to VCCfor low-noise forced-PWM mode. Connect to AGND to enable pulse-skipping operation.
SKIP
18
Boost Flying-Capacitor Connection. Connect to an external capacitor and diode according to the Standard Application Circuit (Figure 1). See MOSFET Gate Drivers (DH, DL) section.
BST19
External Inductor Connection. Connect LX to the switched side of the inductor. LX serves as the lower supply rail for the DH high-side gate driver. LX is also the positive input to the current-limit comparator.
LX20
8
7
1
5
6
2
3
4
9
10
11
12
13
14
15
16
Power Ground. Connect directly to the low-side MOSFET’s source. Serves as the negative input of the current-limit comparator.
PGND12
MAX1714A MAX1714B
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
_______________________________________________________________________________________ 9
Figure 1. Standard Application Circuit
Standard Application Circuit
The standard application circuit (Figure 1) generates a low-voltage rail for general-purpose use in a notebook computer (I/O supply, fixed CPU core supply, DRAM supply). This DC-DC converter steps down a battery or AC adapter voltage to voltages from 1.0V to 5.5V with high efficiency and accuracy.
See Table 1 for a list of component selections for com­mon applications. Table 2 lists component manufacturers.
Detailed Description
The MAX1714 buck controller is targeted for low-voltage power supplies for notebook computers. Maxim‘s propri­etary Quick-PWM pulse-width modulator in the MAX1714 is specifically designed for handling fast load steps while maintaining a relatively constant operating fre­quency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circum­vents the poor load-transient timing problems of fixed­frequency current-mode PWMs while also avoiding the problems caused by widely varying switching frequen­cies in conventional constant-on-time and constant-off­time PWM schemes.
V
IN
4.5V TO 28V
+5V
BIAS SUPPLY
ON/OFF
CONTROL
LOW-NOISE
CONTROL
C5
4.7µF
V
CC
V+
SHDN
SKIP
R1
20
MAX1714
V
DD
BST
DH
LX
C6
3.3µF
C1
D2 CMPSH-3
Q1
C7
0.1µF
L1
V
OUT
C2
PGND
(GND)
TON
REF
C4
0.22µF
AGND (GND)
ILIM
+5V ( ) = ARE FOR THE MAX1714B ONLY. NOTE: IN THE MAX 1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN.
PGOOD
OUT
DL
FB
+5V
R2 100k
POWER-GOOD INDICATOR
D1
Q2
MAX1714
+5V Bias Supply (VCCand VDD)
The MAX1714 requires an external +5V bias supply in addition to the battery. Typically, this +5V bias supply is the notebook’s 95% efficient +5V system supply. Keeping the bias supply external to the IC improves effi­ciency and eliminates the cost associated with the +5V linear regulator that would otherwise be needed to sup-
ply the PWM circuit and gate drivers. If stand-alone capability is needed, the +5V supply can be generated with an external linear regulator such as the MAX1615.
The battery and +5V bias inputs can be tied together if the input source is a fixed +4.5V to +5.5V supply. If the +5V bias supply is powered up prior to the battery sup­ply, the enable signal (SHDN) must be delayed until the battery voltage is present in order to ensure startup. The +5V bias supply must provide VCCand gate-drive power, so the maximum current drawn is:
I
BIAS
= ICC+ f (QG1+ QG2) = 5mA to 30mA (typ)
where ICCis 600µA typical, f is the switching frequency, and QG1and QG2are the MOSFET data sheet total gate-charge specification limits at VGS= 5V.
Free-Running, Constant-On-Time PWM
Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixed-fre­quency, constant-on-time current-mode type with voltage feed-forward (Figure 2). This architecture relies on the out­put filter capacitor’s ESR to act as the current-sense resis­tor, so the output ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose period is inversely proportional to input voltage and direct­ly proportional to output voltage. Another one-shot sets a minimum off-time (400ns typical). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the current-limit threshold, and the mini­mum off-time one-shot has timed out.
High-Speed Step-Down Controller for Notebook Computers
10 ______________________________________________________________________________________
Table 1. Component Selection for Standard Applications
Table 2. Component Suppliers
4.5V to 5.5V7V to 20V7V to 20V
Input Range
100µF, 10V Sanyo POSCAP 10TPA100M
(2) 470µF 6V Kemet T510X477108M006AS
470µF, 6V Kemet T510X477108M006AS
C2 Output Capacitor
100µF, 10V Sanyo POSCAP 10TPA100M
(2) 10µF, 25V Taiyo Yuden TMK432BJ106KM
10µF, 25V Taiyo Yuden TMK432BJ106KM
C1 Input Capacitor
3.3µH Coiltronics UP1B-3R3
1.5µH Sumida CEP1251R5MC
6.8µH Coilcraft DO3316P-682
L1 Inductor
Motorola MBR0520LT1Motorola MBRS340T3Nihon EP10QY03D2 Rectifier
International Rectifier 1/2 IRF7301
Fairchild Semiconductor FDS6670A
Fairchild Semiconductor 1/2 FDS6982A
Q2 Low-Side MOSFET
International Rectifier 1/2 IRF7301
International Rectifier IRF7811
Fairchild Semiconductor 1/2 FDS6982A
Q1 High-Side MOSFET
600kHz300kHz300kHz
Frequency
2.5V AT 1.5A1.6V AT 8A2.5V AT 4ACOMPONENT
[1] 602-994-6430602-303-5454Motorola
[1] 408-986-1442408-986-0424Kemet
[1] 408-721-1635408-822-2181Fairchild
[1] 561-241-9339561-241-7876Coiltronics
[1] 847-639-1469847-639-6400Coilcraft
[1] 516-435-1824516-435-1110Central Semiconductor
[1] 803-626-3123803-946-0690AVX
FACTORY FAX
[Country Code]
USA PHONEMANUFACTURER
[1] 714-960-6492714-969-2491Matsuo
[1] 310-322-3332310-322-3331International Rectifier
[1] 408-573-4159408-573-4150Taiyo Yuden
[1] 603-224-1430603-224-1961Sprague
[1] 408-970-3950
408-988-8000 800-554-5565
Siliconix
[81] 7-2070-1174619-661-6835Sanyo
[81] 3-3494-7414805-867-2555*NIEC (Nihon)
[1] 814-238-0490
814-237-1431 800-831-9172
Murata
[81] 3-3607-5144847-956-0666Sumida
[1] 847-390-4405847-390-4461TDK
*Distributor
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 11
On-Time One-Shot (TON)
The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. The high-side switch on-time is inversely proportional to the battery voltage as measured by the V+ input, and proportional to the output voltage. This algorithm results in a nearly constant switching frequency despite the lack of a fixed-
frequency clock generator. The benefits of a constant switching frequency are twofold: first, the frequency can be selected to avoid noise-sensitive regions such as the 455kHz IF band; second, the inductor ripple-current operating point remains relatively constant, resulting in easy design methodology and predictable output volt­age ripple.
On-Time = K (V
OUT
+ 0.075V) / V
IN
Figure 2. MAX1714 Functional Diagram
IN
2V TO 28V
TON
SKIP
SHDN
-6%
TRIG
REF
V+
ON-TIME
COMPUTE
TON
TON
Q
1-SHOT
MAX1714A ONLY
REF
+12%
FROM
OUT
REF
ERROR
AMP
REF
-30%
Q
TOFF
1-SHOT
S
R
Q
TRIG
S
R
CURRENT
LIMIT
Q
x2
Σ
I
LIM
MAX1714
9R
R
ZERO CROSSING
(MAX1714B ONLY)
CHIP
SUPPLY
BST
DH
V
PGND
(GND)
OUT
V
+5V
LX
OUTPUT
+5V
DD
DL
+5V
CC
PGOOD
S1
S2 TIMER
Q
OVP/UVLO
LATCH
FB
NOTE: IN THE MAX1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN.
FEEDBACK
MUX
(SEE FIGURE 9)
2V
REF
REF
(GND) AGND
( ) ARE FOR THE MAX1714B ONLY.
MAX1714
High-Speed Step-Down Controller for Notebook Computers
12 ______________________________________________________________________________________
where K is set by the TON pin-strap connection and
0.075V is an approximation to accommodate for the expected drop across the low-side MOSFET switch. One-shot timing error increases for the shorter on-time settings due to fixed propagation delays; it is approxi­mately ±12.5% at 600kHz and 450kHz, and ±10% at the two slower settings. This translates to reduced switching­frequency accuracy at higher frequencies (Table 5). Switching frequency increases as a function of load cur­rent due to the increasing drop across the low-side MOSFET, which causes a faster inductor-current dis­charge ramp. The on-times guaranteed in the Electrical Characteristics are influenced by switching delays in the external high-side power MOSFET.
Two external factors that influence switching-frequency accuracy are resistive drops in the two conduction loops (including inductor and PC board resistance) and the dead-time effect. These effects are the largest contribu­tors to the change of frequency with changing load cur­rent. The dead-time effect increases the effective on-time, reducing the switching frequency as one or both dead times are added to the effective on-time. It occurs only in PWM mode (SKIP = high) when the induc­tor current reverses at light or negative load currents. With reversed inductor current, the inductor’s EMF caus­es LX to go high earlier than normal, extending the on­time by a period equal to the low-to-high dead time.
For loads above the critical conduction point, the actual switching frequency is:
where V
DROP1
is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PC board resistances; V
DROP2
is
the sum of the resistances in the charging path, and t
ON
is the on-time calculated by the MAX1714.
Automatic Pulse-Skipping Switchover
In skip mode (SKIP low), an inherent automatic switchover to PFM takes place at light loads. This switchover is effected by a comparator that truncates the low-side switch on-time at the inductor current’s zero crossing. This mechanism causes the threshold between pulse-skipping PFM and nonskipping PWM operation to coincide with the boundary between continuous and dis­continuous inductor-current operation (also known as the “critical conduction” point; see the Continuous to Discontinuous Inductor Current Point vs. Input Voltage graph in the Typical Operating Characteristics). In low-
duty-cycle applications, this threshold is relatively con­stant, with only a minor dependence on battery voltage.
where K is the on-time scale factor (Table 5). The load­current level at which PFM/PWM crossover occurs, I
LOAD(SKIP)
, is equal to 1/2 the peak-to-peak ripple cur­rent, which is a function of the inductor value (Figure 3). For example, in the standard application circuit with K = 3.3µs (Table 5), V
OUT
= 2.5V, VIN= 15V, and L =
6.8µH, switchover to pulse-skipping operation occurs at I
LOAD
= 0.51A or about 1/8 full load. The crossover point occurs at an even lower value if a swinging (soft-satura­tion) inductor is used.
The switching waveforms may appear noisy and asyn­chronous when light loading causes pulse-skipping operation, but this is a normal operating condition that results in high light-load efficiency. Trade-offs in PFM noise vs. light-load efficiency are made by varying the inductor value. Generally, low inductor values produce a broader efficiency vs. load curve, while higher values result in higher full-load efficiency (assuming that the coil resistance remains fixed) and less output voltage ripple. Penalties for using higher inductor values include larger physical size and degraded load-transient response (especially at low input voltage levels).
DC output accuracy specifications refer to the error-com­parator threshold of the error comparator. When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the trip level by 50% of the ripple. In discontinuous conduction (SKIP = AGND, light-loaded), the output voltage will have a DC regulation level higher than the error-comparator thresh­old by approximately 1.5% due to slope compensation.
Forced-PWM Mode (
SKIP
= High)
The low-noise forced-PWM mode (SKIP = high) disables the zero-crossing comparator, which controls the low­side switch on-time. This causes the low-side gate-drive waveform to become the complement of the high-side gate-drive waveform. This in turn causes the inductor current to reverse at light loads while DH maintains a duty factor of V
OUT/VIN
. The benefit of forced-PWM mode is to keep the switching frequency fairly constant, but it comes at a cost: the no-load battery current can be 10mA to 40mA, depending on the external MOSFETs.
Forced-PWM mode is most useful for reducing audio­frequency noise, improving load-transient response, pro­viding sink-current capability for dynamic output voltage adjustment, and improving the cross-regulation of
I
KV
2L
V-V
V
LOAD(SKIP)
OUT IN OUT
IN
f
VV
tV V
OUT DROP
ON IN DROP
=
+
+
()
1
2
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 13
multiple-output applications that use a flyback trans­former or coupled inductor.
Current-Limit Circuit (ILIM)
The current-limit circuit employs a unique “valley” cur­rent-sensing algorithm that uses the on-state resistance of the low-side MOSFET as a current-sensing element (Figure 4). If the current-sense voltage (PGND - LX) is above the current-limit threshold, the PWM is not allowed to initiate a new cycle. The actual peak current is greater than the current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current­limit characteristic and maximum load capability are a function of the MOSFET on-resistance, inductor value, and battery voltage. The reward for this uncertainty is robust, lossless overcurrent sensing. When combined with the UVP protection circuit, this current-limit method is effective in almost every circumstance.
There is also a negative current limit that prevents excessive reverse inductor currents when V
OUT
is sink­ing current. The negative current-limit threshold is set to approximately 120% of the positive current limit, and therefore tracks the positive current limit when ILIM is adjusted.
The current-limit threshold is adjusted with an external resistor-divider at ILIM. A 1µA min divider current is rec­ommended. The current-limit threshold adjustment range is from 50mV to 200mV. In the adjustable mode, the current-limit threshold voltage is precisely 1/10 the voltage seen at ILIM. The threshold defaults to 100mV when ILIM is connected to VCC. The logic threshold for switchover to the 100mV default value is approximately VCC- 1V.
The adjustable current limit accommodates MOSFETs with a wide range of on-resistance characteristics (see Design Procedure).
Carefully observe the PC board layout guidelines to ensure that noise and DC errors don’t corrupt the cur­rent-sense signals seen by LX and PGND. Mount or place the IC close to the low-side MOSFET with short, direct traces, making a Kelvin sense connection to the source and drain terminals.
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving moder­ate-sized high-side, and larger low-side power MOSFETs. This is consistent with the low duty factor seen in the notebook environment, where a large V
BATT
-
V
OUT
differential exists. An adaptive dead-time circuit monitors the DL output and prevents the high-side FET from turning on until DL is fully off. There must be a low­resistance, low-inductance path from the DL driver to the MOSFET gate for the adaptive dead-time circuit to work properly; otherwise, the sense circuitry in the MAX1714 will interpret the MOSFET gate as “off” while there is actually still charge left on the gate. Use very short, wide traces measuring no more than 20 squares (50 to 100 mils wide if the MOSFET is 1 inch from the MAX1714).
The dead time at the other edge (DH turning off) is determined by a fixed 35ns (typical) internal delay.
The internal pull-down transistor that drives DL low is robust, with a 0.5typical on-resistance. This helps pre­vent DL from being pulled up during the fast rise-time of the inductor node, due to capacitive coupling from the drain to the gate of the low-side synchronous-rectifier MOSFET. However, for high-current applications, you might still encounter some combinations of high- and low-side FETs that will cause excessive gate-drain cou­pling, which can lead to efficiency-killing, EMI-producing shoot-through currents. This is often remedied by adding a resistor in series with BST, which increases the turn-on time of the high-side FET without degrading the turn-off time (Figure 5).
Figure 3. Pulse-Skipping/Discontinuous Crossover Point
Figure 4. ‘‘Valley’’ Current-Limit Threshold Point
i
V
BATT -VOUT
=
t
INDUCTOR CURRENT
ON-TIME0 TIME
L
-I
PEAK
I
= I
/2
LOAD
PEAK
-I
PEAK
I
LOAD
I
LIMIT
INDUCTOR CURRENT
0 TIME
MAX1714
High-Speed Step-Down Controller for Notebook Computers
14 ______________________________________________________________________________________
POR, UVLO, and Soft-Start
Power-on reset (POR) occurs when VCCrises above approximately 2V, resetting the fault latch and soft-start counter, and preparing the PWM for operation. V
CC
undervoltage lockout (UVLO) circuitry inhibits switching and forces the DL gate driver high (to enforce output overvoltage protection) until VCCrises above 4.2V, whereupon an internal digital soft-start timer begins to ramp up the maximum allowed current limit. The ramp occurs in five steps: 20%, 40%, 60%, 80%, and 100%; 100% current is available after 1.7ms ±50%.
A continuously adjustable analog soft-start function can be realized by adding a capacitor in parallel with the ILIM resistor. This soft-start method requires a minimum interval between power-down and power-up to dis­charge the capacitor.
Power-Good Output (PGOOD)
The output voltage is continuously monitored for under­voltage by the PGOOD comparator. In shutdown, standby, and soft-start, PGOOD is actively held low. After digital soft-start has terminated, PGOOD is released if the digital output is within 6% of the error­comparator threshold. The PGOOD output is a true open-drain type with no parasitic ESD diodes. Note that the PGOOD undervoltage detector is completely inde­pendent of the output UVP fault detector.
Output Overvoltage Protection
The overvoltage protection (OVP) circuit is available in the MAX1714A only, and is designed to protect against a shorted high-side MOSFET by drawing high current and blowing the battery fuse. The output voltage is con­tinuously monitored for overvoltage. If the output is more than 12.5% above the trip level of the error amplifier, overvoltage protection (OVP) is triggered and the circuit shuts down. The DL low-side gate-driver output is then latched high until SHDN is toggled or VCCpower is
cycled below 1V. This action turns on the synchronous­rectifier MOSFET with 100% duty and, in turn, rapidly discharges the output filter capacitor and forces the out­put to ground. If the condition that caused the overvolt­age (such as a shorted high-side MOSFET) persists, the battery fuse will blow. DL is also kept high continuously when VCCUVLO is active, as well as in shutdown mode (Table 3).
Note that DL latching high causes the output voltage to go slightly negative, due to energy stored in the output LC tank circuit when OVP activates. If the load can’t tol­erate being forced to a negative voltage, it may be desir­able to place a power Schottky diode across the output to act as a reverse-polarity clamp.
Overvoltage protection can be defeated using the no­fault test mode (see No-Fault Test Mode section).
Output Undervoltage Protection
The output undervoltage protection (OVP) function is similar to foldback current limiting, but employs a timer rather than a variable current limit. If the MAX1714 out­put voltage is under 70% of the nominal value 20ms after coming out of shutdown, the PWM is latched off and won’t restart until VCCpower is cycled or SHDN is tog­gled. Under- voltage protection can be defeated using the no-fault test mode.
No-Fault Test Mode
The over/undervoltage protection features can compli­cate the process of debugging prototype breadboards, since there are (at most) a few milliseconds in which to determine what went wrong. Therefore, a test mode is provided to totally disable the OVP, UVP, and thermal shutdown features, and clear the fault latch if it has been set. The PWM operates as if SKIP were grounded (PFM/PWM mode).
The no-fault test mode is entered by sinking 1.5mA from SKIP through an external negative voltage source in series with a resistor (Figure 6). SKIP is clamped to AGND with a silicon diode, so choose a resistor value of approximately (V
FORCE
- 0.65V) / 1.5mA.
Design Procedure
Component selection for the MAX1714 is primarily dic­tated by the following four criteria:
1) Input voltage range. The maximum value (V
IN(MAX)
) must accommodate the worst-case high AC adapter voltage. The minimum value (V
IN(MIN)
) must account for the lowest battery voltage after drops due to con­nectors, fuses, and battery selector switches. If there is a choice at all, lower input voltages result in better efficiency.
Figure 5. Reducing the Switching-Node Rise Time
+5V
5
BST
DH
LX
MAX1714
V
IN
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 15
2) Maximum load current. There are two values to con- sider. The peak load current (I
LOAD(MAX)
) determines the instantaneous component stresses and filtering requirements, and thus drives output capacitor selec­tion, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (I
LOAD
) determines the thermal stresses and thus dri­ves the selection of input capacitors, MOSFETs, and other critical heat-contributing components. Modern notebook CPUs generally exhibit:
I
LOAD
= I
LOAD(MAX)
· 80%
3) Switching frequency. This choice determines the basic trade-off between size and efficiency. The opti­mal frequency is largely a function of maximum input
voltage, due to MOSFET switching losses that are proportional to frequency and V
IN
2
. The optimum fre­quency is also a moving target, due to rapid improve­ments in MOSFET technology that are making higher frequencies more practical (Table 4).
4) Inductor operating point. This choice provides trade-offs between size vs. efficiency. Low inductor values cause large ripple currents, resulting in the smallest size, but poor efficiency and high output rip­ple. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor val­ues lower than this grant no further size-reduction benefit.
The MAX1714’s pulse-skipping algorithm initiates skip mode at the critical conduction point. So, the inductor operating point also determines the load-current value at which PFM/PWM switchover occurs.
These four factors impact the component selection process. Selecting components and calculating their effect on the MAX1714’s operation is best done with a spreadsheet. Using the formulas provided, calculate the LIR (the ratio of the inductor ripple current to the designed maximum load current) for both the minimum and maximum input voltages. Maintaining an LIR within a 20% to 50% range is prudent. The use of a spreadsheet allows quick evaluation of component selection.
Table 3. Operating Mode Truth Table
SHDN SKIP
DL MODE COMMENTS
0 X High Shutdown Low-power shutdown state. DL is forced to VDD, enforcing OVP. ICC< 1µA typ.
1
Below
AGND
Switching No Fault
Test mode with OVP, UVP, and thermal faults disabled and latches cleared. Otherwise normal operation, with automatic PWM/PFM switchover for pulse skipping at light loads (Figure 6).
1 V
CC
Switching
Run (PWM),
Low Noise
Low-noise operation with no automatic switchover. Fixed-frequency PWM action is forced regardless of load. Inductor current reverses at light load levels. Low noise, high I
Q
.
1 AGND Switching
Run
(PFM/PWM)
Normal operation with automatic PWM/PFM switchover for pulse skipping at light loads. Best light-load efficiency.
1 X High Fault
Fault latch has been set by OVP, output UVLO, or thermal shutdown. Device will remain in FAULT mode until V
CC
power is cycled, SKIP is forced below ground (Figure 6), or
SHDN is toggled.
Figure 6. Disabling Over/Undervoltage Protection (No-Fault Test Mode)
( ) ARE FOR THE MAX1714B ONLY.
MAX1714
APPROXIMATELY
-0.65V
SKIP
1.5mA
(GND) AGND
V
FORCE
Inductor Selection
The switching frequency and inductor operating point determine the inductor value as follows:
Example: I
LOAD(MAX)
= 8A, V
IN =
7V, V
OUT
= 1.5V,
f = 300kHz, 33% ripple current or LIR = 0.33.
Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak induc­tor current (I
PEAK
).
I
PEAK
= I
LOAD(MAX)
+ [(LIR / 2) · I
LOAD(MAX)
]
Most inductor manufacturers provide inductors in stan­dard values, such as 1.0µH, 1.5µH, 2.2µH, 3.3µH, etc. Also look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. For example, Sumida offers 3.1µH and 4.4µH in their CDRH125 series. If using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled induc­tance values.
Transient Response
The inductor ripple current also impacts transient­response performance, especially at low V
IN
- V
OUT
dif­ferentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step.
The amount of output sag is also a function of the maxi­mum duty factor, which can be calculated from the on­time and minimum off-time:
where
and minimum off-time = 400ns typ (see Table 5 for K val­ues).
The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as:
where I
PEAK
is the peak inductor current.
Setting the Current Limit
The minimum current-limit threshold must be high enough to support the maximum load current. The valley of the inductor current occurs at I
LOAD(MAX)
minus half
of the ripple current (Figure 4); therefore:
I
LIMIT(LOW)
> I
LOAD(MAX)
- (LIR / 2) I
LOAD(MAX)
where I
LIMIT(LOW)
equals minimum current-limit thresh-
old voltage divided by the R
DS(ON)
of Q2. For the MAX1714, the minimum current-limit threshold using the 100mV default setting is 90mV. Use the worst-case maxi­mum value for R
DS(ON)
from the MOSFET Q2 data sheet,
and add some margin for the rise in R
DS(ON)
with tem­perature. A good general rule is to allow 0.5% additional resistance for each °C of temperature rise.
Examining the 8A circuit example with a maximum R
DS(ON)
= 12mat high temperature reveals the follow-
ing:
I
LIMIT(LOW)
= 90mV / 12m= 7.5A
This 7.5A is greater than the valley current of 6.7A, so the circuit can easily deliver the full rated 8A using the default 100mV nominal ILIM threshold.
For an adjustable threshold, connect a two-resistor divider from REF to AGND, with ILIM connected at the center tap. The external adjustment range of 0.5V to 2.0V corresponds to a current-limit threshold of 50mV to 200mV. When adjusting the current limit, use 1% toler­ance resistors to prevent a significant increase of errors in
MAX1714
High-Speed Step-Down Controller for Notebook Computers
16 ______________________________________________________________________________________
Good operating point for compound buck designs or desktop circuits.
+5V input
600
TON = AGND
450
TON = REF
3-cell Li+ notebook
Useful in 3-cell systems for lighter loads than the CPU core or where size is key.
Considered mainstream by current standards.
4-cell Li+ notebook
300
TON = Float
200
TON = V
CC
4-cell Li+ notebook
Use for absolute best efficiency.
COMMENTS
TYPICAL
APPLICATION
FREQUENCY
(kHz)
Table 4. Frequency Selection Guidelines
DUTY
K (V + 0.075V) V
K (V + 0.075V) V + min off - time
OUT IN
OUT OUT
=
L =
L
V(V- V)
OUT IN OUT
⋅⋅ ⋅
V f LIR I
IN LOAD(MAX)
1.5V (7V -1.5V)
⋅⋅
7V 300kHz 0.33 8A
1.49 H==
µ
V
=
SAG
(I ) L
LOAD(MAX)
2 C DUTY (V - V )
⋅⋅
F IN(MIN) OUT
2
V
SOAR
LI
2C V
2
PEAK
OUT OUT
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 17
the current-limit tolerance. A 1µA minimum divider current is recommended.
Output Capacitor Selection
The output filter capacitor must have low enough effective series resistance (ESR) to meet output ripple and load­transient requirements, yet have high enough ESR to sat­isfy stability requirements. Also, the capacitance value must be high enough to absorb the inductor energy going from a full-load to no-load condition without tripping the overvoltage protection circuit.
In CPU V
CORE
converters and other applications where the output is subject to violent load transients, the output capacitor’s size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance:
In non-CPU applications, the output capacitor’s size depends on how much ESR is needed to maintain an acceptable level of output voltage ripple:
The actual microfarad capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, and other electrolytics).
When using low-capacity filter capacitors such as ceram­ic or polymer types, capacitor size is usually determined by the capacity needed to prevent V
SAG
and V
SOAR
from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (also, see the V
SAG
and V
SOAR
equa-
tion in the Transient Response section).
Output Capacitor Stability Considerations
Stability is determined by the value of the ESR zero rela­tive to the switching frequency. The point of instability is given by the following equation:
For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz.
Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz. In the design example used for inductor selec­tion, the ESR needed to support 50mVp-p ripple is 60mV/2.7A = 22m. Two 470µF/4V Kemet T510 low-ESR tantalum capacitors in parallel provide 22mmax ESR. Their typical combined ESR results in a zero at 27kHz, well within the bounds of stability.
Don’t put high-value ceramic capacitors directly across the feedback sense point without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic, unstable operation. However, it’s easy to add enough series resis­tance by placing the capacitors a couple of inches downstream from the feedback sense point, which should be as close as possible to the inductor (see the All-Ceramic-Capacitor Application section).
Unstable operation manifests itself in two related but dis­tinctly different ways: double-pulsing and fast-feedback loop instability.
Double-pulsing occurs due to noise on the output or because the ESR is so low that there isn’t enough volt­age ramp in the output voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 400ns minimum off-time period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability, which is caused by insufficient ESR.
Loop instability can result in oscillations at the output after line or load perturbations that can trip the overvolt­age protection latch or cause the output voltage to fall below the tolerance limit.
The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output voltage ripple envelope for over­shoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Don’t allow more than one cycle of ringing after the initial step-response under- or overshoot.
Input Capacitor Selection
The input capacitor must meet the ripple current requirement (I
RMS
) imposed by the switching currents. Nontantalum chemistries (ceramic, aluminum, or OS­CON) are preferred due to their resistance to power-up surge currents.
I I
VV-V
V
RMS LOAD
OUT IN OUT
IN
=
()
  
  
f
f
where f
1
2R C
ESR
ESR
ESR F
=
=
⋅⋅
π
π
R
Vp p
LIR I
ESR
LOAD MAX
-
()
R
V
I
ESR
DIP
LOAD MAX
()
MAX1714
High-Speed Step-Down Controller for Notebook Computers
18 ______________________________________________________________________________________
For optimal circuit reliability, choose a capacitor that has less than 10°C temperature rise at the peak ripple current.
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability (>5A) when using high-voltage (>20V) AC adapters. Low-cur­rent applications usually require less attention.
For maximum efficiency, choose a high-side MOSFET (Q1) that has conduction losses equal to the switching losses at the optimum battery voltage (15V). Check to ensure that the conduction losses at minimum input voltage don’t exceed the package thermal limits or violate the overall thermal budget. Check to ensure that conduction losses plus switching losses at the maxi- mum input voltage don’t exceed the package ratings or violate the overall thermal budget.
Choose a low-side MOSFET (Q2) that has the lowest possible R
DS(ON)
, comes in a moderate to small pack­age (i.e., SO-8), and is reasonably priced. Ensure that the MAX1714 DL gate driver can drive Q2; in other words, check that the gate isn’t pulled up by the high­side switch turn on, due to parasitic drain-to-gate capac­itance, causing cross-conduction problems. Switching losses aren’t an issue for the low-side MOSFET, since it’s a zero-voltage switched device when used in the buck topology.
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET, the worst-case power dissipation due to resistance occurs at minimum battery voltage:
PD(Q1 Resistive) = (V
OUT
/ V
IN(MIN)
) · I
LOAD
2
· R
DS(ON)
Generally, a small high-side MOSFET is desired to reduce switching losses at high input voltages. However, the R
DS(ON)
required to stay within package power-dissi­pation limits often limits how small the MOSFET can be. Again, the optimum occurs when the switching (AC) losses equal the conduction (R
DS(ON)
) losses. High-side switching losses don’t usually become an issue until the input is greater than approximately 15V.
Switching losses in the high-side MOSFET can become an insidious heat problem when maximum AC adapter voltages are applied, due to the squared term in the CV2F switching loss equation. If the high-side MOSFET you’ve chosen for adequate R
DS(ON)
at low battery volt­ages becomes extraordinarily hot when subjected to V
IN(MAX)
, you must reconsider your choice of MOSFET.
Calculating the power dissipation in Q1 due to switching losses is difficult, since it must allow for difficult-to-quanti-
fy factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PC board layout characteristics. The following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including a sanity check using a thermocouple mounted on Q1.
where C
RSS
is the reverse transfer capacitance of Q1
and I
GATE
is the peak gate-drive source/sink current (1A
typical).
For the low-side MOSFET, Q2, the worst-case power dis­sipation always occurs at maximum battery voltage:
PD(Q2) = (1 - V
OUT
/ V
IN(MAX)
) · I
LOAD
2
· R
DS(ON)
The absolute worst case for MOSFET power dissipation occurs under heavy overloads that are greater than I
LOAD(MAX)
but are not quite high enough to exceed the current limit and cause the fault latch to trip. To protect against this possibility, you must “overdesign” the circuit to tolerate I
LOAD
= I
LIMIT(HIGH)
+ [(LIR / 2) · I
LOAD(MAX)
],
where I
LIMIT(HIGH)
is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and on-resistance variation. This means that the MOSFETs must be very well heatsinked. If short-circuit protection without overload protection is enough, a nor­mal I
LOAD
value can be used for calculating component
stresses.
Choose a Schottky diode D1 having a forward voltage low enough to prevent the Q2 MOSFET body diode from turning on during the dead time. As a general rule, a diode having a DC current rating equal to 1/3 of the load current is sufficient. This diode is optional, and if efficien­cy isn’t critical it can be removed.
Application Issues
Dropout Performance
The output voltage adjust range for continuous-conduc­tion operation is restricted by the nonadjustable 500ns (max) minimum off-time one-shot. For best dropout per­formance, use the slowest (200kHz) on-time setting. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for on­and off-times. Manufacturing tolerances and internal propagation delays introduce an error to the TON K-fac­tor. This error is greater at higher frequencies (Table 5). Also, keep in mind that transient response performance of buck regulators operated close to dropout is poor,
PD(Q1 switching)
CV fI
RSS IN(MAX)2LOAD
=
⋅⋅
I
GATE
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 19
and bulk output capacitance must often be added (see the V
SAG
equation in Transient Response section).
Dropout Design Example: VIN= 3V min, V
OUT
= 2V,
f = 300kHz. The required duty is (V
OUT
+ VSW) / (VIN­VSW) = (2V + 0.1V) / (3.0V - 0.1V) = 72.4%. The worst­case on-time is (V
OUT
+ 0.075) / VIN· K = 2.075V / 3V ·
3.35µs-V · 90% = 2.08µs. The IC duty-factor limitation is:
which meets the required duty.
Remember to include inductor resistance and MOSFET on-state voltage drops (V
SW
) when doing worst-case
dropout duty-factor calculations.
All-Ceramic-Capacitor Application
Ceramic capacitors have advantages and disadvan­tages. They have ultra-low ESR, are noncombustible, are relatively small, and are nonpolarized. On the other hand, they’re expensive and brittle, and their ultra-low ESR characteristic can result in excessively high ESR zero frequencies (affecting stability). In addition, their rel­atively low capacitance value can cause output over­shoot when going abruptly from full-load to no-load conditions, unless there are some bulk tantalum or elec­trolytic capacitors in parallel to absorb the stored energy in the inductor. In some cases, there may be no room for electrolytics, creating a need for a DC-DC design that uses nothing but ceramics.
The all-ceramic-capacitor application of Figure 7 replaces the standard, typical tantalum output capacitors with ceramics in a 7A circuit. This design relies on hav­ing a minimum of 5mparasitic PC board trace resis­tance in series with the capacitor in order to reduce the ESR zero frequency. This small amount of resistance is easily obtained by locating the MAX1714 circuit 2 or 3 inches away from the CPU, and placing all the ceramic
DUTY
t
tt
2.08 s
2.08 s 500ns
80.6%,
ON(MIN)
ON(MIN) OFF(MAX)
=
+
=
+
=
µ
µ
Figure 7. All-Ceramic-Capacitor Application
Table 5. Approximate K-Factor Errors
TON
SETTING
(kHz)
APPROXIMATE
K-FACTOR
ERROR (%)
MIN V
IN
AT V
OUT
= 2V
(V)
200 ±10 2.6
300 ±10 2.9
450 ±12.5 3.2
600 ±12.5 3.6
K
FACTOR
(µs)
5
3.3
2.2
1.7
V
= 7V TO 24V*
IN
* FOR HIGHER MINIMUM INPUT VOLTAGE,
* LESS OUTPUT CAPACITANCE IS ACCEPTABLE.
ON/OFF
0.22µF
1µF
V+ V
SHDN
SKIP
REF
TON
20
ILIM
CC
MAX1714
( ) ARE FOR THE MAX1714B ONLY.
V
BST
PGND (GND)
AGND (GND)
OUT
DD
DH
0.1µF
LX
FB
DL
5
+5V
1µF
C1 = 2 x 10µF/25V TAIYO YUDEN (1812) (TMK432BJ106AM) C2 = 6 x 47µF/6.3V TAIYO YUDEN (1812) (JMK432BJ476MN) R1 + R2 = 5m MINIMUM OF PCB TRACE RESISTANCE (TOTAL)
C1
Q1
0.5µH
Q2
1k
R1
C2 CPU
R2
2.5V AT 7A
MAX1714
High-Speed Step-Down Controller for Notebook Computers
20 ______________________________________________________________________________________
capacitors close to the CPU. Resistance values higher than 5mjust improve the stability (which can be observed by examining the load-transient response characteristic as shown in the Typical Operating Characteristics). Avoid adding excess PC board trace resistance, as there’s an efficiency penalty; 5mis suffi­cient for a 7A circuit.
V
SOAR
determines the minimum output capacitance requirement. In this example, the switching frequency has been increased to 600kHz and the inductor value has been reduced to 0.5µH (compared to 300kHz and
1.5µH for the standard 8A circuit) in order to minimize the energy transferred from inductor to capacitor during load-step recovery. The overshoot must be calculated to avoid tripping the OVP latch. The efficiency penalty for operating at 600kHz is about 2% to 3%, depending on the input voltage.
An optional 1kresistor is placed in series with OUT. This resistor attenuates high-frequency noise in some boards, which can cause double pulsing.
Fixed Output Voltages
The MAX1714’s Dual Mode™ operation allows the selec­tion of common voltages without requiring external com­ponents (Figure 8). Connect FB to AGND for a fixed +2.5V output or to VCCfor a +3.3V output, or connect FB directly to OUT for a fixed +1.0V output.
Setting V
OUT
with a Resistor-Divider
The output voltage can be adjusted with a resistor­divider if desired (Figure 9). The equation for adjusting the output voltage is:
where VFBis 1.0V.
2-Stage (5V Powered) Notebook CPU
Buck Regulator
The most efficient and overall cost-effective solution for stepping down a high-voltage battery to a very low out­put voltage is to use a single-stage buck regulator that’s powered directly from the battery. However, there may be situations where the battery bus can’t be routed near the CPU, or where space constraints dictate the smallest possible local DC-DC converter. In such cases, the 5V powered circuit of Figure 10 may be appropriate. The reduced input voltage allows a higher switching frequen­cy and a much smaller inductor value.
PC Board Layout Guidelines
Careful PC board layout is critical to achieving low switching losses and clean, stable operation. The switch­ing power stage requires particular attention (Figure 11). If possible, mount all of the power components on the top side of the board with their ground terminals flush against one another. Follow these guidelines for good PC board layout:
• Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation.
• Connect AGND and PGND together close to the IC. For the MAX1714B, these grounds are connected internally to the GND pin. Carefully follow the ground­ing instructions under step 4 of the Layout Procedure.
• Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PC boards (2 oz vs. 1 oz) can enhance full-load efficiency by 1% or more. Correctly routing PC board traces is a difficult task that must be approached in terms of fractions of centimeters,
V V1
R1 R2
OUT FB
=+
 
 
Figure 8. Feedback Mux
Dual Mode is a trademark of Maxim Integrated Products.
R
1
2FC
ESR
OUT
OUT
TO ERROR AMP
FIXED
2.5V
MAX1714
FIXED
3.3V
FB
2V
0.2V
where a single milliohm of excess trace resistance causes a measurable efficiency penalty.
• LX and PGND connections to Q2 for current limiting must be made using Kelvin sense connections to guarantee the current-limit accuracy. With SO-8 MOSFETs, this is best done by routing power to the MOSFETs from outside using the top copper layer, while tying in PGND and LX inside (underneath) the SO-8 package.
• When trade-offs in trace lengths must be made, it’s preferable to allow the inductor charging path to be made longer than the discharge path. For example, it’s better to allow some extra distance between the input capacitors and the high-side MOSFET than to allow distance between the inductor and the low­side MOSFET or between the inductor and the out­put filter capacitor.
• Ensure that the OUT connection to C
OUT
is short and direct. However, in some cases it may be desirable to deliberately introduce some trace length between the OUT inductor node and the output filter capacitor (see the All-Ceramic-Capacitor Application section).
• Route high-speed switching nodes (BST, LX, DH, and DL) away from sensitive analog areas (REF, FB).
• Make all pin-strap control input connections (SKIP, ILIM, etc.) to AGND or V
CC
rather than PGND or VDD.
Layout Procedure
1) Place the power components first, with ground termi­nals adjacent (Q2 source, CIN-, COUT-, D1 anode). If possible, make all these connections on the top layer with wide, copper-filled areas.
2) Mount the controller IC adjacent to MOSFET Q2, preferably on the back side opposite Q2 in order to keep LX, PGND, and the DL gate-drive lines short and wide. The DL gate trace must be short and wide, measuring 10 to 20 squares (50 to 100 mils wide if the MOSFET is 1 inch from the controller IC).
3) Group the gate-drive components (BST diode and capacitor, VDDbypass capacitor) together near the controller IC.
4) Make the DC-DC controller ground connections as shown in Figure 11. This diagram can be viewed as having three separate ground planes: output ground, where all the high-power components go; the PGND plane, where the PGND pin and VDDbypass capaci­tor go; and an analog AGND plane, where sensitive analog components go. The analog ground plane and PGND plane must meet only at a single point directly beneath the IC. For the MAX1714B, this point should be the GND pin. These two planes are then connect­ed to the high-power output ground with a short con­nection from VDDcap/PGND to the source of the low-side MOSFET, Q2 (the middle of the star ground). This point must also be very close to the output capacitor ground terminal.
5) Connect the output power planes (V
CORE
and system ground planes) directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the CPU as is practical.
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 21
Figure 9. Setting V
OUT
with a Resistor-Divider
V
BATT
DH
V
MAX1714
DL
PGND
(GND)
OUT
FB
AGND
(GND)
R1
R2
( ) ARE FOR THE MAX1714B ONLY.
OUT
MAX1714
High-Speed Step-Down Controller for Notebook Computers
22 ______________________________________________________________________________________
Figure 10. 5V Powered, 7A CPU Buck Regulator
Pin Configurations
TOP VIEW
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
LX
BST
SKIP
V+FB
SHDN
N.C.
DH
TON
V
CC
V
DD
DLAGND
REF
ILIM
OUT
12
11
9
10
PGND
N.C.PGOOD
N.C.
MAX1714A
QSOP
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LX
BST
SKIP
V+OUT
FB
SHDN
DH
TON
V
CC
V
DD
DLGND
PGOOD
REF
ILIM
QSOP
MAX1714B
4.5V TO 5.5V
1µF
0.1µF
ON/OFF
1µF20
I
LIMVCC
SHDN
0.22µF
REF
V
CC
MAX1714
V+
V
DD
BST
DH
LX
DL
PGND
(GND)
FB
V
IN
C1 4 x 10µF/25V
IRF7805
0.5µH
IRF7805
V
L1
OUT
2.5V AT 7A
C2 3 x 470µF KEMET T510
(GND)
SKIP
OUT
AGND
( ) = ARE FOR THE MAX1714B ONLY. NOTE: IN THE MAX1714B, AGND AND PGND ARE INTERNALLY CONNECTED TO THE GND PIN.
100k
PGOOD
TON
MAX1714
High-Speed Step-Down Controller
for Notebook Computers
______________________________________________________________________________________ 23
Figure 11. Power-Stage PC Board Layout Example
ALL ANALOG GROUNDS CONNECT TO AGND ONLY
MAX1714
V
CC
REF
I
LIM
AGND
CONNECT AGND TO PGND BENEATH IC, 1 POINT ONLY. SPLIT ANALOG GND PLANE AS SHOWN.
NOTES: "STAR" GROUND IS USED. D1 IS DIRECTLY ACROSS Q2.
V
DD
VIA TO PGND NEAR Q2 SOURCE
VIA TO SOURCE OF Q2
VIA TO LX
V
BATT
CIN
Q1
D1 Q2
L1
GND IN
GND OUT
C
OUT
V
OUT
VIA TO OUT
+
NEAR C
OUT
INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE.
MAX1714
High-Speed Step-Down Controller for Notebook Computers
24 ______________________________________________________________________________________
Package Information
QSOP.EPS
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