MAXIM MAX17000 Technical data

General Description
The MAX17000 pulse-width modulation (PWM) con­troller provides a complete power solution for notebook DDR, DDR2, and DDR3 memory. It comprises a step­down controller, a source-sink LDO regulator, and a ref­erence buffer to generate the required VDDQ, VTT, and VTTR rails.
2.5V by an external resistor-divider. This output has 1% accuracy over line-and-load operating range.
The MAX17000 includes a ±2A source-sink LDO regu­lator for the memory termination VTT rail. This VTT regu­lator has a ±5mV deadband that either sources or sinks, ideal for the fast-changing load burst present in memory termination applications. This feature also reduces output capacitance requirements.
The VTTR reference buffer sources and sinks ±3mA, providing the reference voltage needed by the memory controller and devices on the memory bus.
The MAX17000 is available in a 24-pin, 4mm x 4mm, Thin QFN package.
Applications
Notebook Computers
DDR, DDR2, and DDR3 Memory Supplies
SSTL Memory Supplies
Features
o SMPS Regulator (VDDQ)
Quick-PWM with 100ns Load-Step Response Output Voltages—Preset 1.8V, 1.5V, or
Adjustable 1.0V to 2.5V
1% V
OUT
Accuracy Over Line and Load 26V Maximum Input Voltage Rating Accurate Valley Current-Limit Protection 200kHz to 600kHz Switching Frequency
o Source/Sink Linear Regulator (VTT)
±2A Peak Source/Sink Low-Output Capacitance Requirement Output Voltages-Preset VDDQ/2 or REFIN
Adjustable from 0.5V to 1.5V
o Low Quiescent Current Standby State o Soft-Start/Soft-Shutdown o SMPS Power-Good Window Comparator o VTT Power-Good Window Comparator o Selectable Overvoltage Protection o Undervoltage/Thermal Protections o ±3mA Reference Buffer (VTTR)
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
________________________________________________________________
Maxim Integrated Products
1
Pin Configuration
Ordering Information
19-4125; Rev 0; 5/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+
Denotes a lead-free package.
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
PART TEMP RANGE PIN-PACKAGE
MAX17000ETG+ -40°C to +85°C 24 Thin QFN
TOP VIEW
V
PGND1
AGND
SKIP
V
SHDN
19
DD
20
21
22
23
CC
24
1 2
OVP
LX
BST
1718 16 14 13
MAX17000ETG+
PGOOD1
THIN QFN
4mm x 4mm
DH
15
456
3
STDBY
PGOOD2
TONDLCSH
VTTS
VTTR
12
CSL
FB
11
REFIN
10
9
VTTI
VTT
8
PGND2
7
MAX17000
Complete DDR2 and DDR3 Memory Power-Management Solution
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TON to PGND1 .......................................................-0.3V to +28V
V
DD
to PGND1..........................................................-0.3V to +6V
V
CC
to VDD............................................................-0.3V to +0.3V
OVP to AGND ...........................................................-0.3V to +6V
SHDN, STDBY, SKIP to AGND.................................-0.3V to +6V
REFIN, FB, PGOOD1,
PGOOD2 to AGND ................................-0.3V to (V
CC
+ 0.3V)
CSH, CSL to AGND....................................-0.3V to (V
CC
+ 0.3V)
DL to PGND1..............................................-0.3V to (V
DD
+ 0.3V)
BST to PGND1...........................................................-1V to +34V
BST to LX..................................................................-0.3V to +6V
DH to LX....................................................-0.3V to (V
BST
+ 0.3V) BST to V
DD
.............................................................-0.3V to +26V
VTTI to PGND2 .........................................................-0.3V to +6V
VTT to PGND2 ............................................-0.3V to (V
TTI
+ 0.3V)
VTTS to AGND............................................-0.3V to (V
CC
+ 0.3V)
VTTR to AGND ..........................................-0.3V to (V
CSL
+ 0.3V)
PGND1, PGND2 to AGND.....................................-0.3V to +0.3V
Continuous Power Dissipation (T
A
= +70°C) 24-Pin, 4mm x 4mm Thin QFN
(derated 27.8mW/°C above +70°C) ..........................2222mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PWM CONTROLLER
Input Voltage Range
Output Voltage Range V
Load Regulation Error V
Line Regulation Error VDD = 4.5V to 5.5V, VIN = 4.5V to 26V 0.25 %
Soft-Start Ramp Time t
Soft-Stop Ramp Time t
Soft-Stop Threshold 25 mV
On-Time Accuracy (Note 2) t
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
V
CC
SSTART
SSTOP
V
IN
, V
CSL
CSL
ON
DD
VIN = 4.5V to 26V, SKIP = V
CSH
- V
CC
CSL
Rising edge of SHDN 1.4 2.1 ms Falling edge of SHDN 2.8 ms
V
= 12V,
IN
= 1.2V
V
CSL
326
4.5 5.5
FB = AGND 1.485 1.500 1.515
FB = V
CC
1.782 1.800 1.818Output Voltage Accuracy V
FB = Adj 0.99 1.000 1.01
1 2.7 V
= 0mV to 18mV, SKIP = V
R
= 96.75kΩ
TON
(600kHz), 167ns nominal
R
= 200kΩ (300kHz),
TON
333ns nominal
= 303.25kΩ
R
TON
(200kHz), 500ns nominal
CC
-15 +15
-10 +10
-15 +15
0.1 %
V
V
%
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
Minimum Off-Time t
Quie scent Supply Current (VDD) I
Quie scent Supply Current (VCC) I
Shutdown Supply C urrent
+ VCC)
(V
DD
TON Pin Shutdown Current I
LINEAR REGULATOR (VTT)
VTTI Input Voltage Range V
VTTI Supply Current I VTTI Shutdown Current SHDN = AGND, TA = +25°C 10 μA
REFIN Input Bias Current VTTI = 2.8V, REFIN = 1.4V, TA = +25°C -50 +50 nA
REFIN Range V
REFIN Disable Threshold
VTT Internal MOSFET
VTT Output-Accuracy Source Load
VTT Output-Accuracy Sink Load
VTT Load Regulation -50μA to -1A  I
VTT Line Regulation 1.0V  V
VTT Current Lim it
VTT Current-Limit Soft-Start Time With respect to internal VTT_EN signal 160 μs
VTT Discharge MOSFET OVP = VCC 16
VTTS Input Current TA = +25°C 0.1 1.0 μA
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OFF(MIN)
I
CC + IDD
TON
VTTI
REFIN
DD
CC
TTI
(Note 2) 250 350 ns FB forced above 1.0V, STDBY = AGND or
V
= +25°C
CC, TA
FB forced above 1.0V (SMPS, VTT, and VTTR blocks); STDBY = V
CC
FB forced above 1.0V (ultra-skip and VTTR blocks); STDBY = AGND
0.01 1.00 μA
2 4 mA
275 475 μA
SHDN = AGND, TA = +25°C 0.01 5 μA
SHDN = AGND, VIN = 26V, VDD = 0 or 5V,
= +25°C
T
A
0.01 1.00 μA
1.0 2.8 V
VTTI = 2.8V, REFIN = 1.4V, no load 10 50 μA
0.5 1.5 V
V
-
High-side on-resistance (source, I
= 0.1A)
VTT
Low-side on-resistance (sink, I
V
= 1V,
- 5mV) or
(V
REFIN
/2 - 5mV) to
(V
CSL
VTTS, VTT = VTTS
+ 5mV) or
(V
REFIN
/2 + 5mV) to
(V
CSL
VTTS, VTT = VTTS
2.8V, I
TTI
REFIN
= +50μA
I
VTT
V
= 0.5V to 1.5V,
REFIN
= +300mA
I
VTT
V
= 1V,
REFIN
= -50μA
I
VTT
V
= 0.5V to 1.5V,
REFIN
I
= -300mA
VTT
+50μA to +1A 13 17 mV/A
VTT
= ±100mA 1 mV
VTT
CC
0.3
0.12 0.25
= 0.1A) 0.18 0.36
VTT
-5 +5
-5 +5
V
-5
+5
Source 2 4
Sink -4 -2
mV
mV
A
MAX17000
Complete DDR2 and DDR3 Memory Power-Management Solution
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
REFERENCE BUFFER (VTTR)
VTTR Output Accuracy (Adj) REFIN to VTTR
VTTR Output Accuracy (Preset) V
VTTR Maximum Recommended Current
FAULT DETECTION (SMPS)
SMPS OVP and PGOOD1 Upper Trip Threshold
SMPS OVP and PGOOD1 Upper Trip Threshold Fault-Propagation Delay
SMPS Output Undervoltage Fault-Propagation Delay
SMPS PGOOD1 Lower Trip Threshold
PGOOD1 Lower Trip Threshold Propagat ion De la y
PGOOD1 Output Low Voltage I
PGOOD1 Leakage Current I
TON POR Threshold V
FAULT DETECTION (VTT)
PGOOD2 Upper Trip Threshold Hysteresis = 25mV 8 10 13 %
PGOOD2 Lower Trip Threshold Hysteresis = 25mV -13 -10 -8 %
PGOOD2 Propagation Del ay t
PGOOD2 Fault Latch Delay
PGOOD2 Output Low Voltage I
PGOOD2 Leakage Current I
FAULT DETECTION
Thermal-Shutdown Threshold T
VCC Undervoltage Lockout Threshold
CSL Discharge MOSFET OVP = V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
t
OVP
t
UVP
t
PGOOD1
PGOOD1
POR(IN)
PGOOD2
PGOOD2
SHDN
V
UVLO(VCC)
I
= ±1mA -10 +10
VTT
= ±3mA -20 +20
I
VTT
I
= ±1mA -10 +10
/2 to VTTR
CSL
Source/s ink 5 mA
FB forced 25mV above trip threshold 10 μs
Measured at FB, hystere si s = 25mV -12 -15 -18 %
FB forced 50mV below PGOOD1 trip threshold
= 3mA 0.4 V
SINK
FB = 1V (PGOOD1 high impedance), PGOOD1 forced to 5V, T
Ri sing edge, PWM disabled below this le vel; hysteresis = 200mV
VTTS forced 50mV beyond PGOOD2 trip threshold
VTTS forced 50mV beyond PGOOD2 trip threshold
= 3mA 0.4 V
SINK
VTTS = V PGOOD2 forced to 5V, T
Hysteresis = 15°C160 °C
Rising edge, IC disabled below this le ve l hysteresis = 200mV
(PGOOD2 high impedance),
REFIN
CC
VTT
= ±3mA -20 +20
I
VTT
12 15 18 %
200 μs
10 μs
= +25°C
A
3.0 V
10 μs
5 ms
= +25°C
A
3.8 4.1 4.4 V
16
mV
1 μA
1 μA
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS (continued)
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= 0°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.) (Note 1)
)
)
CURRENT LIMIT
Valley Current-Limit Threshold V
Current-Limit Threshold (Negative)
Current-Limit Threshold (Zero Crossing)
SMPS GATE DRIVERS
DH Gate Driver On-Resistance R
DL Gate Driver On-Resistance R
DH Gate Driver Source/ Sink Current
DL Gate Driver Source/ Sink Current
Dead Time t
Internal BST Switch On-Resistance
LX, BST Leakage Current
INPUTS AND OUTPUTS
Logic Input Threshold
Logic Input Current
Input Leakage Current CSH = 0 or VCC, TA = +25°C -1 +1 μA
Input Bias Current CSL = 0 or V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
V
I
DL(SRC
I
DL(SNK
LIMIT
NEG
V
ZX
DH
DL
I
DH
DEAD
R
BST
V
V
V
CSH
CSH
CSH
- V
- V
- V
CSL
, SKIP = V
CSL
CSL
CC
17 20 25 mV
-23 mV
1mV
BST - LX forced to 5V 1.5 5.0 Ω
DL high 1.5 5.0
DL low 0.6 3.0
DH forced to 2.5V, BST - LX forced to 5V 1 A
DL forced to 2.5V 1
DL forced to 2.5V 3
DL rising, TA = +25°C 10 25
DL falling, TA = +25°C 15 35
I
= 10mA,
BST
= 5V internal design target
V
DD
V
BST
T
= +25°C
A
= 26V, SHDN = AGND,
= V
LX
SHDN, STDBY, SKIP, OVP, rising edge hysteresis = 300mV/600mV (min/max)
SHDN, STDBY, SKIP = 0 or V
= +25°C
T
A
CC
CC
,
1.30 1.65 2.00 V
-1 +1 μA
4.5 Ω
0.001 20 μA
55 100 μA
Ω
A
ns
MAX17000
Complete DDR2 and DDR3 Memory Power-Management Solution
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= -40°C to +85°C, unless otherwise noted.)
(Note 1)
)
PWM CONTROLLER
Input Voltage Range
On-Time Accuracy (Note 2) t
Minimum Off-Time t
Quiescent Supply Current (VCC)I
LINEAR REGULATOR (VTT)
VTTI Input Voltage Range V
VTTI Supply Current I
REFIN Range V
REFIN Disable Threshold
VTT Internal MOSFET
VTT Load Regulation -50μA to -1A ≤ I
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS
V
IN
, V
V
CC
DD
FB = AGND 1.485 1.520
CSL
VIN = 4.5V to 26V, SKIP = V
CC
FB = V
CC
FB = Adj 0.990 1.020
R
= 96.75kΩ
TON
(600kHz), 167ns nominal
R
= 200kΩ
TON
(300kHz), 333ns nominal
= 303.25kΩ
R
TON
ON
V V
= 12V,
IN
CSL
= 1.2V
(200kHz), 500ns nominal
OFF(MIN
(Note 2) 350 ns
FB forced above 1.0V (PWM, VTT, and
CC
VTTR blocks); STDBY = V
FB forced above 1.0V (ultra-skip and
CC
VTTR blocks); STDBY = AGND
VTTI
VTTI
REFIN
VTTI = 2.8V, REFIN = 1.4V, no load 50 μA
H i g h- si d e on- r esi stance ( sour ce, I
Low-side on-resistance (sink, I
+50μA to +1A 17 mV/A
VTT
= 0.1A) 0.25
V T T
= 0.1A) 0.36
VTT
326
4.5 5.5
1.782 1.820Output Voltage Accuracy V
V
V
-15 +15
-10 +10
%
-15 +15
4mA
475 μA
1.0 2.8 V
0.5 1.5 V
V
-
CC
0.3
V
Ω
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
_______________________________________________________________________________________ 7
ELECTRICAL CHARACTERISTICS (continued)
(VIN= 12V, V
CC
= V
DD
= V
SHDN
= V
REFIN
= 5V, V
CSL
= 1.8V, STDBY = SKIP = AGND, TA= -40°C to +85°C, unless otherwise noted.)
(Note 1)
Note 1: Limits are 100% production tested at TA= +25°C. Maximum and minimum limits over temperature are guaranteed by design
and characterization.
Note 2: On-time and off-time specifications are measured from 50% point at the DH pin with LX = GND, V
BST
= 5V, and a 250pF
capacitor connected from DH to LX. Actual in-circuit times might differ due to MOSFET switching speeds.
REFERENCE BUFFER (VTTR)
VTTR Output Accuracy (Adj) REFIN to VTTR
VTTR Output Accuracy (Preset) V
FAULT DETECTION (SMPS)
PGOOD1 Output Low Voltage I
FAULT DETECTION (VTT)
PGOOD2 Output Low Voltage I
FAULT DETECTION
VCC Undervoltage-Lockout Threshold
CURRENT LIMIT
Valley Current-Limit Threshold V
SMPS GATE DRIVERS
DH Gate Driver On-Resistance R
DL Gate Driver On-Resistance R
Dead Time t
INPUTS AND OUTPUTS
Logic Input Threshold
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS
V
UVLO(VCC)
LIMIT VCSH
DEAD
DH
DL
/2 to VTTR
CSL
=3mA 0.4 V
SINK
=3mA 0.4 V
SINK
Rising edge, IC disabled below this le ve l; hysteresis = 200mV
- V
CSL
BST - LX forced to 5V 5
DL high 5
DL low 3
DL ris ing 10
DL fal ling 15
SHDN, STDBY, SKIP OVP, rising edge hysteresis = 300mV/600mV (min/ma x)
I
= ±1mA -10 +10
VTT
= ±3mA -20 +20
I
VTT
I
= ±1mA -10 +10
VTT
= ±3mA -20 +20
I
VTT
4.0 4.4 V
15 25 mV
1.3 2 V
mV
mV
ns
MAX17000
Complete DDR2 and DDR3 Memory Power-Management Solution
8 _______________________________________________________________________________________
Typical Operating Characteristics
(MAX17000 Circuit of Figure 1, V
IN
= 12V, VDD= VCC= 5V, SKIP = GND, TA = +25°C, unless otherwise noted.)
SMPS 1.8V EFFICIENCY
vs. LOAD CURRENT
100
STANDBY MODE
90
80
70
60
SKIP MODE
50
EFFICIENCY (%)
40
30
20
10
0.01 10 LOAD CURRENT (A)
SMPS 1.8V OUTPUT VOLTAGE
vs. LOAD CURRENT
1.82
1.81
1.80
OUTPUT VOLTAGE (V)
1.79
1.78
0.001 10
SKIP MODE
PWM MODE
0.1 10.01
LOAD CURRENT (A)
PWM MODE
10.1
VIN = 7V
VIN = 12V
100
STANDBY MODE
90
MAX17000 toc01
80
70
60
50
EFFICIENCY (%)
40
30
20
10
0.01 10
350
300
MAX17000 toc04
250
200
150
100
SWITCHING FREQUENCY (kHz)
50
0
010
SMPS 1.8V EFFICIENCY
vs. LOAD CURRENT
SKIP MODE
PWM MODE
VIN = 12V
10.1
LOAD CURRENT (A)
SMPS SWITCHING FREQUENCY
vs. LOAD CURRENT
VIN = 12V V
OUT
4682
LOAD CURRENT (A)
= 1.8V
MAX17000 toc02
EFFICIENCY (%)
10.50
MAX17000 toc05
10.25
10.00
CURRENT LIMIT (A)
SMPS 1.8V EFFICIENCY
vs. LOAD CURRENT
100
STANDBY MODE
90
80
70
60
50
SKIP MODE
40
30
20
10
0.01 10
PWM MODE
VIN = 20V
10.1
LOAD CURRENT (A)
MAX17000 toc03
SMPS VALLEY-CURRENT LIMIT
vs. INPUT VOLTAGE
R
= 2m
Ω
SENSE
MAX17000 toc06
9.75
9.50 428
12 16 20 248
INPUT VOLTAGE (V)
NO-LOAD SUPPLY CURRENT
vs. INPUT VOLTAGE
100
PWM MODE, ICC + I
10
SKIP MODE, ICC + I
1
STANDBY MODE, ICC + I
SUPPLY CURRENT (mA)
0.1
STANDBY MODE, I
0.01 428
DD
PWM MODE, I
DD
SKIP MODE, I
IN
12 16 20 248
INPUT VOLTAGE (V)
NO LOAD
MAX17000 toc07
IN
DD
IN
SAMPLE PERCENTAGE (%)
50
40
30
20
10
0
PRESET 1.5V OUTPUT
VOLTAGE DISTRIBUTION
SAMPLE SIZE = 150 +85°C
1.490 1.510
1.500 1.5051.495
OUTPUT VOLTAGE (V)
+25°C
MAX17000 toc08
MAX17000
Complete DDR2 and DDR3 Memory
Power-Management Solution
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(MAX17000 Circuit of Figure 1, V
IN
= 12V, VDD= VCC= 5V, SKIP = GND, TA = +25°C, unless otherwise noted.)
STARTUP WAVEFORM
(HEAVY LOAD)
SHDN
VDDQ
VTT
VTTR
PGOOD1
I
LX
DL
SHDN : 5V/div VDDQ : 500mV/div VTT : 500mV/div VTTR : 500mV/div
200μs/div
PGOOD1 : 2V/div
: 5A/div
I
LX
DL : 5V/div
STANDBY TRANSITION WAVEFORM
STBY
VDDQ
MAX17000 toc09
= 0.25Ω
R
LOAD
SKIP = GND
MAX17000 toc12
VDDQ
VTTR
VTT
PGOOD2
PGOOD1
SHDN
VDDQ
SHUTDOWN WAVEFORM
(DISCHARGE MODE ENABLED)
DL
I
LX
DL : 5V/div VDDQ : 2V/div VTT : 1V/div VTTR : 1V/div
400μs/div
SMPS LOAD-TRANSIENT RESPONSE
(SKIP MODE)
MAX17000 toc10
PGOOD2 : 5V/div PGOOD1 : 5V/div SHDN : 10V/div
: 2A/div
I
LX
MAX17000 toc13
STANDBY TRANSITION WAVEFORM
STBY
VDDQ
VTT
TON
DL
LX
I
LX
STBY : 5V/div VDDQ : 1V/div VTT : 1V/div TON: 10V/div
SMPS LOAD-TRANSIENT RESPONSE
VDDQ
2ms/div
(SKIP MODE)
MAX17000 toc11
DL : 5V/div LX : 10V/div
: 2A/div
I
LX
MAX17000 toc14
VTT
TON
LX
DL I
LX
STBY : 5V/div VDDQ : 2V/div VTT : 1V/div TON: 10V/div
I
LOAD
LX
I
LX
VDDQ : 50mV/div LX : 10V/div
20μs/div
I
LOAD
I
LX
: 5A/div
: 5A/div
200μs/div
LX : 10V/div
: 10A/div
I
LX
DL : 5V/div
I
LOAD
LX
I
LX
VDDQ : 50mV/div LX : 10V/div
20μs/div
I
LOAD
I
LX
: 5A/div
: 5A/div
MAX17000
Complete DDR2 and DDR3 Memory Power-Management Solution
10 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(MAX17000 Circuit of Figure 1, V
IN
= 12V, VDD= VCC= 5V, SKIP = GND, TA = +25°C, unless otherwise noted.)
OUTPUT OVERLOAD WAVEFORM
DL
VDDQ
VTT
VTTR PGOOD2 PGOOD1
I
LX
DL : 5V/div VDDQ : 1V/div VTT : 1V/div VTTR : 1V/div
400μs/div
VTT SOURCE CURRENT LIMIT
50
SAMPLE SIZE = 150 +85°C
40
30
20
SAMPLE PERCENTAGE (%)
10
0
2.0 4.0
3.0 3.52.5
CURRENT LIMIT (A)
MAX17000 toc15
PGOOD2 : 2V/div PGOOD1 : 2V/div
: 10A/div
I
LX
+25°C
0.79
0.78
0.77
0.76
0.75
VTT VOLTAGE (V)
0.74
0.73
0.72
-2.0 2.0
50
40
MAX17000 toc18
30
20
SAMPLE PERCENTAGE (%)
10
0
-4.0 -2.0
vs. SOURCE/SINK LOAD CURRENT
VTT VOLTAGE
V
= 18V
TTI
-0.5 0 0.5 1.51.0-1.5 -1.0
LOAD CURRENT (A)
VTT SINK CURRENT LIMIT
SAMPLE SIZE = 150 +85°C
-3.0 -2.5-3.5
CURRENT LIMIT (A)
+25°C
50
40
MAX17000 toc16
30
20
SAMPLE PERCENTAGE (%)
10
0
-15.0 -5.0
DL
MAX17000 toc19
I
LX
VDDQ
VTT
VTTR
PGOOD1 PGOOD2
VTT OFFSET VOLTAGE DISTRIBUTION
AT 300mA LOAD
SAMPLE SIZE = 150 +85°C
-10.0 -7.5-12.5
OFFSET VOLTAGE (mV)
+25°C
VTT OVERLOAD FAULT WAVEFORMS
DL : 5V/div
: 2A/div
I
LX
VDDQ : 2V/div VTT : 1V/div
(5ms TIMER)
1ms/div
MAX17000 toc20
VTTR : 1V/div PGOOD1 : 2V/div PGOOD2 : 2V/div
MAX17000 toc17
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