The MAX16807/MAX16808 are integrated, high-efficiency white or RGB LED drivers. They are designed for
LCD backlighting and other LED lighting applications
with multiple strings of LEDs. The MAX16807/
MAX16808’s current-mode PWM controller regulates
the necessary voltage to the LED array. Depending on
the input voltage and LED voltage range, it can be
used with boost or buck-boost (SEPIC) topologies. The
MAX16807/MAX16808 feature an 8V to 26.5V input voltage range. A wide range of adjustable frequency
(20kHz to 1MHz) allows design optimization for efficiency and minimum board space.
The MAX16807/MAX16808 LED drivers include eight
open-drain, constant-current-sinking LED driver outputs
rated for 36V continuous operation. The LED currentcontrol circuitry achieves ±3% current matching among
strings and enables paralleling of outputs for LED string
currents higher than 55mA. The output-enable pin is
used for simultaneous PWM dimming of all output channels. Dimming frequency range is 50Hz to 30kHz and
dimming ratio is up to 5000:1. The constant-current outputs are single resistor programmable and the LED current can be adjusted up to 55mA per output channel.
The MAX16807/MAX16808 operate either in stand-alone
mode or with a microcontroller (µC) using an industrystandard, 4-wire serial interface. The MAX16808 includes
circuitry that automatically detects open-circuit LEDs.
The MAX16807/MAX16808 include overtemperature
protection, operate over the full -40°C to +125°C temperature range, and are available in a thermally
enhanced, 28-pin TSSOP exposed paddle package.
Features
o Eight Constant-Current Output Channels (Up to
55mA Each)
o ±3% Current Matching Among Outputs
o Paralleling Channels Allows Higher Current per
LED String
o Outputs Rated for 36V Continuous Voltage
o Output-Enable Pin for PWM Dimming (Up to 30kHz)
o One Resistor Sets LED Current for All Channels
o Wide Dimming Ratio Up to 5000:1
o Low Current-Sense Reference (300mV) for High
Efficiency
o 8V to 26.5V Input Voltage or Higher with External
Biasing Devices
o Open LED Detection (MAX16808)
o 4-Wire Serial Interface to Control Individual
Output Channels
Applications
LCD White or RGB LED Backlighting:
LCD TVs, Desktop, and Notebook Panels
Automotive Navigation, Heads-Up,
and Infotainment Displays
Industrial and Medical Displays
(VCC= +15V, V+ = +3V to +5.5V referenced to PGND, RT= 10kΩ, CT= 3.3nF, REF = open, COMP = open, C
REF
= 0.1µF, VFB= 2V,
CS = AGND, AGND = PGND = 0V; all voltages are measured with respect to AGND, unless otherwise noted. T
J
= TA = -40°C to
+125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto AGND..........................................................-0.3V to +30V
(V+ = +3V to +5.5V, AGND = PGND = 0V; all voltages are measured with respect to PGND, unless otherwise noted. TA= TJ= -40°C
to +125°C, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Operating Supply VoltageV+3.05.5V
Output VoltageV
Standby Current (Interface Idle, All
Output Ports High Impedance)
Standby Current
(Interface Active, All Output Ports
High Impedance)
OUT_
R
OE = V+, DOUT unconnected
R
DIN, LE = PGND or V+, DOUT unconnected
= 360Ω, DIN, LE, CLK = PGND or V+,
SET
= 360Ω, f
SET
= 5MHz, OE = V+,
CLK
36V
3.64.5mA
3.84.8mA
Supply Current
(Interface Idle, All Output Ports
Active Low)
(V+ = +4.5V to +5.5V, AGND = PGND = 0V; all voltages are measured with respect to PGND, unless otherwise noted. TA= TJ= -40°C
to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 5)
PARAMETERSYMBOLCONDITIONMINTYPMAXUNITS
INTERFACE TIMING CHARACTERISTICS
CLK Clock Periodt
CLK Pulse-Width Hight
CLK Pulse-Width Lowt
DIN Setup Timet
DIN Hold Timet
DOUT Propagation Delayt
DOUT Rise Timet
DOUT Fall Timet
LE Pulse-Width Hight
LE Setup Timet
LE Rising to OUT_ Rising Delayt
LE Rising to OUT_ Falling Delayt
CLK Rising to OUT_ Rising Delayt
CLK Rising to OUT_ Falling
Delay
OE Rising to OUT_ Rising Delayt
OE Falling to OUT_ Falling Delayt
OUT_ Turn-On Fall Timet
OUT_ Turn-Off Rise Timet
CH
DH
DO
DR
LW
LRR
LRF
CRR
t
CRF
OER
OEF
CP
CL
DS
DF
LS
C
= 10pF, 20% to 80%10ns
DOUT
C
= 10pF, 80% to 20%10ns
DOUT
(Note 6)110ns
(Note 6)325ns
(Note 6)110ns
(Note 6)325ns
(Note 6)110ns
(Note 6)325ns
F
R
80% to 20% (Note 6)210ns
20% to 80% (Note 6)130ns
40ns
19ns
19ns
4ns
8ns
1250ns
20ns
15ns
MAX16807/MAX16808
Integrated 8-Channel LED Drivers with
Switch-Mode Boost and SEPIC Controller
(V+ = +3V to < +4.5V, AGND = PGND = 0V; all voltages are measured with respect to PGND, unless otherwise noted. TA= TJ= -40°C
to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1, 5)
Note 1: All devices are 100% production tested at TJ= +25°C and +125°C. Limits to -40°C are guaranteed by design.
Note 2: Guaranteed by design, not production tested.
Note 3: Parameter is measured at trip point of latch with V
FB
= 0V.
Note 4: Gain is defined as A = ΔV
COMP
/ ΔVCS, 0.05V ≤ VCS≤ 0.25V.
Note 5: See Figures 3 and 4.
Note 6: A 65Ω pullup resistor is connected from OUT_ to 5.5V. Rising refers to V
OUT_
when current through OUT_ is turned off and
falling refers to V
OUT_
when current through OUT_ is turned on.
PARAMETERSSYMBOLCONDITIONSMINTYPMAXUNITS
INTERFACE TIMING CHARACTERISTICS
CLK Clock Periodt
CLK Pulse-Width Hight
CLK Pulse-Width Lowt
DIN Setup Timet
DIN Hold Timet
DOUT Propagation Delayt
DOUT Rise Timet
DOUT Fall Timet
LE Pulse-Width Hight
LE Setup Timet
LE Rising to OUT_ Rising Delayt
LE Rising to OUT_ Falling Delayt
CLK Rising to OUT_ Rising Delayt
CLK Rising to OUT_ Falling Delayt
OE Rising to OUT_ Rising Delayt
OE Falling to OUT_ Falling Delayt
The MAX16807/MAX16808 LED drivers include an
internal switch-mode controller that can be used as
boost or buck-boost (SEPIC) converters to generate the
voltage necessary to drive the multiple strings of LEDs.
These devices incorporate an integrated low-side driver, a programmable oscillator (20kHz to 1MHz), an
error amplifier, a low-voltage (300mV) current sense for
higher efficiency, and a 5V reference to power up
external circuitry (see Figures 1a, 1b, and 1c).
The MAX16807/MAX16808 LED drivers include a 4-wire
serial interface and a current-mode PWM controller to
generate the necessary voltage for driving eight opendrain, constant-current-sinking output ports. The drivers
use current-sensing feedback circuitry (not simple current mirrors) to ensure very small current variations over
the full allowed range of output voltage (see the
Typical
Operating Characteristics
). The 4-wire serial interface
comprises an 8-bit shift register and an 8-bit transparent latch. The shift register is written through a clock
input, CLK, and a data input, DIN, and the data propagates to a data output, DOUT. The data output allows
multiple drivers to be cascaded and operated together.
The contents of the 8-bit shift register are loaded into
the transparent latch through a latch-enable input, LE.
The latch is transparent to the shift register outputs
when high and latches the current state on the falling
edge of LE. Each driver output is an open-drain, constant-current sink that should be connected to the cath-
Pin Description
PINNAMEFUNCTION
1, 13, 28N.C.No Connection. Not internally connected. Leave unconnected.
2AGNDAnalog Ground
3OUTMOSFET Driver Output OUT. Connects to the gate of the external n-channel MOSFET.
4V
5REF5V Reference Output. Bypass REF to AGND with a 0.1µF ceramic capacitor.
6–9OUT4–OUT7 LED Driver Outputs. OUT4–OUT7 are open-drain, constant-current-sinking outputs rated for 36V.
10OE
11DOUT
12SETLED Current Setting. Connect R
14V+LED Driver Positive Supply Voltage. Bypass V+ to PGND with a 0.1µF ceramic capacitor.
15, 16PGNDPower Ground
17DINSerial-Data Input
18CLKSerial-Clock Input
19LE
20–23OUT0–OUT3 LED Driver Outputs. OUT0–OUT3 are open-drain, constant-current-sinking outputs rated for 36V.
24COMPError-Amplifier Output
25FBError-Amplifier Inverting Input
26CSPWM Controller Current-Sense Input
27RTCT
—EP
CC
Power-Supply Input. Bypass VCC to AGND with a 0.1µF ceramic capacitor or a parallel combination
of a 0.1µF and a higher value ceramic capacitor.
Active-Low Output Enable Input. Drive OE low to PGND to enable the OUT0–OUT7. Drive OE high to
disable OUT0–OUT7.
Serial-Data Output. Data is clocked out of the 8-bit internal shift register to DOUT on CLK’s rising
edge.
from SET to PGND to set the LED current.
SET
Latch-Enable Input. Data is loaded transparently from the internal shift register(s) to the output
latch(es) while LE is high. Data is latched into the output latch(es) on LE’s falling edge, and retained
while LE is low.
PWM Controller Timing Resistor/Capacitor Connection. A resistor R
capacitor C
Exposed Paddle. Connect to the ground plane for improved power dissipation. Do not use as the
only ground connection for the part.
from RTCT to AGND set the oscillator frequency.
T
from RTCT to REF and a
T
MAX16807/MAX16808
Integrated 8-Channel LED Drivers with
Switch-Mode Boost and SEPIC Controller
ode of a string of LEDs connected in series. The constant-current capability is up to 55mA per output, set
for all 8 outputs by an external resistor, R
SET
. The
devices can operate in a stand-alone mode (see the
Typical Operating Circuits
.)
The MAX16808 includes circuitry that automatically
detects open-circuit LEDs. Fault status is loaded into the
serial-interface shift register when LE goes high and is
automatically shifted out on DOUT when the next data
transmission is shifted in. The number of channels can be
expanded by using the MAX6970 and MAX6971 family in
conjunction with the MAX16807 and MAX16808.
The advantages of current-mode control over voltagemode control are twofold. First, there is the feed-forward characteristic brought on by the controller’s ability
to adjust for variations in the input voltage on a cycleby-cycle basis. Second, the stability requirements of
the current-mode controller are reduced to that of a single pole system unlike the double pole in the voltagemode control scheme. The MAX16807/MAX16808 use
a current-mode control loop where the output of the
error amplifier is compared to the current-sense voltage
(VCS). When the current-sense signal is lower than the
inverting input of the CPWM comparator, the output of
the comparator is low and the switch is turned on at
each clock pulse. When the current-sense signal is
higher than the inverting input of the CPWM comparator, the output is high and the switch is turned off.
Undervoltage Lockout (UVLO)
The turn-on supply voltage for the MAX16807/
MAX16808 is 8.4V (typ). Once V
CC
reaches 8.4V, the
reference powers up. There is a 0.8V of hysteresis from
the turn-on voltage to the UVLO threshold. Once V
CC
reaches 8.4V, the MAX16807/MAX16808 operate with
V
CC
down to 7.6V (typ). Once VCCgoes below 7.6V,
the device is in UVLO. When in UVLO, the quiescent
supply current into VCCfalls back to 32µA (typ), and
OUT and REF are pulled low.
MOSFET Driver
OUT drives an external n-channel MOSFET and swings
from AGND to VCC. Ensure that VCCremains below the
absolute maximum VGSrating of the external MOSFET.
OUT is a push-pull output with the on-resistance of the
pMOS typically 3.5Ω and the on-resistance of the
nMOS typically 4.5Ω. The driver can source 2A and
sink 1A typically. This allows for the MAX16807/
MAX16808 to quickly turn on and off high gate-charge
MOSFETs. Bypass V
CC
with one or more 0.1µF ceramic
capacitors to AGND, placed close to the V
CC
pin. The
average current sourced to drive the external MOSFET
depends on the total gate charge (QG) and operating
frequency of the converter. The power dissipation in the
MAX16807/MAX16808 is a function of the average output drive current (I
DRIVE
). Use the following equation to
calculate the power dissipation in the device due to
I
DRIVE
:
I
DRIVE
= (QGx fSW)
PD = (I
DRIVE
+ ICC) x V
CC
where ICCis the operating supply current. See the
Typical Operating Characteristics
for the operating
supply current at a given frequency.
Error Amplifier
The MAX16807/MAX16808 include an internal error
amplifier. The inverting input is at FB and the noninverting input is internally connected to a 2.5V reference.
Set the output voltage using a resistive divider between
output of the converter V
OUT
, FB, and AGND. Use the
following formula to set the output voltage:
where V
FB
= 2.5V.
Oscillator
The oscillator frequency is programmable using an
external capacitor and a resistor at RTCT (see RTand
CTin the
Typical Operating Circuits
). RTis connected
from RTCT to the 5V reference (REF), and CTis connected from RTCT to AGND. REF charges CTthrough
RTuntil its voltage reaches 2.8V. CTthen discharges
through an 8.3mA internal current sink until CT’s voltage
reaches 1.1V, at which time CTis allowed to charge
through RTagain. The oscillator’s period is the sum of
the charge and discharge times of CT. Calculate the
charge time as follows:
tC= 0.57 x RTx C
T
where tCis in seconds, RT in ohms (Ω), and CTin
Farads (F).
where tDis in seconds, RT in ohms (Ω), and CTin
Farads (F).
The oscillator frequency is then:
Reference Output
REF is a 5V reference output that can source 20mA.
Bypass REF to AGND with a 0.1µF capacitor.
Current Limit
The MAX16807/MAX16808 include a fast current-limit
comparator to terminate the on cycle during an overload or a fault condition. The current-sense resistor,
RCS, connected between the source of the external
MOSFET and AGND, sets the current limit. The CS
input has a voltage trip level (VCS) of 0.3V. Use the following equation to calculate RCS:
I
P-P
is the peak current that flows through the MOSFET.
When the voltage produced by this current (through the
current-sense resistor) exceeds the current-limit comparator threshold, the MOSFET driver (OUT) turns the
switch off within 60ns. In most cases, a small RC filter is
required to filter out the leading-edge spike on the sense
waveform. Set the time constant of the RC filter at 50ns.
Buck-Boost (SEPIC) Operation
Figure 2 shows a buck-boost application circuit using
the MAX16807/MAX16808 in a stand-alone mode of
operation. SEPIC topology is necessary when the total
forward voltage of the LEDs in a string is such that
V
OUT
can be below or above VIN.
Figure 2. Buck-Boost (SEPIC) Configuration
f
OSC
1
tt
=+
()
CD
V
IN
L1
C1
Q
D
C
L2
V
=
CS
I
PP
−
R
CS
V
OUT
OUT
R1
LEDs
OUT CS AGNDCOMP
V
CC
V+
PGND
DIN
LE
CLK
DOUT
OE
SET
REF
C
REF
3V TO 5.5V
C
IN
C
BYP
EXTERNAL
CLOCK INPUT
EXTERNAL
DIM INPUT
R
SET
R
CS
MAX16807
MAX16808
R
T
C
C2
C
C1
R
C1
R2
FB
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
RTCT
C
T
MAX16807/MAX16808
Integrated 8-Channel LED Drivers with
Switch-Mode Boost and SEPIC Controller
The MAX16807/MAX16808 also operate in a standalone mode (see the
Typical Operating Circuits
). For
use with a microcontroller, the MAX16807/MAX16808
feature a 4-wire serial interface using DIN, CLK, LE, OE
inputs and DOUT as a data output. This interface is
used to write the LED channels’ data to the MAX16807/
MAX16808. The serial-interface data word length is 8
bits, D0–D7. See Figure 3.
The functions of the five interface pins are as follows:
DIN is the serial-data input, and must be stable when it
is sampled on the rising edge of CLK. Data is shifted in
MSB first. This means that data bit D7 is clocked in first,
followed by 7 more data bits, finishing with the LSB, D0.
CLK is the serial-clock input that shifts data at DIN into
the MAX16807/MAX16808’s 8-bit shift register on its rising edge.
LE is the latch enable input of the MAX16807/
MAX16808 that transfers data from the 8-bit shift register to its 8-bit output latch (transparent latch). The data
is latched on the falling edge of LE (Figure 4). The
fourth input (OE) provides output-enable control of the
output drivers. When OE is driven high, the outputs
(OUT0–OUT7) are forced to high impedance without
altering the contents of the output latches. Driving OE
low enables the outputs to follow the state of the output
latches. OE is independent of the operation of the serial
interface operation. Data can be shifted into the serialinterface shift register and latched, regardless of the
state of OE. DOUT is the serial-data output that shifts
data out from the MAX16807/MAX16808’s 8-bit shift
register on the rising edge of CLK. Data at DIN propagates through the shift register and appears at DOUT
eight clock cycles later. Table 1 shows the 4-wire serial-interface truth table.
Table 1. 4-Wire Serial-Interface Truth Table
L = Low Logic Level
H = High Logic Level
X = Don’t Care
P = Present State (Shift Register)
R = Previous State (Latched)
The MAX16808 includes circuitry that detects open-circuit LEDs automatically. An open-circuit fault occurs
when an output is sinking current less than approximately 50% of the programmed current flows. Open circuits are checked just after the falling edge of OE. The
fault data is latched on the rising edge of LE and is
shifted out when new LED data is loaded into the output latches from the shift register. If one or more output
ports are detected with an open-circuit fault, the D6
and D5 bits of DOUT go high. If no open-circuit faults
are detected, D6 and D5 are set to low. The data in the
other 6 bit positions in DOUT are not altered. Fault status is shifted out on DOUT for the first two rising edges
of the clock after the falling edge of LE (see Figure 5).
LE is normally taken high after all 8 bits of new LED
Figure 3. 4-Wire Serial-Interface Timing Diagram
Figure 4. LE and CLK to OUT_ Timing
Figure 5. Fault Timing
CLK
DOUT
DIN
LE
t
t
CL
CH
t
DH
t
DS
D7
t
OE
OEW
t
CP
D0
t
DO
t
LW
t
LS
D7
OUT_
LE
OUT_
LE
OUT_
CLK
OUT_
t
LRF
t
LRR
t
CRF
t
OEF
t
f
80%
20%
t
OER
t
r
OE
CLK
OUT_
t
CRR
LE
CLK
DOUT
D5
D6
D7
FAULT STATUS BITS
D4
MAX16807/MAX16808
Integrated 8-Channel LED Drivers with
Switch-Mode Boost and SEPIC Controller
data have been clocked into the shift register(s), and
then DOUT outputs data bit D7. A typical fault-detecting application tests all the shifted out data. Bits D0–D4
and D7 are checked against the originally transmitted
data to check data-link integrity. Bits D5 and D6 are
checked first to see that they contain the same data
(validating the status), and second, whether faults are
reported or not by the actual logic level.
Selecting External Component
R
SET
to Set LED Output Current
The MAX16807/MAX16808 use an external resistor,
R
SET
, to set the LED current for outputs OUT0–OUT7.
The minimum allowed value of R
SET
is 330Ω, which
sets the output currents to 55mA. The maximum
allowed value of R
SET
is 5kΩ (I
OUT_
= 3.6mA) and max-
imum allowed capacitance at SET is 100pF.
Use the following formula to set the output current:
where I
OUT_
is the desired output current in milliamps
and the value for R
SET
is in ohms.
Overtemperature Cutoff
The MAX16807/MAX16808 contain an internal temperature sensor that turns off all outputs when the die temperature exceeds +165°C. The outputs are enabled again
when the die temperature drops below +140°C. Register
contents are not affected, so when a driver is overdissipating, the external symptom is the load LEDs cycling on
and off as the driver repeatedly overheats and cools,
alternately turning itself off and then back on again.
Stand-Alone Operation
In stand-alone operation, the MAX16807/MAX16808
does not use the 4-wire interface (see the
Typical
Operating Circuits
). Connect DIN and LE to V+ provide
at least 8 external clock pulses to CLK to enable 8 outputs. This startup pulse sequence can be provided
either using an external clock or the PWM signal. The
external clock can also be generated using the signal
at RTCT and an external comparator.
LED Dimming
PWM Dimming
All the output channels can be dimmed simultaneously
by applying a PWM signal (50Hz to 30kHz) to OE. This
allows for a wide range of dimming up to a 5000:1 ratio.
Each channel can be independently turned on and off
using a 4-wire serial interface. The dimming is proportional to the PWM duty cycle.
LED Current Amplitude Adjustment
Using an analog or digital potentiometer as R
SET
allows
for LED current amplitude adjustment and linear dimming.
Computing Power Dissipation
Use the following equation to estimate the upper limit
power dissipation (PD) for the MAX16807/MAX16808:
where:
V+ = supply voltage
I+ = operating supply current
DUTY = PWM duty cycle applied to OE
V
OUTi
= MAX16807/MAX16808 port output voltage
when driving load LED(s)
I
OUTi
= LED drive current programmed by R
SET
PD = power dissipation.
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
board whenever possible for better noise immunity.
Protect sensitive analog grounds by using a star
ground configuration. Minimize ground noise by connecting AGND, PGND, the input bypass-capacitor
ground lead, and the output-filter ground lead to a single point (star ground configuration). Also, minimize
trace lengths to reduce stray capacitance, trace resistance, and radiated noise. The trace between the output voltage-divider and the FB pin must be kept short,
as well as the trace between AGND and PGND.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages
.)
Revision History
Pages changed at Rev 1: 1, 21
XX XX
TSSOP 4.4mm BODY.EPS
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY,
EXPOSED PAD
21-0108
1
E
1
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