Maxim MAX16051, MAX16050 Datasheet

General Description
The MAX16050 monitors up to 5 voltages and sequences up to 4 voltages, while the MAX16051 moni­tors up to 6 voltages and sequences up to 5 voltages. These devices provide an adjustable delay as each sup­ply is turned on and they monitor each power-supply voltage. When all of the voltages reach their final values and the reset delay timer expires, a power-on-reset (POR) output deasserts allowing the microcontroller (µC) to operate. If any voltage falls below its threshold, the reset output asserts and all voltage supplies are turned off. The MAX16050/MAX16051 can be daisy-chained to control a higher number of voltages in a system.
During a power-down event, the MAX16050/MAX16051 can reverse sequence the outputs. In this situation, each voltage is turned off sequentially until it reaches a 250mV level, at which point, the next supply is turned off. The MAX16050/MAX16051 also provide internal pulldown cir­cuitry that turns on during power-down, to help dis­charge large output capacitors.
The MAX16050/MAX16051 feature a charge-pump sup­ply output that can be used as a pullup voltage for dri­ving external n-channel MOSFETs and an overvoltage output that indicates when any of the monitored voltages exceeds its overvoltage threshold. The MAX16050 also provides three sequence control inputs for changing the sequence order, while the MAX16051 has a fixed sequence order.
The MAX16050/MAX16051 are available in a 28-pin (4mm x 4mm) thin QFN package and are fully specified over the -40°C to +85°C extended operating tempera­ture range.
Applications
Features
Monitor Up to 6 Voltages/Sequence Up to 5
Voltages
Pin-Selectable Sequencing Order (MAX16050 Only)
Reverse-Sequencing Capability on Shutdown
Overvoltage Monitoring with Independent Output
±1.5% Threshold Accuracy
2.7V to 13.2V Operating Voltage Range
Charge Pump to Fully Enhance External
n-Channel FETs
Capacitor-Adjustable Sequencing Delay
Fixed or Capacitor-Adjustable Reset Timeout
Internal 85mA Pulldowns for Discharging
Capacitive Loads Quickly
Daisy-Chaining Capability to Communicate
Across Multiple Devices
Small 4mm x 4mm, 28-Pin TQFN Package
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with
Reverse-Sequencing Capability
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
26
27
25
24
10
+
9
11
GND
EN
SET4
OUT4
DISC4
12
V
CC
RESET
SET1
OUT1
FAULT
DISC1
REM
1
*EP = EXPOSED PAD
2
SEQ1
4567
2021 19 17 16 15
SEQ2
SEQ3
OUT2
SET2
DISC3
OUT3
MAX16050
ABP
OV_OUT
3
18
*EP
28
8
CP_OUT
SET3
TIMEOUT
23
13
DISC2
DELAY
22
14
EN_HOLD
SHDN
THIN QFN
(4mm x 4mm)
TOP VIEW
Pin Configurations
19-1013; Rev 0; 11/07
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configurations continued at end of data sheet.
PART
MONITORED
VOLTAGES
VOLTAGES
SEQUENCED
PIN-PACKAGE PACKAGE CODE
MAX16050ETI+ 5 4 28 TQFN-EP* T2844-1
MAX16051ETI+ 6 5 28 TQFN-EP* T2844-1
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+
Denotes lead-free package.
*
EP = Exposed pad.
Typical Operating Circuit appears at end of data sheet.
Servers
Workstations
Networking Systems
Telecom Equipment
Storage Systems
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V to 13.2V, VEN= V
ABP
, TA= TJ= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.) V
CC
.........................................................................-0.3V to +30V
REM, OUT_, DISC_.................................................-0.3V to +30V
RESET, SHDN, SET_, FAULT, EN_HOLD, EN, DELAY,
OV_OUT, ABP, TIMEOUT, SEQ_...........................-0.3V to +6V
CP_OUT.........................................................-0.3V to (V
CC
+ 6V)
RESET Current ....................................................................50mA
DISC_ Current ...................................................................180mA
Input/Output Current (all other pins) ...................................20mA
Continuous Power Dissipation (T
A
= +70°C) 28-Pin (4mm x 4mm) Thin QFN (derate 28.6mW/°C
above +70°C) ............................................................2285mW*
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
*
As per JEDEC51 Standard (Multilayer Board).
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Voltage Range (Note 2)
V
CC
Voltage on VCC to ensure the device is fully operational
2.7 13.2 V
Operating Voltage V
CCR
V
DISC_
= V
OUT_
= V
RESET
= low, voltage on
V
CC
rising
1.8 V
Regulated Supply Voltage V
ABP
I
ABP
= 1mA (external sourcing current from
ABP)
2.45 2.90 V
Undervoltage Lockout V
UVLO
Minimum voltage on ABP, ABP rising 2.1 2.3 V
Undervoltage Lockout Hysteresis V
UVLO_HYS
ABP falling 100 mV
Supply Current I
CC
VCC = 3.3V, all OUT_ = high, no load 0.7 1.1 mA
MONITORED ANALOG INPUTS
SET_ Threshold V
TH
SET_ falling 0.492 0.5 0.508 V
SET_ Threshold Hysteresis V
TH_HYS
SET_ rising 0.5 %V
TH
SET1–SET4 Input Current I
SET
V
SET_
= 0.5V -100 +100 nA
SET5 Input Current I
SET5
V
SET5
= 0.5V (MAX16051 only) -30 +30 µA
SET_ Threshold Tempco ΔV
TH/_TC
30 ppm/°C
Overvoltage Threshold V
TH_OV
SET_ falling 0.541 0.55 0.558 V
Overvoltage Threshold Hysteresis SET_ rising 0.5 %V
TH_OV
EN Threshold V
TH_EN
EN_ falling 0.492 0.5 0.508 V
EN Threshold Hysteresis V
EN_HYS
EN_ rising 0.5 %V
TH_EN
EN Input Current I
EN
VEN = 0.5V -100 +100 nA
SEQUENCING, CAPACITOR DISCHARGE, AND SEQUENCE TIMING OUTPUTS
VCC = 3.3V, I
SINK
= 3.2mA 0.3
OUT_ Output Low Voltage V
OL_OUT
VCC = 1.8V, I
SINK
= 100µA 0.3
V
OUT_ Leakage Current I
LKG_OUT
V
OUT_
= 12V, OUT_ asserted 1 µA
DISC_ Output Pulldown Current I
OL_DISC
Pulldown current during fault condition or power-down mode, V
DISC_
= 1V
85 mA
DISC_ Output Leakage Current I
LKG_DISCVDISC_
= 3.3V, not in power-down mode 1 µA
DISC_ Power Low Threshold V
TH_PL
DISC_ falling 200 250 300 mV
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with
Reverse-Sequencing Capability
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 2.7V to 13.2V, VEN= V
ABP
, TA= TJ= -40°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.) (Note 1)
Note 1: Specifications are guaranteed for the stated global conditions, unless otherwise noted. 100% production tested at T
A
=
+25°C and T
A
= +85°C. Specifications at TA= -40°C are guaranteed by design.
Note 2: When the voltage is below the V
UVLO
and above V
CCR
, OUT_ and RESET are asserted low.
Note 3: SEQ1–SEQ3 are inputs with three logic levels: high, low, and high-impedance.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DELAY, TIMEOUT Output Source Current
I
DT
V
DELAY
= V
TIMEOUT
= 0V 1.7 2.5 3.0 µA
DELAY, TIMEOUT Threshold Voltage
V
TH_DT
1.218 1.250 1.281 V
DIGITAL INPUTS/OUTPUTS
SHDN, FAULT, EN_HOLD Input- Logic Low Voltage
V
IL
0.4 V
SHDN, FAULT, EN_HOLD Input- Logic High Voltage
V
IH
2V
EN_HOLD Input Current I
I
A
EN_HOLD to OUT Delay t
EN_OUT
s
FAULT, SHDN to ABP Pullup Resistance
R
P
60 100 160 kΩ
SHDN to OUT_ Delay t
OUT
12 µs
VCC = 3.3V, I
SINK
= 3.2mA 0.3
RESET Output Low Voltage V
OL
VCC = 1.8V, I
SINK
= 100µA 0.3
V
REM, FAULT Output Low Voltage V
OL_RFVCC
= 3.3V, I
SINK
= 3.2mA 0.3 V
FAULT Pulse Width t
FAULT_PW
1.9 µs
SET_ to FAULT Delay Time t
SET_FAULT
SET_ falling below respective threshold 2.5 µs
SEQ1–SEQ3 Logic-High Level V
IH_SEQ
MAX16050 only
V
ABP
-
0.35
V
SEQ1–SEQ3 Logic High­Impedance (No Connect) Level
V
IX_SEQ
MAX16050 only 0.92 1.45 V
SEQ1–SEQ3 Logic-Low Level V
IL_SEQ
MAX16050 only 0.33 V
SEQ1–SEQ3 High-Impedance State Tolerance Current
I
IX
MAX16050 (Note 3) -6 +6 µA
RESET CIRCUIT
RESET, REM, OV_OUT Output Leakage
I
LKG
V
RESET
= V
REM
= V
OV_OUT
= 5V 1 µA
RESET Timeout Period t
RP
TIMEOUT = ABP 50 128 300 ms
OUT_, FAULT, SHDN to RESET Delay
t
RST
TIMEOUT = unconnected 3 µs
CHARGE-PUMP OUTPUT
CP_OUT Voltage V
CP_OUTICP_OUT
= 0.5µA
V
CC
+
4.6
VCC +5VCC +
5.8
V
CP_OUT Source Current I
CP_OUTVCP_OUT
= VCC + 2V 17 25 30 µA
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability
4 _______________________________________________________________________________________
Typical Operating Characteristics
(V
CC
= 5V; VEN= V
ABP
, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX16050/51 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (μA)
11.710.28.77.25.74.2
550
600
650
700
750
500
2.7 13.2
TA = -40°C
TA = +85°C
TA = +25°C
SUPPLY CURRENT
vs. TEMPERATURE
MAX16050/51 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
603510-15
550
600
650
700
750
500
-40 85
VCC = 5V ALL OUT_ = HIGH NO LOAD
NORMALIZED SET_ THRESHOLD VOLTAGE
vs. TEMPERATURE
MAX16050/51 toc03
TEMPERATURE (°C)
NORMALIZED SET_ THRESHOLD VOLTAGE
603510-15
0.996
0.997
0.998
0.999
1.000
1.001
1.002
1.003
1.004
1.005
0.995
-40 85
NORMALIZED AT TA = +25°C V
SET_
FALLING
NORMALIZED SEQUENCE DELAY
vs. TEMPERATURE
MAX16050/51 toc04
TEMPERATURE (°C)
NORMALIZED SEQUENCE DELAY
6035-15 10
0.85
0.90
0.95
1.00
1.10
1.05
1.15
1.20
0.80
-40 85
NORMALIZED AT TA = +25°C
C
DELAY
= OPEN
C
DELAY
= 0.1μF
SEQUENCE DELAY vs. C
DELAY
MAX16050/51 toc05
C
DELAY
(nF)
SEQUENCE DELAY (ms)
400300200100
50
100
150
200
250
0
0 500
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX16050/51 toc06
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT PERIOD
603510-15
0.92
0.94
0.96
0.98
1.00
1.02
1.04
1.06
1.08
1.10
0.90
-40 85
NORMALIZED AT TA = +25°C
TIMEOUT = OPEN
TIMEOUT = ABP
RESET TIMEOUT PERIOD
vs. C
TIMEOUT
MAX16050/51 toc07
C
TIMEOUT
(nF)
RESET TIMEOUT PERIOD (ms)
400300200100
50
100
150
200
250
0
0500
CP_OUT VOLTAGE
vs. CP_OUT CURRENT
MAX16050/51 toc08
CP_OUT CURRENT (μA)
CP_OUT VOLTAGE (V)
2015105
1
2
3
4
5
6
7
8
9
10
11
0
025
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with
Reverse-Sequencing Capability
_______________________________________________________________________________________
5
Typical Operating Characteristics (continued)
(V
CC
= 5V; VEN= V
ABP
, TA= +25°C, unless otherwise noted.)
OV_OUT LOW VOLTAGE
vs. SINK CURRENT
MAX16050/51 toc09
SINK CURRENT (mA)
OV_OUT LOW VOLTAGE (V)
16124 8
0.1
0.2
0.3
0.4
0.6
0.5
0.7
0.8
0
020
OUT_ LOW VOLTAGE
vs. SINK CURRENT
MAX16050/51 toc10
SINK CURRENT (mA)
OUT_ LOW VOLTAGE (V)
16124 8
0.1
0.2
0.3
0.4
0.6
0.5
0.7
0.8
0
020
RESET LOW VOLTAGE
vs. SINK CURRENT
MAX16050/51 toc11
SINK CURRENT (mA)
RESET LOW VOLTAGE (V)
16124 8
0.1
0.2
0.3
0.4
0.6
0.5
0.7
0.8
0
020
REVERSE SEQUENCE POWER-DOWN USING SHDN
(C
DELAY
= C
TIMEOUT
= OPEN)
MAX1650/51 toc12
40μs/div
SHDN 5V/div
V1 5V/div
V2 5V/div
V3 5V/div
V4 5V/div
SIMULTANEOUS POWER-DOWN USING EN
(C
DELAY
= C
TIMEOUT
= OPEN)
MAX1650/51 toc13
40μs/div
EN 5V/div
V1 5V/div
V2 5V/div
V3 5V/div
V4 5V/div
DAISY-CHAINING TWO DEVICES
WITH SHDN RISING (FIGURE 7)
MAX1650/51 toc14a
100μs/div
C
DELAY
(U1) = C
DELAY
(U2) = 100pF SHDN = 5V/div V1–V7 = 5V/div
SHDN
V1
V2
V3
V7
V6
V5
V4
DAISY-CHAINING TWO DEVICES
WITH SHDN FALLING (FIGURE 7)
MAX1650/51 toc14b
10μs/div
C
DELAY
(U1) = C
DELAY
(U2) = 100pF SHDN = 5V/div V1–V7 = 5V/div
SHDN
V1
V2
V3
V7
V6
V5
V4
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with Reverse-Sequencing Capability
6 _______________________________________________________________________________________
Pin Description
PIN
MAX16050 MAX16051
NAME FUNCTION
11V
CC
Device Power-Supply Input. Connect to 2.7V to 13.2V. Bypass VCC to GND with a 0.1µF capacitor.
2 2 GND Ground
3 3 ABP
Internal Supply Bypass Input. Connect a 1µF capacitor from ABP to GND. ABP is an internally generated voltage and must not be used to supply more than 1mA to external circuitry.
44EN
Analog Enable Input. Connect a resistive divider at EN to monitor a voltage. The EN threshold is 0.5V.
5 5 SET4
Set Monitored Threshold 4 Input. Monitor a voltage by setting the threshold with an external resistive divider. The SET4 threshold is 0.5V.
6 6 OUT4
Open-Drain Output 4. When the voltage at SET3* is above 0.5V, OUT4 goes high impedance. OUT4 requires an external pullup resistor and can be pulled up to 13.2V.
7 7 DISC4
Discharge Pulldown Input 4. During normal operation, DISC4 is high impedance. During a fault condition or power-down, DISC4 provides an 85mA sink current.
8 8 SET3
Set Monitored Threshold 3 Input. Monitor a voltage by setting the threshold with an external resistive divider. The SET3 threshold is 0.5V.
9 9 OUT3
Open-Drain Output 3. When the voltage at SET2* is above 0.5V, OUT3 goes high impedance. OUT3 requires an external pullup resistor and can be pulled up to 13.2V.
10 10 DISC3
Discharge Pulldown Input 3. During normal operation, DISC3 is high impedance. During a fault condition or power-down, DISC3 provides an 85mA sink current.
11 11 SET2
Set Monitored Threshold 2 Input. Monitor a voltage by setting the threshold with an external resistive divider. The SET2 threshold is 0.5V.
12 12 OUT2
Open-Drain Output 2. When the voltage at SET1* is above 0.5V, OUT2 goes high impedance. OUT2 requires an external pullup resistor and can be pulled up to 13.2V.
13 13 DISC2
Discharge Pulldown Input 2. During normal operation, DISC2 is high impedance. During a fault condition or power-down, DISC2 provides an 85mA sink current.
14 14 EN_HOLD
Enable Hold Input. When EN_HOLD is low, the device does not start the reverse­sequencing process regardless of the status of the SHDN input. Reverse sequencing is allowed when this input is pulled high. Connect to ABP if unused.
15 15 REM
Open-Drain Bus Removal Output. REM goes high impedance when all DISC_ inputs are below the DISC_ power low threshold (V
TH_PL
). REM goes low when any DISC_ input goes
above V
TH_PL
. REM requires an external pullup resistor and can be pulled up to 13.2V.
16 16 DISC1
Discharge Pulldown Input 1. During normal operation, DISC1 is high impedance. During a fault condition or power-down, DISC1 provides an 85mA sink current.
17 17 OUT1
Open-Drain Output 1. When the voltage at EN* is above 0.5V, OUT1 goes high impedance. OUT1 requires an external pullup resistor and can be pulled up to 13.2V.
*
This applies to the MAX16051. For the MAX16050, see Table 1 for the output sequence order.
MAX16050/MAX16051
Voltage Monitors/Sequencer Circuits with
Reverse-Sequencing Capability
_______________________________________________________________________________________ 7
Pin Description (continued)
PIN
MAX16050 MAX16051
NAME FUNCTION
18 18 SET1
Set Monitored Threshold 1 Input. Monitor a voltage by setting the threshold with an external resistive divider. The SET1 threshold is 0.5V.
19 19 OV_OUT
Open-Drain Overvoltage Output. When any of the SET_ voltages exceed their 0.55V overvoltage threshold, OV_OUT goes low. When all of the SET_ voltages are below their overvoltage threshold, OV_OUT goes high impedance after a short propagation delay.
20 20 RESET
Open-Drain Reset Output. When any of the monitored voltages (including EN) falls below its threshold, SHDN is pulled low, or FAULT is pulled low, RESET asserts and stays asserted for at least the minimum reset timeout period after all of these conditions are removed. The reset timeout is 128ms (typ) when TIMEOUT is connected to ABP or can be adjusted by connecting a capacitor from TIMEOUT to GND.
21 21 FAULT
FAULT Synchronization Input/Output. While EN = SHDN = high, FAULT is pulled low when any of the SET_ voltages falls below their respective threshold. Pull FAULT low manually to assert a simultaneous power-down. FAULT is internally pulled up to ABP by a 100kΩ resistor.
22 22 SHDN
Active-Low Shutdown Input. When SHDN is pulled low, the device will reverse sequence for power-down operation. SHDN is internally pulled up to ABP by a 100kΩ resistor.
23 23 DELAY
Adjustable Sequence Delay Timing Input. Connect a capacitor from DELAY to GND to set the sequence delay between each OUT_. Leave DELAY unconnected for a 10µs (typ) delay.
24 24 TIMEOUT
Adjustable Reset Timeout Input. Connect a capacitor from TIMEOUT to GND to set the reset timeout period. Connect TIMEOUT to ABP for the fixed timeout of 128ms (typ). Leave TIMEOUT unconnected for a 10µs (typ) delay.
25 SEQ1
26 SEQ2
27 SEQ3
Sequence Order Select Inputs. SEQ1, SEQ2, and SEQ3 allow the order of sequencing for each supply to be programmable (Table 1).
28 28 CP_OUT
Charge-Pump Output. An internal charge pump boosts CP_OUT to (V
CC
+ 5V ) to provide a pullup voltage that can be used to drive external n-channel MOSFETs. CP_OUT sources up to 25µA.
25 DISC5
Discharge Pulldown Input 5. During normal operation, DISC5 is high impedance. During a fault condition or power-down, DISC5 provides an 85mA sink current.
26 OUT5
Open-Drain Output 5. When the voltage at SET4 is above 0.5V, OUT5 goes high impedance. OUT5 requires an external pullup resistor and can be pulled up to 13.2V.
27 SET5
External Set Monitored Threshold 5. Monitor a voltage by setting the threshold with an external resistive divider. The SET5 threshold is 0.5V.
——EP
Exposed Pad. EP is internally connected to GND. Connect EP to the GND plane for improved heat dissipation. Do not use EP as the only ground connection.
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