The MAX15004A/B/MAX15005A/B high-performance,
current-mode PWM controllers operate at an automotive input voltage range from 4.5V to 40V (load dump).
The input voltage can go down as low as 2.5V after
startup if VCCis supplied by an external bias voltage.
The controllers integrate all the building blocks necessary for implementing fixed-frequency isolated/nonisolated power supplies. The general-purpose boost,
flyback, forward, and SEPIC converters can be
designed with ease around the MAX15004/MAX15005.
The current-mode control architecture offers excellent
line-transient response and cycle-by-cycle current limit
while simplifying the frequency compensation.
Programmable slope compensation simplifies the
design further. A fast 60ns current-limit response time,
low 300mV current-limit threshold makes the controllers
suitable for high-efficiency, high-frequency DC-DC converters. The devices include an internal error amplifier
and 1% accurate reference to facilitate the primary-side
regulated, single-ended flyback converter or nonisolated converters.
An external resistor and capacitor network programs
the switching frequency from 15kHz to 500kHz (1MHz for
the MAX15005A/B). The MAX15004A/B/MAX15005A/B
provide a SYNC input for synchronization to an external
clock. The maximum FET-driver duty cycle for the
MAX15004A/B is 50%. The maximum duty cycle can be
set on the MAX15005A/B by selecting the right combination of RT and CT.
The input undervoltage lockout (ON/OFF) programs the
input-supply startup voltage and can be used to shutdown the converter to reduce the total shutdown current down to 10µA. Protection features include
cycle-by-cycle and hiccup current limit, output overvoltage protection, and thermal shutdown.
The MAX15004A/B/MAX15005A/B are available in
space-saving 16-pin TSSOP and thermally enhanced
16-pin TSSOP-EP packages. All devices operate over
the -40°C to +125°C automotive temperature range.
= VFB= VCS= 0V, COMP = unconnected, OUT = unconnected. TA= TJ= -40°C to +125°C, unless otherwise
noted. Typical values are at T
A
= +25°C. All voltages are referenced to PGND, unless otherwise noted.) (Note 1) (Figure 5)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to SGND.............................................................-0.3V to +45V
IN to PGND.............................................................-0.3V to +45V
ON/OFF to SGND ........................................-0.3V to (V
IN
+ 0.3V)
OVI, SLOPE, RTCT, SYNC, SS, FB, COMP,
CS to SGND.........................................-0.3V to (V
REG5
+ 0.3V)
V
CC
to PGND..........................................................-0.3V to +12V
REG5 to SGND .........................................................-0.3V to +6V
OUT to PGND.............................................-0.3V to (V
CC
+ 0.3V)
SGND to PGND .....................................................-0.3V to +0.3V
V
CC
Sink Current (clamped mode).....................................35mA
OUT Current (< 10μs transient) ..........................................±1.5A
= VFB= VCS= 0V, COMP = unconnected, OUT = unconnected. TA= TJ= -40°C to +125°C, unless otherwise
noted. Typical values are at T
A
= +25°C. All voltages are referenced to PGND, unless otherwise noted.) (Note 1) (Figure 5)
Note 1: 100% production tested at +125°C. Limits over the temperature range are guaranteed by design.
Note 2: Guaranteed by design; not production tested.
Note 3: For the MAX15005A/B, D
MAX
depends upon the value of RT. See Figure 3 and the
Oscillator Frequency/External
Synchronization
section.
Note 4: The external SYNC pulse triggers the discharge of the oscillator ramp. See Figure 2. During external SYNC, D
MAX
= 50% for
the MAX15004A/B; for the MAX15005A/B, there is a shift in D
MAX
with f
SYNC/fOSC
ratio (see the
Oscillator Frequency/
External Synchronization
section).
Note 5: The parameter is measured at the trip point of latch, with 0 ≤ V
CS
≤ 0.3V, and FB = COMP.
Note 6: Slope compensation = (2.5 x 10
-9
)/C
SLOPE
mV/μs. See the
Applications Information
section.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OUTPUT DRIVER
Driver Output Impedance
Driver Peak Output CurrentI
OVERVOLTAGE COMPARATOR
Overvoltage Comparator Input
Threshold
Overvoltage Comparator
Hysteresis
Overvoltage Comparator DelayTD
OVI Input CurrentI
THERMAL SHUTDOWN
Shutdown TemperatureT
Thermal HysteresisT
R
OUT-N
R
OUT-P
OUT-PEAK
V
OV-TH
V
OV-HYST
OVI
OVI
SHDN
HYST
VCC = 8V (applied externally),
= 100mA (sinking)
I
OUT
VCC = 8V (applied externally),
= 100mA (sourcing)
I
OUT
C
= 10nF, sinking1000
OUT
C
= 10nF, sourcing750
OUT
V
rising1.201.2281.26V
OVI
From OVI rising above 1.228V to OUT
falling, with 50mV overdrive
V
= 0 to 5V-0.5+0.5μA
OVI
Temperature rising160
1.73.5
35
125mV
1.6μs
15
Ω
mA
o
C
o
C
MAX15004/MAX15005
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
1INInput Power Supply. Bypass IN with a minimum 0.1μF ceramic capacitor to PGND.
ON/OFF Input. Connect ON/OFF to IN for always-on operation. To externally program the UVLO threshold of the
2ON/OFF
3OVI
4SLOPE
5N.C.No Connection. Not internally connected.
6RTCT
7SGNDSignal Ground. Connect SGND to SGND plane.
8SYNCExternal-Clock Synchronization Input. Connect SYNC to SGND when not using an external clock.
9SSSoft-Start Capacitor Input. Connect a capacitor from SS to SGND to set the soft-start time interval.
10FBInternal Error-Amplifier Inverting Input. The noninverting input is internally connected to SS.
11COMPError-Amplifier Output. Connect the frequency compensation network between FB and COMP.
12CS
13REG55V Low-Dropout Regulator Output. Bypass REG5 with a 1μF ceramic capacitor to SGND.
14PGNDPower Ground. Connect PGND to the power ground plane.
15OUTGate Driver Output. Connect OUT to the gate of the external n-channel MOSFET.
16V
—EP
CC
IN supply, connect a resistive divider between IN, ON/OFF, and SGND. Pull ON/OFF to SGND to disable the
controller.
Overvoltage Comparator Input. Connect a resistive divider between the output of the power supply, OVI, and
SGND to set the output overvoltage threshold.
Programmable Slope Compensation Capacitor Input. Connect a capacitor (C
of slope compensation.
Slope compensation = (2.5 x 10
Oscillator-Timing Network Input. Connect a resistor from RTCT to REG5 and a capacitor from RTCT to SGND to
set the oscillator frequency (see the Oscillator Frequency/External Synchronization section).
Current-Sense Input. The current-sense signal is compared to a signal proportional to the error-amplifier output
voltage.
7.4V Low-Dropout Regulator Output—Driver Power Source. Bypass VCC with 0.1μF and 1μF or higher ceramic
capacitors to PGND.
Exposed Pad (MAX15004A/MAX15005A only). Connect EP to the SGND plane to improve thermal performance.
Do not use the EP as an electrical connection.
-9
) / C
SLOPE
mV/μs with C
SLOPE
in farads.
) to SGND to set the amount
SLOPE
MAX15004/MAX15005
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
The MAX15004A/B/MAX15005A/B are high-performance, current-mode PWM controllers for wide inputvoltage range isolated/nonisolated power supplies.
These controllers are for use as general-purpose boost,
flyback, and SEPIC controllers. The input voltage range
of 4.5V to 40V makes it ideal in automotive applications
such as vacuum fluorescent display (VFD) power supplies. The internal low-dropout regulator (VCCregulator) enables the MAX15004A/B/MAX15005A/B to
operate directly from an automotive battery input. The
input operating range can be as low as 2.5V when an
external source (e.g. bootstrap winding output) is
applied at the VCCinput. The 2.5V to 40V input voltage
range allows device operation from cold crank to automotive load dump.
The undervoltage lockout (ON/OFF) allows the devices
to program the input-supply startup voltage and ensures
predictable operation during brownout conditions.
The devices contain two internal regulators, VCCand
REG5. The V
CC
regulator output voltage is set at 7.4V
and REG5 regulator output voltage at 5V ±2%. The
VCCoutput includes a 10.4V clamp that is capable of
sinking up to 30mA current. The input undervoltage
lockout (UVLO) circuit monitors the V
CC
voltage and
turns off the converter when the V
CC
voltage drops
below 3.5V (typ). See the
Internal Regulators VCCand
REG5
section for a method to obtain lower than 4.5V
input operation with the MAX15004/MAX15005.
An external resistor and capacitor network programs
the switching frequency from 15kHz to 500kHz. The
MAX15004A/B/MAX15005A/B provide a SYNC input for
synchronization to an external clock. The OUT (FET-driver output) duty cycle for the MAX15004A/B is 50%.
The maximum duty cycle can be set on MAX15005A/B
by selecting the right combination of RT and CT. The
RTCT discharge current is trimmed to 2%, allowing
accurate setting of the duty cycle for the MAX15005.
An internal slope-compensation circuit stabilizes the
current loop when operating at higher duty cycles and
can be programmed externally.
The MAX15004/MAX15005 include an internal error
amplifier with 1% accurate reference to regulate the
output in nonisolated topologies using a resistive
divider. The internal reference connected to the noninverting input of the error amplifier can be increased in a
controlled manner to obtain soft-start. A capacitor connected at SS to ground programs soft-start to reduce
inrush current and prevent output overshoot.
The MAX15004/MAX15005 include protection features
like hiccup current limit, output overvoltage, and thermal
shutdown. The hiccup current-limit circuit reduces the
power delivered to the electronics powered by the
MAX15004/MAX15005 converter during severe fault conditions. The overvoltage circuit senses the output using
the path different from the feedback path to provide
meaningful overvoltage protection. During continuous
high input operation, the power dissipation into the
MAX15004/MAX15005 could exceed its limit. Internal
thermal shutdown protection safely turns off the converter
when the junction heats up to 160°C.
Current-Mode Control Loop
The advantages of current-mode control overvoltagemode control are twofold. First, there is the feed-forward characteristic brought on by the controller’s ability
to adjust for variations in the input voltage on a cycleby-cycle basis. Secondly, the stability requirements of
the current-mode controller are reduced to that of a single-pole system unlike the double pole in voltage-mode
control.
The MAX15004/MAX15005 offer peak current-mode
control operation to make the power supply easy to
design with. The inherent feed-forward characteristic is
useful especially in an automotive application where the
input voltage changes fast during cold-crank and load
dump conditions. While the current-mode architecture
offers many advantages, there are some shortcomings.
For higher duty-cycle and continuous conduction mode
operation where the transformer does not discharge
during the off duty cycle, subharmonic oscillations
appear. The MAX15004/MAX15005 offer programmable
slope compensation using a single capacitor. Another
issue is noise due to turn-on of the primary switch that
may cause the premature end of the on cycle. The current-limit and PWM comparator inputs have leadingedge blanking. All the shortcomings of the
current-mode control are addressed in the MAX15004/
MAX15005, making it ideal to design for automotive
power conversion applications.
Internal Regulators VCCand REG5
The internal LDO converts the automotive battery voltage input to a 7.4V output voltage (VCC). The VCCoutput is set at 7.4V and operates in a dropout mode at
input voltages below 7.5V. The internal LDO is capable
of delivering 20mA current, enough to provide power to
internal control circuitry and the gate drive. The regulated VCCkeeps the driver output voltage well below the
absolute maximum gate voltage rating of the MOSFET
especially during the double battery and load dump
conditions. An auxiliary winding output can be fed to
the VCCoutput once the power supply is turned on.
The bootstrap winding is not necessary for proper
MAX15004/MAX15005
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
operation of the power supply; however, to reduce the
power dissipation of the internal LDO, it can be disabled by applying an external voltage higher than 7.4V
at VCC(LDO output). The LDO then stops drawing current from IN, thereby reducing the power dissipation in
the IC. The V
CC
voltage is clamped to 10.4V with 30mA
current sink in case there is a higher voltage at the bias
winding. This feature is useful in applications with continuous higher input voltage.
The second 5V LDO regulator from V
CC
to REG5 provides power to the internal control circuits. This LDO can
also be used to source 15mA of external load current.
Bypass VCCand REG5 with a parallel combination of
1μF and 0.1μF low-ESR ceramic capacitors. Additional
capacitors (up to 22μF) at VCCcan be used although
they are not necessary for proper operation of the
MAX15004/MAX15005.
Startup Operation/UVLO/ON/
OFF
The MAX15004A/B/MAX15005A/B feature two undervoltage lockouts (UVLO). The internal UVLO monitors
the VCC-regulator and turns on the converter once V
CC
rises above 3.5V. The internal UVLO circuit has about
0.5V hysteresis to avoid chattering during turn-on. Once
the power is on and the bootstrapped voltage feeds
VCC, IN voltage can drop below 4V. This feature provides operation at a cold-crank voltage as low as 2.5V.
An external undervoltage lockout can be achieved by
controlling the voltage at the ON/OFF input. The
ON/OFF input threshold is set at 1.23V (rising) with
75mV hysteresis.
Before any operation can commence, the ON/OFF voltage must exceed the 1.23V threshold.
Calculate R1 in Figure 1 by using the following formula:
where V
UVLO
is the ON/OFF’s 1.23V rising threshold,
and VONis the desired input startup voltage. Choose
an R2 value in the 100kΩ range. The UVLO circuits
keep the PWM comparator, ILIM comparator, oscillator,
and output driver shut down to reduce current consumption (see the
Functional Diagram
). The ON/OFF
input can be used to disable the MAX15004/MAX15005
and reduce the standby current to less than 20μA.
Soft-Start
The MAX15004/MAX15005 are provided with an externally adjustable soft-start function, saving a number of
external components. The SS is a 1.228V reference
bypass connection for the MAX15004A/B/MAX15005A/B
and also controls the soft-start period. At startup, after
V
IN
is applied and the UVLO thresholds are reached,
the device enters soft-start. During soft-start, 15μA is
sourced into the capacitor (CSS) connected from SS to
GND causing the reference voltage to ramp up slowly.
The HICCUP mode of operation is disabled during softstart. When VSSreaches 1.228V, the output as well as
the HICCUP mode become fully active. Set the soft-start
time (tSS) using following equation:
where tSSis in seconds and CSSis in farads.
The soft-start programmability is important to control the
input inrush current issue and also to avoid the
MAX15004/MAX15005 power supply from going into the
unintentional hiccup during the startup. The required
soft-start time depends on the topology used, currentlimit setting, output capacitance, and the load condition.
Oscillator Frequency/
External Synchronization
Use an external resistor and capacitor at RTCT to program the MAX15004A/B/MAX15005A/B internal oscillator
frequency from 15kHz to 1MHz. The MAX15004A/B output switching frequency is one-half the programmed
oscillator frequency with a 50% maximum duty-cycle
limit. The MAX15005A/B output switching frequency is
the same as the oscillator frequency. The RC network
connected to RTCT controls both the oscillator frequency
and the maximum duty cycle. The CT capacitor charges
and discharges from (0.1 x V
REG5
) to (0.55 x V
REG5
). It
charges through RT and discharges through an internal
trimmed controlled current sink. The maximum duty
cycle is inversely proportional to the discharge time
Figure 1. Setting the MAX15004A/B/MAX15005A/B
Undervoltage Lockout Threshold
). See Figures 3a and 3b for a coarse selection of capacitor values for a given switching frequency
and maximum duty cycle and then use the following
equations to calculate the resistor value to fine-tune the
switching frequency and verify the worst-case maximum
duty cycle.
where f
OSC
is the oscillator frequency, RT is a resistor
connected from RTCT to REG5, and CT is a capacitor
connected from RTCT to SGND. Verify that the oscillator frequency value meets the target. Above calculations could be repeated to fine-tune the switching
frequency.
The MAX15004A/B is a 50% maximum duty-cycle part,
while the MAX15005A/B is 100% maximum duty-cycle
part.
for the MAX15004A/B and
for the MAX15005A/B.
The MAX15004A/B/MAX15005A/B can be synchronized
using an external clock at the SYNC input. For proper
frequency synchronization, SYNC’s input frequency must
be at least 102% of the programmed internal oscillator
frequency. Connect SYNC to SGND when not using an
external clock. A rising clock edge on SYNC is interpreted as a synchronization input. If the SYNC signal is lost,
the internal oscillator takes control of the switching rate,
returning the switching frequency to that set by RC network connected to RTCT. This maintains output regulation even with intermittent SYNC signals.
Figure 2. Timing Diagram for Internal Oscillator vs. External SYNC and D
MAX
Behavior
D
MAX
=
f
OSC
t
CHARGE
=
CT
×=07.
2225
.()
VRTCT
××
3
−
ARTV
××
Us
Use ThisEquation If fk+>
ns
−
≤+500
OSC
500.......HHz
OSC
f
=
OS
CC
t
CHARGE
RT
t
DISCHAR GE
⎧
⎪
tt
⎪
⎨
⎪
⎪
tt
⎩
1
+
CHARGE DISCHARGE
CHARG E DISCHA
1 33 103 375
(.( )) . ()
................... ee This EquationIf fkHz
1
160
RRGE
MAX15004A/B (D
ff
OUTOSC
1
=
2
ff
=
OUTOSC
= 50%)
MAX
WITH SYNC
INPUT
WITHOUT
SYNC INPUT
RTCT
CLKINT
SYNC
OUT
D = 50%
MAX15005A/B (D
RTCT
CLKINT
SYNC
OUT
D = 81.25%D = 80%
MAX
= 81%)
WITH SYNC
INPUT
D = 50%
WITHOUT
SYNC INPUT
MAX15004/MAX15005
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
OUT drives the gate of an external n-channel MOSFET.
The driver is powered by the internal regulator (VCC),
internally set to approximately 7.4V. If an external voltage
higher than 7.4V is applied at VCC(up to 10V), it appears
as the peak gate drive voltage. The regulated VCCvoltage keeps the OUT voltage below the maximum gate
voltage rating of the external MOSFET. OUT can source
750mA and sink 1000mA peak current. The average current sourced by OUT depends on the switching frequency and total gate charge of the external MOSFET.
Error Amplifier
The MAX15004A/B/MAX15005A/B include an internal
error amplifier. The noninverting input of the error
amplifier is connected to the internal 1.228V reference
and feedback is provided at the inverting input. High
100dB open-loop gain and 1.6MHz unity-gain bandwidth allow good closed-loop bandwidth and transient
response. Moreover, the source and sink current capability of 2mA provides fast error correction during the
output load transient. For Figure 5, calculate the powersupply output voltage using the following equation:
where V
REF
= 1.228V. The amplifier’s noninverting input
is internally connected to a soft-start circuit that gradually increases the reference voltage during startup. This
forces the output voltage to come up in an orderly and
well-defined manner under all load conditions.
Slope Compensation
The MAX15004A/B/MAX15005A/B use an internal ramp
generator for slope compensation. The internal ramp
signal resets at the beginning of each cycle and slews
at the rate programmed by the external capacitor connected to SLOPE. The amount of slope compensation
needed depends on the downslope of the current
waveform. Adjust the MAX15004A/B/MAX15005A/B
slew rate up to 110mV/μs using the following equation:
where C
SLOPE
is the external capacitor at SLOPE in
farads.
Current Limit
The current-sense resistor (RCS), connected between
the source of the MOSFET and ground, sets the current
limit. The CS input has a voltage trip level (VCS) of
305mV. The current-sense threshold has 5% accuracy.
Set the current-limit threshold 20% higher than the peak
switch current at the rated output power and minimum
input voltage. Use the following equation to calculate
the value of R
S
:
where I
PRI
is the peak current that flows through the
MOSFET at full load and minimum VIN.
Figure 3a. MAX15005 Maximum Duty Cycle vs. Output
Frequency.
When the voltage produced by this current (through the
current-sense resistor) exceeds the current-limit comparator threshold, the MOSFET driver (OUT) quickly terminates the on-cycle. In most cases, a short-time
constant RC filter is required to filter out the leadingedge spike on the sense waveform. The amplitude and
width of the leading edge depends on the gate capacitance, drain capacitance (including interwinding capacitance), and switching speed (MOSFET turn-on time).
Set the RC time constant just long enough to suppress
the leading edge. For a given design, measure the leading spike at the highest input and rated output load to
determine the value of the RC filter.
The low 305mV current-limit threshold reduces the
power dissipation in the current-sense resistor. The current-limit threshold can be further reduced by adding
an offset to the CS input from REG5 voltage. Do not
reduce the current-limit threshold below 150mV as it
may cause noise issues. See Figure 4. For a new value
of the current-limit threshold (V
CS-LOW
), calculate the
value of R1 using the following equation.
Applications Information
Boost Converter
The MAX15004A/B/MAX15005A/B can be configured
for step-up conversion. The boost converter output can
be fed back to VCC(see Figure 5) so that the controller
can function even during cold-crank input voltage
(≤ 2.5V). Use a Schottky diode (D
VIN
) in the VINpath to
avoid backfeeding the input source. A current-limiting
resistor (R
VCC
) is also needed from the boost converter
output to VCCdepending upon the boost converter output voltage. The total current sink into VCCmust be limited to 30mA. Use the equations in the following
sections to calculate R
VCC
, inductor (L
MIN
), input
capacitor (C
IN
), and output capacitor (C
OUT
) when
using the converter in boost operation.
Inductor Selection in Boost Configuration
Using the following equation, calculate the minimum
inductor value so that the converter remains in continuous mode operation at minimum output current (I
OMIN
).
where:
and
The higher value of I
OMIN
reduces the required inductance; however, it increases the peak and RMS currents
in the switching MOSFET and inductor. Use I
OMIN
from
10% to 25% of the full load current. The VDis the forward voltage drop of the external Schottky diode, D is
the duty cycle, and VDSis the voltage drop across the
external switch. Select the inductor with low DC resistance and with a saturation current (I
SAT
) rating higher
than the peak switch current limit of the converter.
Figure 4. Reducing Current-Sense Threshold
R
475
×
.
R
1
=
0 290
.
CS
VLow
−
−
CS
V
IN
VD
L
=
MIN
2fVI
IN
×× ×
OUTOUTOMIN
VVV
+
OUTDIN
D
=
VVVV
+−
OUTDDS
2
××
η
−
REG5
MAX15004A/B
MAX15005A/B
0.3V
CURRENT-LIMIT
COMPARATOR
R1
C
CS
I(0.1 I ) to (0.25 I
N
R
CS
=××)
OMINOO
R
S
MAX15004/MAX15005
Input Capacitor Selection in Boost Configuration
The input current for the boost converter is continuous
and the RMS ripple current at the input capacitor is low.
Calculate the minimum input capacitor value and maximum ESR using the following equations:
where:
V
DS
is the total voltage drop across the external MOS-
FET plus the voltage drop across the inductor ESR. ΔI
L
is peak-to-peak inductor ripple current as calculated
above. ΔVQis the portion of input ripple due to the
capacitor discharge and ΔV
ESR
is the contribution due
to ESR of the capacitor. Assume the input capacitor ripple contribution due to ESR (ΔV
ESR
) and capacitor discharge (ΔVQ) is equal when using a combination of
ceramic and aluminum capacitors. During the converter turn-on, a large current is drawn from the input
source especially at high output to input differential.
The MAX15004/MAX15005 are provided with a programmable soft-start, however, a large storage capacitor at the input may be necessary to avoid chattering
due to finite hysteresis.
Output Capacitor Selection in Boost Configuration
For the boost converter, the output capacitor supplies
the load current when the main switch is on. The
required output capacitance is high, especially at higher
duty cycles. Also, the output capacitor ESR needs to be
low enough to minimize the voltage drop due to the ESR
while supporting the load current. Use the following
equations to calculate the output capacitor, for a specified output ripple. All ripple values are peak-to-peak.
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
IOis the load current, ΔVQis the portion of the ripple due
to the capacitor discharge, and ΔV
ESR
is the contribution
due to the ESR of the capacitor. D
MAX
is the maximum
duty cycle at the minimum input voltage. Use a combination of low-ESR ceramic and high-value, low-cost aluminum capacitors for lower output ripple and noise.
Calculating Power Loss in Boost Converter
The MAX15004A/MAX15005A devices are available in
a thermally enhanced package and can dissipate up to
1.7W at +70°C ambient temperature. The total power
dissipation in the package must be limited so that the
junction temperature does not exceed its absolute maximum rating of +150°C at maximum ambient temperature; however, Maxim recommends operating the
junction at about +125°C for better reliability.
The average supply current (I
DRIVE-GATE
) required by
the switch driver is:
where Qgis total gate charge at 7.4V, a number available from MOSFET datasheet.
The supply current in the MAX15004A/B/MAX15005A/B
is dependent on the switching frequency. See the
Typical Operating Characteristics
to find the supply
current I
SUPPLY
of the MAX15004A/B/MAX15005A/B at
a given operating frequency. The total power dissipation (PT) in the device due to supply current (I
SUPPLY
)
and the current required to drive the switch (I
DRIVE-
GATE
) is calculated using following equation.
MOSFET Selection in Boost Converter
The MAX15004A/B/MAX15005A/B drive a wide variety of
n-channel power MOSFETs. Since VCClimits the OUT
output peak gate-drive voltage to no more than 11V, a
12V (max) gate voltage-rated MOSFET can be used without an additional clamp. Best performance, especially at
low-input voltages (5VIN), is achieved with low-threshold
n-channel MOSFETs that specify on-resistance with a
gate-source voltage (VGS) of 2.5V or less. When selecting
the MOSFET, key parameters can include:
1) Total gate charge (Qg).
2) Reverse-transfer capacitance or charge (C
RSS
).
3) On-resistance (R
DS(ON)
).
4) Maximum drain-to-source voltage (V
DS(MAX)
).
5) Maximum gate frequencies threshold voltage
(V
TH(MAX)
).
At high switching, dynamic characteristics (parameters 1
and 2 of the above list) that predict switching losses
have more impact on efficiency than R
DS(ON)
, which pre-
dicts DC losses. Q
g
includes all capacitances associat-
ed with charging the gate. The V
DS(MAX)
of the selected
MOSFET must be greater than the maximum output voltage setting plus a diode drop. The 10V additional margin
is recommended for spikes at the MOSFET drain due to
the inductance in the rectifier diode and output capacitor
path. In addition, Qghelps predict the current needed to
drive the gate at the selected operating frequency when
the internal LDO is driving the MOSFET.
Slope Compensation in Boost Configuration
The MAX15004A/B/MAX15005A/B use an internal ramp
generator for slope compensation to stabilize the current
loop when operating at duty cycles above 50%. It is
advisable to add some slope compensation even at lower
than 50% duty cycle to improve the noise immunity. The
slope compensations should be optimized because too
much slope compensation can turn the converter into the
voltage-mode control. The amount of slope compensation
required depends on the downslope of the inductor current when the main switch is off. The inductor downslope
depends on the input to output voltage differential of the
boost converter, inductor value, and the switching frequency. Theoretically, the compensation slope should be
equal to 50% of the inductor downslope; however, a little
higher than 50% slope is advised.
Use the following equation to calculate the required
compensating slope (mc) for the boost converter:
The internal ramp signal resets at the beginning of
each cycle and slews at the rate programmed by the
external capacitor connected to SLOPE. Adjust the
MAX15004A/B/MAX15005A/B slew rate up to 110mV/μs
using the following equation:
The VCCexternal supply series resistor should be sized
to provide enough average current from V
OUT
to drive
the external MOSFET (I
DRIVE
) and I
SUPPLY
. The VCCis
clamped internally to 10.4V and capable of sinking
30mA current. The V
CC
resistor must be high enough to
limit the V
CC
sink current below 30mA at the highest
output voltage. Maintain the VCCvoltage to 8V while
feeding the power from V
OUT
to VCC. For a regulated
output voltage of V
OUT
, calculate the R
VCC
using the
following equation:
See Figure 5 and the
Power Dissipation
section for the
values of I
SUPPLY
and I
DRIVE
.
Flyback Converter
The choice of the conversion topology is the first stage
in power-supply design. The topology selection criteria
include input voltage range, output voltage, peak currents in the primary and secondary circuits, efficiency,
form factor, and cost.
For an output power of less than 50W and a 1:2 input
voltage range with small form factor requirements, the
flyback topology is the best choice. It uses a minimum
of components, thereby reducing cost and form factor.
The flyback converter can be designed to operate
either in continuous or discontinuous mode of operation. In discontinuous mode of operation, the transformer core completes its energy transfer during the
off-cycle, while in continuous mode of operation, the
next cycle begins before the energy transfer is complete. The discontinuous mode of operation is chosen
for the present example for the following reasons:
• It maximizes the energy storage in the magnetic
component, thereby reducing size.
• Simplifies the dynamic stability compensation design
(no right-half plane zero).
• Higher unity-gain bandwidth.
A major disadvantage of discontinuous mode operation
is the higher peak-to-average current ratio in the primary
and secondary circuits. Higher peak-to-average current
means higher RMS current, and therefore, higher loss
and lower efficiency. For low-power converters, the
advantages of using discontinuous mode easily surpass
the possible disadvantages. Moreover, the drive capability of the MAX15004/MAX15005 is good enough to drive
a large switching MOSFET. With the presently available
MOSFETs, power output of up to 50W is easily achiev-
able with a discontinuous mode flyback topology using
the MAX15004/MAX15005 in automotive applications.
Transformer Design
Step-by-step transformer specification design for a discontinuous flyback example is explained below.
Follow the steps below for the discontinuous mode
transformer:
Step 1) Calculate the secondary winding inductance
for guaranteed core discharge within a minimum off-time.
Step 2) Calculate primary winding inductance for suffi-
cient energy to support the maximum load.
Step 3) Calculate the secondary and bias winding
turns ratios.
Step 4) Calculate the RMS current in the primary and
estimate the secondary RMS current.
Step 5) Consider proper sequencing of windings and
transformer construction for low leakage.
Step 1) As discussed earlier, the core must be discharged during the off-cycle for discontinuous mode
operation. The secondary inductance determines the
time required to discharge the core. Use the following
equations to calculate the secondary inductance:
where:
D
OFFMIN
= minimum D
OFF
.
VD= secondary diode forward voltage drop.
I
OUT
= maximum output rated current.
Step 2) The rising current in the primary builds the
energy stored in the core during on-time, which is then
released to deliver the output power during the off-time.
Primary inductance is then calculated to store enough
energy during the on-time to support the maximum output power.
Step 3) Calculate the secondary to primary turns ratio
(N
SP
) and the bias winding to primary turns ratio (NBP)
using the following equations:
and
The forward bias drops of the secondary diode and the
bias rectifier diode are assumed to be 0.35V and 0.7V,
respectively. Refer to the diode manufacturer’s
datasheet to verify these numbers.
Step 4) The transformer manufacturer needs the RMS
current maximum values in the primary, secondary, and
bias windings to design the wire diameter for the different windings. Use only wires with a diameter smaller
than 28AWG to keep skin effect losses under control.
To achieve the required copper cross-section, multiple
wires must be used in parallel. Multifilar windings are
common in high-frequency converters. Maximum RMS
currents in the primary and secondary occur at 50%
duty cycle (minimum input voltage) and maximum output power. Use the following equations to calculate the
primary and secondary RMS currents:
The bias current for most MAX15004/MAX15005 applications is about 20mA and the selection of wire depends
more on convenience than on current capacity.
Step 5) The winding technique and the windings
sequence is important to reduce the leakage inductance spike at switch turn-off. For example, interleave
the secondary between two primary halves. Keep the
bias winding close to the secondary, so that the bias
voltage tracks the output voltage.
MOSFET Selection
MOSFET selection criteria include the maximum drain
voltage, peak/RMS current in the primary and the maximum-allowable power dissipation of the package without exceeding the junction temperature limits. The
voltage seen by the MOSFET drain is the sum of the
input voltage, the reflected secondary voltage through
transformer turns ratio and the leakage inductance
spike. The MOSFET’s absolute maximum V
DS
rating
must be higher than the worst-case (maximum input
voltage and output load) drain voltage.
Lower maximum VDSrequirement means a shorter
channel, lower R
DS-ON
, lower gate charge, and smaller
package. A lower N
P/NS
ratio allows a low V
DSMAX
specification and keeps the leakage inductance spike
under control. A resistor/diode/capacitor snubber network can be also used to suppress the leakage inductance spike.
The DC losses in the MOSFET can be calculated using
the value for the primary RMS maximum current.
Switching losses in the MOSFET depend on the operating frequency, total gate charge, and the transition loss
during turn-off. There are no transition losses during
turn-on since the primary current starts from zero in the
discontinuous conduction mode. MOSFET derating
may be necessary to avoid damage during system
turn-on and any other fault conditions. Use the following
equation to estimate the power dissipation due to the
power MOSFET:
where:
Qg= Total gate charge of the MOSFET (C) at 7.4V
VIN= Input voltage (V)
t
OFF
= Turn-off time (s)
CDS= Drain-to-source capacitance (F)
Output Filter Design
The output capacitance requirements for the flyback
converter depend on the peak-to-peak ripple acceptable at the load. The output capacitor supports the load
current during the switch on-time. During the off-cycle,
the transformer secondary discharges the core replenishing the lost charge and simultaneously supplies the
load current. The output ripple is the sum of the voltage
drop due to charge loss during the switch on-time and
the ESR of the output capacitor. The high switching frequency of the MAX15004/MAX15005 reduces the
capacitance requirement.
N
==
SP
N
N
L
S
P
S
L
P
N
N
BP
BIAS
==
NV
POUT
11 7
+
035..
I
PRMS
I
SRMS
=
053.η
=
0053. × D
P
DV
×××
MAXINMIN
I
OUT
OFFMAX
OUT
D
OFFMAX
D
MAX
×
VV
DSMAXINMAX
=+×+
⎡
N
P
⎢
⎢
⎣
VVV
N
OUTDSPIKE
S
⎤
+()
⎥
⎥
⎦
PRIQVf
=××+×× +(.) ()
MOSDSONPRMSgINOUTMAX
14
V
IINMAXPKOFFOUTMAX
(
+
2
It f
×× ×
4
2
××
CV f
DSDSOUTMAX
2
)
MAX15004/MAX15005
An additional small LC filter may be necessary to suppress the remaining low-energy high-frequency spikes.
The LC filter also helps attenuate the switching frequency ripple. Care must be taken to avoid any compensation problems due to the insertion of the additional LC
filter. Design the LC filter with a corner frequency at more
than a decade higher than the estimated closed-loop,
unity-gain bandwidth to minimize its effect on the phase
margin. Use 1μF to 10μF low-ESR ceramic capacitors
and calculate the inductance using following equation:
where fC= estimated converter closed-loop unity-gain
frequency.
SEPIC Converter
The MAX15004A/B/MAX15005A/B can be configured
for SEPIC conversion when the output voltage must be
lower and higher than the input voltage when the input
voltage varies through the operating range. The dutycycle equation:
indicates that the output voltage is lower than the input
for a duty cycle lower than 0.5 while V
OUT
is higher
than the input at a duty cycle higher than 0.5. The
inherent advantage of the SEPIC topology over the
boost converter is a complete isolation of the output
from the source during a fault at the output. For the
MAX15004/MAX15005, the SEPIC converter output can
be fed back to VCC(Figure 6), so that the controller can
function even during cold-crank input voltage (≤ 2.5V).
Use a Schottky diode (D
VIN
) in the VINpath to avoid
backfeeding the input source. A current-limiting resistor
(R
VCC
) is also needed from the output to VCCdepend-
ing upon the converter output voltage. The total V
CC
current sink must be limited to 25mA. See the
Selecting
VCCResistor (R
VCC
)
section to calculate the optimum
value of the VCCresistor.
The SEPIC converter design includes sizing of inductors, a MOSFET, series capacitance, and the rectifier
diode. The inductance is determined by the allowable
ripple current through all the components mentioned
above. Lower ripple current means lower peak and RMS
currents and lower losses. The higher inductance value
needed for a lower ripple current means a larger-sized
inductor, which is a more expensive solution. The inductors L1 and L2 can be independent, however, winding
them on the same core reduces the ripple currents.
Calculate the maximum duty cycle using the following
equation and choose the RT and CT values accordingly
for a given switching frequency (see the
Oscillator
Frequency/External Synchronization
section).
where VDis the forward voltage of the Schottky diode,
VCS(0.305V) is the current-sense threshold of the
MAX15004/MAX15005, and VDSis the voltage drop
across the switching MOSFET during the on-time.
Inductor Selection in SEPIC Converter
Use the following equations to calculate the inductance
values. Assume both L1 and L2 are equal and that the
inductor ripple current (ΔIL) is equal to 20% of the input
current at nominal input voltage to calculate the inductance value.
where f
OUT
is the converter switching frequency and η
is the targeted system efficiency. Use the coupled
inductors MSD-series from Coilcraft or PF0553-series
from Pulse Engineering, Inc. Make sure the inductor
saturating current rating (I
SAT
) is 30% higher than the
peak inductor current calculated using the following
equation. Use the current-sense resistor calculated
based on the I
LPK
value from the equation below (see
the
Current Limit
section).
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
For the SEPIC configuration, choose an n-channel
MOSFET with a VDSrating at least 20% higher than the
sum of the output and input voltages. When operating
at a high switching frequency, the gate charge and
switching losses become significant. Use low gatecharge MOSFETs. The RMS current of the MOSFET is:
where I
LDC
= (I
LPK
- ΔIL).
Use Schottky diodes for higher conversion efficiency.
The reverse voltage rating of the Schottky diode must
be higher than the sum of the maximum input voltage
(V
IN-MAX
) and the output voltage. Since the average
current flowing through the diode is equal to the output
current, choose the diode with forward current rating of
I
OUT-MAX
. The current sense (RS) can be calculated
using the current-limit threshold (0.305V) of
MAX15004/MAX15005 and I
LPK
. Use a diode with a forward current rating more than the maximum output current limit if the SEPIC converter needs to be output
short-circuit protected.
Select R
CS
20% below the value calculated above.
Calculate the output current limit using the following
equation:
where D is the duty cycle at the highest input voltage
(V
IN-MAX
).
The series capacitor should be chosen for minimum ripple voltage (ΔV
CP
) across the capacitor. We recommend
using a maximum ripple ΔVCPto be 5% of the minimum
input voltage (V
IN-MIN
) when operating at the minimum
input voltage. The multilayer ceramic capacitor X5R and
X7R series are recommended due to their high ripple
current capability and low ESR. Use the following equation to calculate the series capacitor CP value.
where ΔV
CP
is 0.05 x V
IN-MIN
.
For a further discussion of SEPIC converters, go to
http://pdfserv.maxim-ic.com/en/an/AN1051.pdf.
Power Dissipation
The MAX15004/MAX15005 maximum power dissipation
depends on the thermal resistance from the die to the
ambient environment and the ambient temperature. The
thermal resistance depends on the device package,
PCB copper area, other thermal mass, and airflow.
Calculate the temperature rise of the die using following
equation:
TJ= TC+ (PTx θJC)
or
TJ= TA+ (PTx θJA)
where θJCis the junction-to-case thermal impedance
(3°C/W) of the 16-pin TSSOP-EP package and PTis
power dissipated in the device. Solder the exposed
pad of the package to a large copper area to spread
heat through the board surface, minimizing the case-toambient thermal impedance. Measure the temperature
of the copper area near the device (TC) at worst-case
condition of power dissipation and use 3°C/W as θ
JC
thermal impedance. The case-to-ambient thermal
impedance (θJA) is dependent on how well the heat is
transferred from the PCB to the ambient. Use a large
copper area to keep the PCB temperature low. The θ
JA
is 38°C/W for TSSOP-16-EP and 90°C/W for TSSOP-16
package with the condition specified by the JEDEC51
standard for a multilayer board.
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dv/dt
surfaces. For example, traces that carry the drain current often form high di/dt loops. Similarly, the heatsink
of the MOSFET connected to the device drain presents
a dv/dt source; therefore, minimize the surface area of
the heatsink as much as possible. Keep all PCB traces
carrying switching currents as short as possible to minimize current loops. Use a ground plane for best results.
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Refer to the
MAX15005 EV kit data sheet for a specific layout example. Use a multilayer board whenever possible for better noise immunity. Follow these guidelines for good
PCB layout:
1) Use a large copper plane under the package and
solder it to the exposed pad. To effectively use this
copper area as a heat exchanger between the PCB
and ambient, expose this copper area on the top
and bottom side of the PCB.
2) Do not connect the connection from SGND (pin 7)
to the EP copper plane underneath the IC. Use midlayer-1 as an SGND plane when using a multilayer
board.
3) Isolate the power components and high-current
path from the sensitive analog circuitry.
4) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable, jitter-free operation.
5) Connect SGND and PGND together close to the
device at the return terminal of VCCbypass capacitor. Do not connect them together anywhere else.
6) Keep the power traces and load connections short.
This practice is essential for high efficiency. Use
thick copper PCBs (2oz vs. 1oz) to enhance fullload efficiency.
7) Ensure that the feedback connection to FB is short
and direct.
8) Route high-speed switching nodes away from the
sensitive analog areas. Use an internal PCB layer
for SGND as an EMI shield to keep radiated noise
away from the device, feedback dividers, and analog bypass capacitors.
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages
. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TSSOPU16+2
21-006690-0117
16 TSSOP-EPU16E+3
21-010890-0120
TOP VIEW
ON/OFF
RTCT
OVI
N.C.
+
V
IN
1
2
3
MAX15004A
4
MAX15005A
5
6
7
EP
16
CC
15
OUT
14
PGND
13
REG5SLOPE
12
CS
11
COMP
10
FBSGND
98SSSYNC
TSSOP-EP
ON/OFF
OVI
N.C.
RTCT
+
IN
1
2
3
MAX15004B
4
MAX15005B
5
6
7
V
16
CC
OUT
15
PGND
14
REG5SLOPE
13
12
CS
11
COMP
10
FBSGND
98SSSYNC
TSSOP
MAX15004/MAX15005
4.5V to 40V Input Automotive
Flyback/Boost/SEPIC Power-Supply Controllers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________