The MAX14984 is a complete VGA port protector with dual
USB power switches. The device features all the circuitry
required to detect the insertion and removal of a monitor
and automatically connect the graphics controller when a
monitor is detected. A switched 5V output provides up to
55mA to the VGA port in addition to normal VGA signals.
The MAX14984 features a single active-low enable
input to control two 5V USB switches. Each switch supplies 500mA of current with less than 250mV drop from
VCC, and is protected against short-circuit faults. Two
active-low fault outputs indicate when a fault condition is
detected on either output.
High-bandwidth analog switches exceed VESA rise/ fall
time requirements for the RGB channels. The horizontal
and vertical synchronization (H/V) buffers shift logic levels to support +2.5V to +5.0V CMOS or TTL-compatible
graphics controllers while meeting the VESA drive capability requirement of Q8mA. An internal 2.5V regulator
and pullup resistors on the monitor side translate the
DDC voltage levels to be compatible with low-voltage
graphics controllers.
The MAX14984 features high-ESD protection of Q8kV
Human Body Model (HBM) on all VGA and USB outputs. The device is available in a 24-pin (4mm x 4mm)
TQFN package and is specified over the -40NC to +85NC
extended temperature range.
Applications
Servers
Workstations
Desktop PCs
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX14984.related.
Benefits and Features
SDesign Flexibility
Graphics Controller Port Is Protected when
VCC = 0V
External Pullup Resistors Match DDC Channel
to Graphics Controller Supply
Up to Two USB Ports Supported
SHigh Level of Integration for Performance
S5V Provides +5V at 55mA to VGA Port
Internal Pullup Resistors on DDC Outputs to S5V
Low 6pF (typ) RGB Capacitance
2.1ns (typ) tR/tF with 10pF, 2.2kI Load on
Monitor-Side SYNC Signals
Source and Sink 8mA While Meeting Speed
Requirements
High-ESD Protection on VGA and USB Outputs Q8kV Human Body Model (HBM)
SSaves Space on Board
Internal USB Switches
Pass +5V at 500mA with 250mV (max)
IR Drop
Current Limited/Thermal Protection
4mm x 4mm, 24-Pin TQFN Package
Note 1: When F1 and F2 are connected to a voltage higher than VCC, some current will be sinked (see the Detailed Description).
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V Q 5%, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 5.0V and TA = +25NC.) (Note 3)
(VCC = 5.0V Q 5%, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 5.0V and TA = +25NC.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNIT
DDC SWITCHES (SDA0, SCL0, SDA1, SCL1)
SDA1/SCL1 Off-Leakage
Current
SDA0/SCL0 Off-Leakage
Current
On-ResistanceR
LOGIC INPUTS (H0, V0, ENV, ENU)
Input Logic-LowV
Input Logic-HighV
Input Leakage CurrentI
Input Hysteresis (H0, V0)V
PUSH-PULL LOGIC OUTPUTS (H1, V1)
Output Logic-LowV
Output Logic-HighV
Rise/Fall TimetR, t
OPEN-DRAIN LOGIC OUTPUTS (F1, F2, MD)
Output Leakage CurrentI
Output Logic-LowV
RGB ANALOG SWITCHES (R0, G0, B0, R1, G1, B1)
Bandwidthf
On-LossI
On-ResistanceR
On-Resistance Matching
On-Resistance FlatnessR
On-CapacitanceC
Off-CapacitanceC
PROTECTION SPECIFICATIONS
High-ESD Pins ESD
Protection
All Other Pins ESD
Protection
Thermal-Shutdown
Threshold
Thermal-Shutdown
Hysteresis
Note 3: All units are production tested at TA = +25NC. Specifications over temperature are guaranteed by design.
Note 4: t
Note 5: See the Pin Description section for the ESD status of each pin.
Note 6: Terminal tested vs. GND. Apply 1FF-bypass capacitors on VCC, USB1, USB2, and S5V.
is the period between detecting an overcurrent condition and the fault output asserting.
Figure 1. Timing Diagram for USB Switch Parameters
+5V
1µF
V
0V
ENV
CC
R0, G0, B0
MAX14984
R1, G1, B1
GND
90%90%
10%10%
NETWORK
ANALYZER
V
IN
V
OUT
50I
MEASREF
50I50I
50I
ON-LOSS = 20log
V
OUT
V
IN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
ON-LOSS IS MEASURED BETWEEN R0 AND R1 ON EACH SWITCH.
SIGNAL DIRECTION THROUGH IS REVERSED; WORST VALUES ARE RECORDED.
*CONNECT THE EXPOSED PAD (EP/GND) TO THE GROUND PLANE.
Pin Description
PINNAMEFUNCTIONESD
1R0RGB Analog InputStandard
2G0RGB Analog InputStandard
3B0RGB Analog InputStandard
4H0Horizontal Sync InputStandard
5V0Vertical Sync InputStandard
6
7
8
MDMonitor Detect Output. MD is an active-low, open-drain output.
F1
F2
Fault Output 1. F1 is an active-low, open-drain output that asserts when a fault
condition is detected on USB1.
Fault Output 2. F2 is an active-low, open-drain output that asserts when a fault
condition is detected on USB2.
9USB15V USB Power Output 1. USB1 is internally pulled down when not enabled.High
10USB25V USB Power Output 2. USB2 is internally pulled down when not enabled.High
11
12
ENVVideo Enable Input. Drive ENV low to connect the VGA signals to the VGA port.
ENUUSB Enable Input. Drive ENU low to enable the USB power-supply outputs.
The MAX14984 integrates high-bandwidth analog
switches and level-translating buffers with current-limited
power switches to implement a VGA port protector. The
device provides switching for red-green-blue (RGB)
signals, horizontal and vertical synchronization (H/V)
pulses, display data channel (DDC) signals, and 5V
power supplies. The power switches provide +5V power
with current limiting and reverse voltage protection to the
VGA port and up to two USB ports.
The device uses a simplified power-supply interface
that operates from a single +5V supply. An internal 2.5V
regulator limits the voltage passed by the DDC switches to
provide compatibility with low-voltage graphics controllers.
The device features two enable inputs, a monitor detection output, and two fault outputs. ENV can be connected
to MD to automatically connect the graphics signal when
a monitor is inserted. The fault outputs signal when a fault
condition is detected on either of the USB power outputs
and they are enabled by ENU.
5V Power Switch (S5V)
The MAX14984 provides a switched +5V output in addition to the regular VGA signals (S5V). This output can
supply 55mA with less than 300mV drop from VCC. The
S5V output tolerates +5V while turned off or when VCC is
not present.
The power switches are protected against overcurrent
and overtemperature faults. The device limits current
supplied to the monitor side to 300mA (typ). Thermal
protection circuitry shuts off the switch when the temperature exceeds +155NC. The device is re-enabled once
the temperature has fallen to below +130NC.
S5V is connected whenever ENV is low and has a 200I
(typ) pulldown resistor to discharge filter capacitors when
the switch is off.
USB Switches and F1/F2 Outputs
The MAX14984 features two switches that provide power
for up to two USB connectors. One enable input, ENU,
controls both switches simultaneously. Each switch can
provide up to 500mA while only dropping 250mV from
VCC.
Two active-low fault outputs, F1 and F2, assert when a
fault is detected on USB1 or USB2, respectively. Two
fault conditions can be detected: short circuit to GND
and overcurrent draw from the USB port. The switches
are protected against reverse current into VCC while ENU
is high, but this condition is not detected by F1 and F2.
Current-limiting and thermal-shutdown circuitry protects
the device in the presence of any fault.
A blanking period is built in to F1 and F2 that delays
assertion until the current limit has been reached for at
least t
tor is connected on each USB output when it is disabled.
The F1 and F2 outputs are tolerant to external voltages
of up to 6V. The MAX14984 limits the current into them
to 600FA.
. In addition, an internal 1kI pulldown resis-
BLANK
RGB Switches
The MAX14984 provides three single-pole/single-throw
(SPST) high-bandwidth switches to connect the standard
VGA R, G, and B signals from the graphics controller to
the VGA port. The R, G, B analog switches are identical,
and any of the three switches can be used to route red,
green, or blue video signals.
The RGB switches are connected when ENV is low.
Horizontal/Vertical Sync Buffer
The H/V signals are buffered to provide level shifting and
drive capability to meet the VESA specification.
H1 and V1 are enabled when ENV is low and high impedance when ENV is high. The H and V channels are not
interchangeable.
Display Data Channel Switches
(SDA_, SCL_)
The MAX14984 provides two voltage-limited SPST
switches to connect DDC signals (SDA_, SCL_). These
switches limit the voltage that can be passed through to
the graphics controller to less than 2.5V. Internal pullup
resistors on the monitor side of the switches translate
the graphics controller signals to 5V compatible logic.
Connect pullup resistors on SCL0 and SDA0 to define the
logic level of the graphics controller.
The SDA_ and SCL_ switches are connected when ENV
is low and are identical; either switch can be used to
route SDA or SCL I2C signals.
The MAX14984 detects monitor insertion/removal events
by measuring the voltage on B1. The monitor detection
circuitry always correctly indicates the presence of a
monitor as long as V0 is not high impedance. The voltage measurement is only sampled between synchronization pulses on V0 from the controller when a monitor is
inserted to ensure that the video signal is not interrupted
while promptly detecting a removal.
The device automatically connects the graphics controller to the monitor when it is plugged in if configured in
automatic mode. To configure automatic mode, connect
MD to ENV and add a pullup resistor.
Applications Information
Compatibility with Low-Voltage
Graphics Controllers
The MAX14984 provides the level shifting necessary to
drive a standard VGA port using any graphics controller.
Internal buffers drive the H and V signals to VGA standard TTL levels. The DDC switches provide level shifting
by limiting signal levels that can be passed through the
DDC switches to less than 2.5V. Add pullup resistors
from the DDC lines to the graphics controller supply to
set the logic level on the SDA0/SCL0 side.
Power-Supply Decoupling
Bypass VCC to ground with a 1FF or larger ceramic
capacitor as close to the device as possible.
PC Board Layout
High-speed switches such as the MAX14984 require
proper PCB layout for optimum performance. Ensure that
impedance-controlled PCB traces for high-speed signals
are matched in length and as short as possible. Connect
the exposed pad to a solid ground plane.
High ESD Protection
Electrostatic Discharge (ESD) protection structures are
incorporated on all pins to protect against electrostatic
discharges up to Q2kV Human Body Model (HBM)
encountered during handling and assembly. All VGA
and USB outputs are further protected against ESD up to
Q8kV (HBM) without damage (see the Pin Description).
The ESD structures withstand high ESD both in normal
operation and when the device is powered down. After
an ESD event, the MAX14984 continues to function without latchup.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 3 shows the Human Body Model. Figure 4 shows
the current waveform it generates when discharged
into a low impedance. This model consists of a 100pF
capacitor charged to the ESD voltage of interest that is
then discharged into the device through a 1.5kI resistor.
I
(AMPS)
R
C
1MΩ
CHARGE-CURRENT-
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
SOURCE
Figure 3. Human Body ESD Test ModelFigure 4. Human Body Current Waveform
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed paddle.
-40NC to +85NC
24 TQFN-EP*
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 12