The MAX14984 is a complete VGA port protector with dual
USB power switches. The device features all the circuitry
required to detect the insertion and removal of a monitor
and automatically connect the graphics controller when a
monitor is detected. A switched 5V output provides up to
55mA to the VGA port in addition to normal VGA signals.
The MAX14984 features a single active-low enable
input to control two 5V USB switches. Each switch supplies 500mA of current with less than 250mV drop from
VCC, and is protected against short-circuit faults. Two
active-low fault outputs indicate when a fault condition is
detected on either output.
High-bandwidth analog switches exceed VESA rise/ fall
time requirements for the RGB channels. The horizontal
and vertical synchronization (H/V) buffers shift logic levels to support +2.5V to +5.0V CMOS or TTL-compatible
graphics controllers while meeting the VESA drive capability requirement of Q8mA. An internal 2.5V regulator
and pullup resistors on the monitor side translate the
DDC voltage levels to be compatible with low-voltage
graphics controllers.
The MAX14984 features high-ESD protection of Q8kV
Human Body Model (HBM) on all VGA and USB outputs. The device is available in a 24-pin (4mm x 4mm)
TQFN package and is specified over the -40NC to +85NC
extended temperature range.
Applications
Servers
Workstations
Desktop PCs
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX14984.related.
Benefits and Features
SDesign Flexibility
Graphics Controller Port Is Protected when
VCC = 0V
External Pullup Resistors Match DDC Channel
to Graphics Controller Supply
Up to Two USB Ports Supported
SHigh Level of Integration for Performance
S5V Provides +5V at 55mA to VGA Port
Internal Pullup Resistors on DDC Outputs to S5V
Low 6pF (typ) RGB Capacitance
2.1ns (typ) tR/tF with 10pF, 2.2kI Load on
Monitor-Side SYNC Signals
Source and Sink 8mA While Meeting Speed
Requirements
High-ESD Protection on VGA and USB Outputs Q8kV Human Body Model (HBM)
SSaves Space on Board
Internal USB Switches
Pass +5V at 500mA with 250mV (max)
IR Drop
Current Limited/Thermal Protection
4mm x 4mm, 24-Pin TQFN Package
Note 1: When F1 and F2 are connected to a voltage higher than VCC, some current will be sinked (see the Detailed Description).
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 5.0V Q 5%, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 5.0V and TA = +25NC.) (Note 3)
(VCC = 5.0V Q 5%, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = 5.0V and TA = +25NC.) (Note 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNIT
DDC SWITCHES (SDA0, SCL0, SDA1, SCL1)
SDA1/SCL1 Off-Leakage
Current
SDA0/SCL0 Off-Leakage
Current
On-ResistanceR
LOGIC INPUTS (H0, V0, ENV, ENU)
Input Logic-LowV
Input Logic-HighV
Input Leakage CurrentI
Input Hysteresis (H0, V0)V
PUSH-PULL LOGIC OUTPUTS (H1, V1)
Output Logic-LowV
Output Logic-HighV
Rise/Fall TimetR, t
OPEN-DRAIN LOGIC OUTPUTS (F1, F2, MD)
Output Leakage CurrentI
Output Logic-LowV
RGB ANALOG SWITCHES (R0, G0, B0, R1, G1, B1)
Bandwidthf
On-LossI
On-ResistanceR
On-Resistance Matching
On-Resistance FlatnessR
On-CapacitanceC
Off-CapacitanceC
PROTECTION SPECIFICATIONS
High-ESD Pins ESD
Protection
All Other Pins ESD
Protection
Thermal-Shutdown
Threshold
Thermal-Shutdown
Hysteresis
Note 3: All units are production tested at TA = +25NC. Specifications over temperature are guaranteed by design.
Note 4: t
Note 5: See the Pin Description section for the ESD status of each pin.
Note 6: Terminal tested vs. GND. Apply 1FF-bypass capacitors on VCC, USB1, USB2, and S5V.
is the period between detecting an overcurrent condition and the fault output asserting.
Figure 1. Timing Diagram for USB Switch Parameters
+5V
1µF
V
0V
ENV
CC
R0, G0, B0
MAX14984
R1, G1, B1
GND
90%90%
10%10%
NETWORK
ANALYZER
V
IN
V
OUT
50I
MEASREF
50I50I
50I
ON-LOSS = 20log
V
OUT
V
IN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
ON-LOSS IS MEASURED BETWEEN R0 AND R1 ON EACH SWITCH.
SIGNAL DIRECTION THROUGH IS REVERSED; WORST VALUES ARE RECORDED.