19-5965; Rev 0; 6/11
MAX14950A
Single-Lane PCIe Equalizer/Redriver
General Description
The MAX14950A dual equalizer/redriver improves PCI
Express® (PCIe) signal integrity by providing programmable input equalization. This feature reduces deterministic jitter and redrives circuitry to reestablish deemphasis, which compensates for circuit-board loss at high
frequencies. The device permits optimal placement of
key PCIe components and allows for longer runs of stripline, microstrip, or cable.
The device contains two identical channels capable
of equalizing PCIe Gen III (8GT/s), Gen II (5GT/s), and
Gen I (2.5GT/s) signals and features electrical idle and
receiver detection.
The MAX14950A is available in a small, 40-pin, 5.0mm
x 5.0mm TQFN package with flow-through traces for
optimal layout and minimal space requirements. It is
specified over the 0N C to +70N C commercial operating
temperature range.
Applications
Servers
Industrial PCs
Test Equipment
Computers
External Graphics Applications
Communications Switchers
Storage Area Networks
Benefits and Features
S Innovative Design Eliminates Need for Costly
External Components
Single +3.3V Supply Operation
S Increased Design Flexibility for Backward-
Compatible Applications
Optimized for PCIe Gen III (8GT/s) and
Gen II (5GT/s) Signals and Compatible with
Gen I (2.5GT/s) Signals
S High Level of Integration for Performance
Very Low Latency With 160ps (typ) Propagation
Delay
PCIe Gen III (8GT/s)-Compliant Input/Output
Return Loss
Four-Level-Programmable Input Equalization
Eight-Level-Programmable Output Emphasis
Electrical Idle Detection
Receiver Detection Permits Completely
Transparent Operation
S Ideal for Space-Sensitive Applications
On-Chip 50I Input/Output Terminations
40-Pin, 5.0mm x 5.0mm TQFN Packaging
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to www.maxim-ic.com/MAX14950A.related .
Typical Operating Circuit
MAIN BOARD
Tx
PCIe
Rx
PCI Express is a registered service mark of PCI-SIG Corporation.
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MAX14950A
MIDPLANE
SINGLE DIFFERENTIAL PAIR
SINGLE DIFFERENTIAL PAIR
CONNECTORS
REMOTE BOARD
Rx
PCIe
Tx
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX14950A
Single-Lane PCIe Equalizer/Redriver
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND.)
VCC ....................................................................... -0.3V to +4.0V
All Other Pins (Note 1) ............................. -0.3V to (VCC + 0.3V)
Continuous Current IN_P, IN_M,
OUT_P, OUT_M ........................................................... Q 30mA
Peak Current IN_P, IN_M, OUT_P, OUT_M
(pulsed for 1F s, 1% duty cycle) ................................ Q 100mA
Note 1: All I/O pins are clamped by internal diodes.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 2)
TQFN
Junction-to-Ambient Thermal Resistance (B JA) ......... 28N C/W
Junction-to-Case Thermal Resistance (B JC) .................2N C/W
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
Continuous Power Dissipation (TA = +70N C)
TQFN (derate 35.7mW/N C above +70N C)..................2857mW
Operating Temperature Range ............................. 0N C to +70N C
Junction Temperature Range ........................... -40N C to +150N C
Storage Temperature Range ............................ -65N C to +150N C
Lead Temperature (soldering, 10s) ................................+300N C
Soldering Temperature (reflow) ......................................+260N C
ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, C
erwise noted. Typical values are at VCC = +3.3V and TA = +25N C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DC PERFORMANCE
Power-Supply Range V
Supply Current I
= 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0N C to +70N C, unless oth-
CL
CC
OEQ_2 = OEQ_1 = OEQ_0
= GND
OEQ_2 = OEQ_1 = GND,
OEQ_0 = V
OEQ_2 = OEQ_0 = GND,
OEQ_1 = V
OEQ_2 = GND, OEQ_1 =
CC
EN = V
OEQ_0 = V
CC
OEQ_2 = VCC, OEQ_1 =
OEQ_0 = GND
OEQ_2 = OEQ_0 = VCC,
OEQ_1 = GND
OEQ_2 = OEQ_1 = VCC,
OEQ_0 = GND
OEQ_2 = OEQ_1 = OEQ_0
= V
CC
CC
CC
CC
3.0 3.3 3.6 V
102 135
106 140
107 140
125 160
mA
106 140
132 170
140 180
165 210
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Single-Lane PCIe Equalizer/Redriver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, C
erwise noted. Typical values are at VCC = +3.3V and TA = +25N C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Standby Current I
Differential Input Impedance
Differential Output Impedance
Common-Mode Resistance to
GND, Input Termination Not
Powered
= 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0N C to +70N C, unless oth-
CL
OEQ_2 = OEQ_1 = OEQ_0
= GND
OEQ_2 = OEQ_1 = GND,
OEQ_0 = V
OEQ_2 = OEQ_0 = GND,
OEQ_1 = VCC
OEQ_2 = GND, OEQ_1 =
STBY
EN = GND
OEQ_0 = V
OEQ_2 = VCC, OEQ_1 =
OEQ_0 = GND
OEQ_2 = OEQ_0 = VCC,
OEQ_1 = GND
OEQ_2 = OEQ_1 = VCC,
OEQ_0 = GND
OEQ_2 = OEQ_1 = OEQ_0
= V
CC
Z
RX-DIFF-
DC
Z
TX-DIFF-
DC
Z
RX-HIGH-
IMP-DC
DC 80 100 120
DC 80 100 120
-150mV P V
IN_CM
P +200mV
CC
CC
MAX14950A
57 80
61 85
62 85
75 100
62 80
85 110
92 120
120 150
50
mA
I
I
kI
Common-Mode Resistance to
GND, Input Termination Powered
Output Short-Circuit Current I
Common-Mode Delta, Between
Active and Idle States
DC Output Offset, During Active
State
DC Output Offset, During
Electrical Idle
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Z
RX-DC
TX-SHORT
V
TX-CMDC-ACTIVEIDLE-DELTA
V
TXACTIVEDIFF-DC
V
TX-IDLE-
DIFF-DC
20 25 30
I
Single-ended (Note 4) 90 mA
100 mV
|(V
|(V
OUT_P
OUT_P
- V
- V
)| 50 mV
OUT_M
)| 50 mV
OUT_M
Single-Lane PCIe Equalizer/Redriver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, C
erwise noted. Typical values are at VCC = +3.3V and TA = +25N C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
AC PERFORMANCE (Note 4)
Input Return Loss, Differential RL
Input Return Loss, Common
Mode
Output Return Loss, Differential RL
Output Return Loss, Common
Mode
Redriver-Operation Differential
Input-Signal Range
Full-Swing Differential Output
Voltage (No Deemphasis)
Output Deemphasis Ratio, 0dB
Output Deemphasis Ratio, 3.5dB
Output Deemphasis Ratio, 6dB
Output Deemphasis Ratio, 6dB
with Higher Amplitude
Output Deemphasis Ratio, 3.5dB
with Preshoot
Output Deemphasis Ratio, 6dB
with Preshoot
Output Deemphasis Ratio, 9dB
with Preshoot
Output Deemphasis Ratio,
9dB with Preshoot and Higher
Amplitude
Input Equalization, 3dB
= 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0N C to +70N C, unless oth-
CL
f = 0.05GHz to 1.25GHz 10 dB
RX-DIFF
f = 1.25GHz to 2.5GHz 8 dB
f = 2.5GHz to 4GHz 5 dB
RL
RX-CM
f = 0.05GHz to 2.5GHz 6 dB
f = 2.5GHz to 4GHz 4 dB
f = 0.05GHz to 1.25GHz 10 dB
TX-DIFF
f = 1.25GHz to 2.5GHz 8 dB
f = 2.5GHz to 4GHz 4 dB
RL
TX-CM
V
RX-DIFF-
PP
V
TX-DIFF-
PP
V
TX-DE-
RATIO-0dB
V
TX-DE-
RATIO-
3.5dB
V
TX-DE-
RATIO-6dB
V
TX-DE-HA-
RATIO-6dB
V
TX-DE-
PS-RATIO-
3.5dB
V
TX-DE-PS-
RATIO-6dB
V
TX-DE-PS-
RATIO-9dB
V
TX-DE-PS-
HA-RATIO-
9dB
V
RX-EQ-
3dB
f = 0.05GHz to 2.5GHz 6 dB
f = 2.5GHz to 4GHz 4 dB
2 x |(V
OUT_P
- V
OUT_M
)|,
OEQ_2 = OEQ_1 = OEQ_0 = GND
OEQ_2 = OEQ_1 = OEQ_0 = GND,
Figure 1
OEQ_2 = OEQ_1 = GND, OEQ_0 = VCC,
Figure 1
OEQ_2 = OEQ_0 = GND, OEQ_1 = VCC,
Figure 1
OEQ_2 = GND, OEQ_1 = OEQ_0 = VCC,
Figure 1
OEQ_2 = VCC, OEQ_1 = OEQ_0 = GND,
Figure 1
OEQ_2 = OEQ_0 = VCC, OEQ_1 = GND,
Figure 1
OEQ_2 = OEQ_1 = VCC, OEQ_0 = GND,
Figure 1
OEQ_2 = OEQ_1 = OEQ_0 = VCC,
Figure 1
INEQ_1 = INEQ_0 = GND (Note 5) 3 dB
MAX14950A
100 1200 mV
800 1000 1300 mV
0 dB
3.5 dB
6 dB
6 dB
3.5 dB
6 dB
9 dB
9 dB
P-P
P-P
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MAX14950A
Single-Lane PCIe Equalizer/Redriver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, C
erwise noted. Typical values are at VCC = +3.3V and TA = +25N C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Equalization, 5dB
Input Equalization, 7dB
Input Equalization, 9dB
Output Common-Mode Voltage
Propagation Delay t
Rise/Fall Time
Rise/Fall Time Mismatch
Output Skew Same Pair t
Deterministic Jitter t
Random Jitter t
Electrical Idle Entry Delay
Electrical Idle Exit Delay
Electrical Idle Detect Threshold
(Note 7)
Output Voltage During Electrical
Idle (AC)
Receiver-Detect Pulse Amplitude
Receiver-Detect Pulse Width 100 ns
Receiver-Detect Retry Period 200 ns
= 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0N C to +70N C, unless oth-
CL
V
RX-EQ-
5dB
V
RX-EQ-
7dB
V
RX-EQ-
9dB
V
TX-CM-
AC-PP
PD
t
TX-RISE-
FALL
t
TX-RF-
MISMATCH
SK
TX-DJ-DD
TX-RJ-DD
t
TX-IDLESET-TO-
IDLE
t
TX-IDLE-
TO-DIFF-
DATA
INEQ_1 = GND, INEQ_0 = V
(Note 5) 5 dB
CC
INEQ_1 = VCC, INEQ_0 = GND (Note 5) 7 dB
INEQ_1 = INEQ_0 = V
MAX(V
V
OUT_M
OUT_P
)/2
+ V
OUT_M
(Note 5) 9 dB
CC
)/2 - MIN(V
OUT_P
+
100 mV
120 160 240 ps
(Note 6) 20 ps
(Note 6) 3 ps
5 ps
K28.5 pattern, AC-coupled, RL = 50I , no
deemphasis, no preshoot, data rate = 8GT/s
D10.2 pattern, no deemphasis, no
preshoot, data rate = 8GT/s
From input to output, D10.2 pattern, data
rate = 1GT/s
From input to output, D10.2 pattern, data
rate = 1GT/s
10.5 23.5 ps
1.5 ps
5 ns
5 ns
EIL_L = EIH_H = EIH_L = GND 65 175
V
TX-IDLE-
THRESH
V
TX-IDLE-
DIFF-AC-P
V
TX-RCV-
DETECT
EIL_L = EIH_L = GND, EIH_H = V
EIL_L = EIH_H = GND, EIH_L = V
CC
CC
EIL_L = VCC, EIH_H = EIH_L = GND
EIL_L = EIH_H = VCC, EIH_L = GND
|(V
OUT_P
- V
)| 20 mV
OUT_M
Voltage change in positive direction 600 mV
85 215
25 155
V
V
V
V
50 175
IH
20 165
IL
80 205
IH
50 195
IL
mV
P-P
P-P
RMS
P-P
P-P
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MAX14950A
Single-Lane PCIe Equalizer/Redriver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, C
erwise noted. Typical values are at VCC = +3.3V and TA = +25N C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CONTROL LOGIC
Input-Logic Level Low V
Input-Logic Level High V
Input-Logic Hysteresis V
Input Pulldown Resistance R
ESD PROTECTION
ESD Voltage Human Body Model (HBM) ±4 kV
Note 3: All devices are 100% production tested at TA = +70 N C. Specifications over operating temperature range are guaranteed
by design.
Note 4: Guaranteed by design, unless otherwise noted.
Note 5: Equivalent to same amount of deemphasis driving the input.
Note 6: Rise and fall times are measured using 20% and 80% levels.
Note 7: Electrical idle detect threshold is measured using D10.2 pattern and data rate = 1GT/s.
= 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0N C to +70N C, unless oth-
CL
IL
IH
HYST
PD
1.4 V
0.1 V
200 375 kI
0.6 V
Figure 1. Illustration of Output Deemphasis
V
LOW_P-P
DE(dB) = 20 log
V
V
HIGH_P- P
V
LOW_P-P
HIGH_P-P
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