4.5-digit, analog-to-digital converters (ADCs) with integrated liquid crystal display (LCD) drivers operate from a
single 2.7V to 5.25V power supply. They include an internal reference, a high-accuracy on-chip oscillator, and a
triplexed LCD driver. An internal charge pump generates
the negative supply needed to power the integrated input
buffer for single supply operation. The ADC is configurable for either a ±2V or ±200mV input range and it outputs its conversion results to an LCD. The MAX1491 is a
3.5-digit (±1,999 count) device, and the MAX1493/
MAX1495 are 4.5-digit (±19,999 count) devices.
The MAX1491/MAX1493/MAX1495 do not require external-precision integrating or auto-zero capacitors, crystal oscillators, charge pumps or other circuitry required
with dual slope ADCs (commonly used in panel meter
circuits). These devices also feature on-chip buffers for
the differential signal and reference inputs, allowing
direct interface with high-impedance signal sources. In
addition, the MAX1491/MAX1493/MAX1495 use continuous internal offset calibration, and offer >100dB rejection of 50Hz and 60Hz line noise. The MAX1493/
MAX1495 perform enhanced offset calibration at
power-up. The MAX1495 also performs enhanced calibration on demand. Other features include data hold
and peak hold, and a user programmable low-battery
monitor.
The MAX1493/MAX1495 come in a 32-pin 7mm ✕ 7mm
TQFP package, and the MAX1491 comes in 28-pin
SSOP and 28-pin DIP packages. All devices in this family operate over the 0°C to +70°C commercial temperature range.
, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto GND............................................................-0.3V to +6V
DV
DD
to GND ...........................................................-0.3V to +6V
AIN+, AIN- to GND...............................V
NEG
to + (AVDD+ 0.3V)
REF+, REF- to GND..............................V
NEG
to + (AVDD+ 0.3V)
LOWBATT to GND ...................................-0.3V to (AV
DD
+ 0.3V)
INTREF, RANGE, DPSET1, DPSET2, PEAK,
HOLD to GND......................................-0.3V to (DV
DD
+ 0.3V)
DPON to GND..........................................-0.3V to (DV
DD
+ 0.3V)
V
NEG
to GND ...........................................-2.6V to (AVDD+ 0.3V)
Maximum Current into Any Pin ...........................................50mA
, unless otherwise noted. Typical values are at +25°C, unless otherwise noted.)
Note 1: Integral nonlinearity is the derivation of the analog values at any code from its theoretical value after nulling the gain error
and offset error.
Note 2: Offset calibrated.
Note 3: Offset nulled.
Note 4: The input voltage range for the analog inputs is given with respect to the voltage on the negative input of the differential pair.
Note 5: For the range of V
AIN+
or V
AIN-
= -2.2V to +2.2V and V
REF+
or V
REF-
= -2.2V to +2.2V.
Note 6: External load must be constant during conversion for specified accuracy. Guaranteed specification of 2mV/mA is a result of
production test limitations.
Note 7: Measured at DC by changing the power-supply voltage from 2.7V to 5.25V and measuring its effect on the conversion error.
PSRR at 50Hz and 60Hz exceeds 120dB with filter notches of 10, 20, 30, 40, 50, or 60 Hz.
Note 8: Analog power-supply currents are measured with all digital inputs at either GND or DV
DD
. Digital power-supply currents
measured with all digital inputs at either GND or DV
DD
.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLY
AVDD VoltageAV
DVDD VoltageDV
Power-Supply Rejection AV
Power-Supply Rejection DV
AVDD CurrentI
DVDD CurrentI
LCD DRIVER
RMS Segment-On Voltage
RMS Segment-Off Voltage
Display Multiplex Rate107Hz
LCD Data-Update Rate2.5Hz
DD
DD
DD
DD
PSRRA(Note 7)80dB
PSRRD(Note 7)100dB
AVDD
DVDD
(Note 8)660µA
DVDD = 5V320
DVDD = 3.3V180
2.705.25V
2.705.25V
1.92 x
DV
DD
1 / 3 x
DV
DD
µA
V
V
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers
Internal Reference Logic Input. Connect to GND to select external reference mode. Connect
to DV
Digital Power Input. Connect DVDD to a 2.7V to 5.25V power supply. Bypass DVDD to GND
DD
with a 0.1µF and a 4.7µF capacitor.
Analog Power Input. Connect AVDD to a 2.7V to 5.25V power supply. Bypass AVDD to GND
DD
with a 0.1µF and a 4.7µF capacitor.
Positive Analog Input. Positive side of fully differential analog input. Bypass A
a 0.1µF or greater capacitor.
Negative Analog Input. Negative side of fully differential analog input. Bypass A
with a 0.1µF or greater capacitor.
Negative Reference Input. For internal reference operation, connect REF- to GND. For
external reference operation, bypass REF- to GND with a 0.1µF capacitor and set V
-2.2V to +2.2V, provided V
Positive Reference Input. For internal reference operation, connect a 4.7µF capacitor from
REF+ to GND. For external reference operation, bypass REF+ to GND with a 0.1µF capacitor
and set V
Range Logic Input. RANGE controls the fully differential analog input range. Connect to GND
for the ±2V input range. Connect to DV
Decimal Point Logic Input 1. Controls the decimal point of the LCD. See the Decimal PointControl section.
Decimal Point Logic Input 2. Controls the decimal point of the LCD. See the Decimal PointControl section.
Peak Logic Input. Connect to DV
GND to disable the peak function.
to select the internal reference mode.
DD
from -2.2V to +2.2V, provided V
REF+
> V
REF+
LOWB ATT
to GND with
IN+
to GND
IN-
.
REF-
> V
REF+
< 2.048V ( typ ) , the LO WBATT sym b ol on the LC D tur ns on.
for the ±200mV input range.
DD
to display the highest ADC value on the LCD. Connect to
DD
REF-
.
REF-
from
Hold Logic Input. Connect to DV
1411HOLD
1512SEG1LCD Segment 1 Driver
1613SEG2LCD Segment 2 Driver
1714SEG3LCD Segment 3 Driver
1815SEG4LCD Segment 4 Driver
1916SEG5LCD Segment 5 Driver
2017SEG6LCD Segment 6 Driver
GND to update the LCD at a rate of 2.5Hz and disable the hold function. For the MAX1495,
placing the device into hold mode initiates an enhanced offset calibration. Assert HOLD high
for a minimum of 2s to ensure the completion of enhanced offset calibration.
to hold the current ADC value on the LCD. Connect to
DD
MAX1491/MAX1493/MAX1495
3.5- and 4.5-Digit, Single-Chip
ADCs with LCD Drivers