How it Works
MAXIM
Loading...
MAX14824
User Manual
28 pgs1.92 Mb0
Table of contents
Loading...

MAXIM MAX14824 User Manual

EVALUATION KIT AVAILABLE
19-5788; Rev 3; 5/12
MAX14824
IO-Link Master Transceiver

General Description

The MAX14824 is an IO-LinkM master interface that inte­grates an IO-Link physical layer transceiver with an auxiliary digital input and two linear regulators. High port count IO-Link master applications are supported through in-band SPI addressing, and the 12MHz SPI interface minimizes host controller access times. In-band address­ing and selectable SPI addresses enable cascading up to 16 devices.
The device supports all the IO-Link data rates and fea­tures slew-rate-controlled drivers to reduce EMI. The driver is guaranteed to drive up to 300mA (min) load currents. Internal wake-up circuitry automatically deter­mines the correct wake-up polarity, allowing for the use of simple UARTs for wake-up pulse generation.
The MAX14824 is available in a 4mm x 4mm, 24-pin TQFN package with exposed pad, and operates over the extended -40NC to +105NC temperature range.

Applications

IO-Link Master Controllers PLC Fieldbus Gateways High Port Count IO-Link Masters 24V Digital Inputs and Outputs
Ordering Information appears at end of data sheet.

Features

S IO-Link v.1.0 and v.1.1 Physical Layer Compliant
S Supports COM1, COM2, and COM3 Data Rates
S Push-Pull, High-Side, or Low-Side Outputs
S 300mA C/Q Output Drive
S 1µF C/Q Load Drive Capability
S Generates 500mA Wake-Up Pulse
S Automatic Wake-Up Pulse Polarity
S Auxiliary Digital Input
S 5V and 3.3V Linear Regulators
S SPI Interface for Configuration and Monitoring
S SPI-Based Chip Addressing
S EMI Emission Control Through Slew-Controlled
Driver
S Reverse-Polarity Protection on DI
S Short-Circuit Protection on C/Q
S High Temperature Warning and Thermal Shutdown
S Extensive Fault Monitoring and Reporting
S -40NC to +105NC Operating Temperature Range
S 4mm x 4mm TQFN Package

Typical Operating Circuits

24V
1μF 0.1μF
V
CC
IO-LINK
CONTROLLER
Typical Operating Circuits continued at end of data sheet.
IO-Link is a registered trademark of Profibus User Organization (PNO).
For related parts and recommended products to use with this part, refer to: www.maxim-ic.com/MAX14824.related
SPI
WUENGPO
RXRX
TXCTX
TXENRTS
LDO33VLTXQ
V
MAX14824
LDOIN
5
GNDA3A2A1A0GND
1μF
V
CC
C/Q C/Q
DI
270pF
270pF
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX14824
IO-Link Master Transceiver

Functional Diagram

SDI
SDO
SCLK
IRQ
A3:A0
WUEN
TXQ
TXC
TXEN
FILTER
DRIVER
V
5
5V LDO
MAX14824
SHORT-CIRCUIT
PROTECTION
C/Q LOAD
REVERSE
POLARITY
PROTECTION
V
CC
C/Q
GND
DI
LDO33 LDOIN
UV
UV MONITOR
V
L
CS
STATUS
AND
CONFIGURATION
RX
WU POLARITY
GENERATOR
LI
3.3V LDO
DI LOAD
2
MAX14824
IO-Link Master Transceiver

ABSOLUTE MAXIMUM RATINGS

(All voltages referenced to GND, unless otherwise specified.)
VCC ........................................................................ -0.3V to +40V
LDOIN ....................................................................-0.3V to +40V
V5 .......................0.3V to the lesser of (V
LDO33 .................... -0.3V to the lesser of (V5 + 0.3V) and +6V
VL ............................................................................. -0.3V to +6V
DI ............................................................................ -40V to +40V
C/Q ........................................................... -0.3V to (VCC + 0.3V)
Logic Inputs
TXC, TXQ, TXEN, A2, CS, SDI, SCLK, WUEN .. -0.3V to (VL + 0.3V)
A3, A1, A0 ...........................................................-0.3V to +6V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera­tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
+ 0.3V) and +6V
LDOIN
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (BJA) ..........36NC/W
Junction-to-Case Thermal Resistance (BJC) .................3NC/W
Logic Outputs
RX, LI, SDO, IRQ ..................................... -0.3V to (VL + 0.3V)
UV ........................................................................ -0.3V to +6V
Continuous Current Into Any Logic Pin .......................... Q50mA
Continuous Power Dissipation
TQFN (derate 27.8mW/NC above +70NC)..................2222mW
Operating Temperature Range ........................ -40NC to +105NC
Maximum Junction Temperature .....................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

DC ELECTRICAL CHARACTERISTICS

(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage V
VCC Supply Current I
VCC Undervoltage Lockout Threshold
VCC Undervoltage Lockout Threshold Hysteresis
V5 Supply Current I
V5 Undervoltage Lockout Threshold
VL Logic-Level Supply Voltage V
VL Logic-Level Supply Current I
VL Undervoltage Threshold V
5V LDO (V5)
LDOIN Input Voltage Range V
V
= 0V; all logic inputs at VL or GND; TA = -40NC to +105NC, unless otherwise noted. Typical
GND
CC
CC
V
CCUVLO
CCUVLO_HYST
5_IN
V
5UVLO
L
L
LUVLO
LDOIN
For driver operation 9 36 V
VCC = 24V, C/Q as input, no load on V5 or LDO33, LDOIN not connected to VCC, V
= 24V
LDOIN
VCC falling 6 7.5 9 V
LDOIN shorted to V5, external 5V applied to V5, no switching, LDO33 disabled
V5 falling 2.4 V
2.3 5.5 V
All logic inputs at VL or GND 5
VL falling 0.65 0.95 1.3 V
7 36 V
1.3 2.5 mA
200 mV
3 mA
FA
3
IO-Link Master Transceiver
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LDOIN Supply Current I
V5 Output Voltage Range V
V5 Load Regulation
3.3V LDO (LDO33)
LDO33 Output Voltage V
LDO33 Undervoltage Lockout Threshold
LDO33 Load Regulation 1mA < I
24V INTERFACE
C/Q Output Resistance High R
C/Q Output Resistance Low R
C/Q Source Current Limit I
C/Q Sink Current Limit I
C/Q Input Threshold High V
C/Q Input Threshold Low V
C/Q Input Hysteresis V
DI Input Threshold High V
DI Input Threshold Low V
DI Input Hysteresis V
C/Q Weak Pulldown Current I
DI Weak Pulldown Current I
C/Q Input Capacitance C
DI Input Capacitance C
C/Q, DI INPUT LOAD
C/Q Load Current I
DI Load Current I
= 0V; all logic inputs at VL or GND; TA = -40NC to +105NC, unless otherwise noted. Typical
GND
V
= 24V, C/Q as input, no load on
LDOIN
5
LDO33
V
LDO33UVLOVLDO33
OH_C/Q
OL_C/Q
OH_C/Q
OL_C/Q
IH_C/Q
IL_C/Q
HYS_C/Q
IH_DI
IL_DI
HYS_DI
PDC/Q
PDDI
C/Q
DI
LLM_C/Q
LLM_DI
LDOIN
V5 or LDO33
No load on V5, 7V P V
1mA < I
LOAD
< 10mA, V
0.1FF bypass capacitor on V
LDOIN
LDOIN
P 36V
= 7V,
5
No load on LDO33 3.1 3.5 V
falling 2.4 V
< 10mA, V
LOAD
C/Q high-side enabled, I
= 7V 0.25 %
LDOIN
= -200mA,
C/Q
9V P VCC P 36V (Note 5)
C/Q low-side enabled, I
= +200mA,
C/Q
9V P VCC P 36V (Note 5)
C/Q high-side enabled, V
< (VCC -
C/Q
3V), 9V P VCC P 36V
C/Q low-side enabled, V
> 3V, 9V P
C/Q
VCC P 36V
C/Q driver disabled 10.5 13.0 V
C/Q driver disabled 8.0 11.5 V
C/Q driver disabled 1.0 V
C/Q driver disabled, V
DI load disabled, VDI = V
C/Q
= V
CC
CC
C/Q driver disabled 40 pF
C/Q load enabled (C/QLoad = 1)
DI load enabled (DiLoad = 1)
0 P V
9V P V
0 P VDI P 5V
9V P V
C/Q
C/Q
DI
P 5V
MAX14824
3.0 5 mA
4.75 5.00 5.25 V
0.08 %
1.8 2.9
2.0 3.6
+500 +670 mA
-660 -500 mA
6.8 8 V
5.2 6.4 V
1 V
100 400
50 300
20 pF
0 8.1
5 6.8 8.1
0 4.3
2 3.5 4.3
I
I
FA
FA
mA
mA
4
MAX14824
IO-Link Master Transceiver
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LOGIC INPUTS (TXC, TXQ, TXEN, CS, WUEN, SDI, SCLK, A3, A2, A1, A0)
Logic Input-Voltage Low V
Logic Input-Voltage High V
Logic Input Leakage Current I
Logic Input Capacitance C
A1 Pulldown Resistance R
LOGIC OUTPUTS (RX, LI, UV, SDO, IRQ)
Logic Output-Voltage Low V
Logic Output-Voltage High
SDO Leakage Current I
THERMAL SHUTDOWN
Thermal Warning Threshold Die temperature rising, OTemp bit is set +115
Thermal Warning Threshold Hysteresis
Thermal Shutdown Threshold Die temperature rising +150
Thermal Shutdown Hysteresis 20
V
= 0V; all logic inputs at VL or GND; TA = -40°C to +105°C, unless otherwise noted. Typical
GND
0.3 x V
L
-1 +1
325 800
VL -
0.6
-1 +1
V
OHRX
OHWU
V
OHSDO
V
OHIRQ
LK_SDO
IL
IH
LEAK
IN
A1PD
OL
, V
Logic input = GND or V
I
= -5mA 0.4 V
OUT
,
,
OHLI
I
= 5mA (Note 3)
OUT
,
,
SDO disabled, SDO = GND or V
Die temperature falling, OTemp bit is cleared
L
L
0.7 x V
L
5 pF
20
V
V
FA
kI
V
FA
NC
NC
NC
NC

AC ELECTRICAL CHARACTERISTICS

(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25oC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
C/Q, DI INTERFACES
Data Rate DR
DRIVER (C/Q)
Driver Low-to-High Propagation Delay
Driver High-to-Low Propagation Delay
= 0V; all logic inputs at VL or GND; TA = -40°C to +105°C, unless otherwise noted. Typical
GND
HiSlew = 1 4.8 230.4
HiSlew = 0 4.8 38.4
t
PDLH
t
PDHL
Push-pull or high-side (PNP) configuration, Figure 1
Push-pull or low-side (NPN) configuration, Figure 1
HiSlew = 1 0.5 2
HiSlew = 0 1.6 5
HiSlew = 1 0.5 2
HiSlew = 0 1.6 5
kbps
Fs
Fs
5
IO-Link Master Transceiver
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25oC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Driver Skew t
Driver Rise Time t
Driver Fall Time t
Driver Enable Time High t
Driver Enable Time Low t
Driver Disable Time High t
Driver Disable Time Low t
RECEIVER (C/Q, DI) (Figure 4)
Receiver Low-to-High Propagation Delay
Receiver High-to-Low Propagation Delay
WAKE-UP GENERATION (Figure 5)
Wake-Up Enable Setup Time t
Wake-Up Enable Hold Time t
Wake-Up Pulse Rise Propagation Delay
Wake-Up Pulse Fall Propagation Delay
SPI TIMING (CS, SCLK, SDI, SDO) (Figure 6)
SCLK Clock Period t
SCLK Pulse-Width High t
SCLK Pulse-Width Low t
CS Fall to SCLK Rise Time SCLK Rise to CS Rise Hold
Time
SDI Hold Time t
= 0V; all logic inputs at VL or GND; TA = -40oC to +105oC, unless otherwise noted. Typical
GND
|t
- t
SKEW
RISE
FALL
ENH
ENL
DISH
DISL
t
PRLH
t
PRHL
WUEN,S
WUEN,H
t
1
t
2
CH+CL
CH
CL
t
CSS
t
CSH
DH
PDLH
Push-pull or high-side (PNP) configuration, Figure 1
Push-pull or low-side (NPN) configuration, Figure 1
Push-pull or high-side (PNP) configuration, Figure 3
Push-pull or low-side (NPN) configuration, Figure 2
Push-pull or high-side (PNP) configuration, Figure 2 (Note 4)
Push-pull or low-side (NPN) configuration, Figure 3 (Note 4)
RxFilter = 0 0.4 2
RxFilter = 1 0.2 2
RxFilter = 0 0.5 2
RxFilter = 1 0.3 2
| 0.1 2
PDHL
HiSlew = 1 0.4 0.85
HiSlew = 0 1.5 4
HiSlew = 1 0.4 0.85
HiSlew = 0 1.4 4
HiSlew = 1 0.3 1.5
HiSlew = 0 0.8 7
HiSlew = 1 0.3 1.5
HiSlew = 0 0.9 7
HiSlew = 1 1.6 3
HiSlew = 0 1.6 3
HiSlew = 1 0.1 3
HiSlew = 0 0.1 3
MAX14824
Fs
Fs
Fs
Fs
Fs
Fs
Fs
Fs
30 ns
30 ns
1.5 5
1.5 3
83.3 ns
41.65 ns
41.65 ns
20 ns
20 ns
10 ns
Fs
Fs
6
MAX14824
IO-Link Master Transceiver
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = 18V to 36V, VL = 2.3V to 5.5V, V values are at VCC = 24V, VL = 3.3V, and TA = +25oC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SDI Setup Time t
Output Data Propagation Delay t
SDO Rise and Fall Times t
Minimum CS Pulse
Note 2: All devices are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by
design.
Note 3: UV is an open-drain output. Connect UV to a voltage less than 5.5V through an external pullup resistor. Note 4: Disable time measurements are load-dependent. Note 5: Guaranteed by design. Limits are not production tested.
= 0V; all logic inputs at VL or GND; TA = -40oC to +105oC, unless otherwise noted. Typical
GND
DS
DO
FT
t
CSW
10 ns
32 ns
20 ns
76.8 ns
7
MAX14824
IO-Link Master Transceiver
TXEN
TXC AND TXQ
C/Q

Figure 1. Driver Polarity and Timing

t
PDHL
TXC
TXQ
t
FALL
TXEN
MAX14824
GND
C/Q
t
RISE
V
CC
3.3nF 5kΩ
50%
t
PDLH
90% 50%
10%
V
L
0V
V
L
0V
V
CC
0V
V
L
TXC
TXQ
TXEN
t
ENL
C/Q
10%

Figure 2. Driver Enable Low and Disable High Timing

TXEN
MAX14824
GND
C/Q
t
DISH
3.3nF
10%
5kΩ
V
L
0V
V
CC
0V
8
TXEN
C/Q
t
ENH
TXC
TXQ
90%
MAX14824
IO-Link Master Transceiver
TXEN
C/Q
MAX14824
GND
t
DISL
3.3nF 5kΩ
90%
V
L
0V
V
CC
0V

Figure 3. Driver Enable High and Disable Low Timing

C/Q OR DI
C/Q OR DI
t
PRLH
OR LI
RX

Figure 4. Receiver Polarity and Timing

TXEN
MAX14824
GND
RX OR LI
t
PRHL
50%
15pF
50%
V
CC
0V
V
L
0V
9
Loading...
+ 19 hidden pages
Buy Points How it Works FAQ Contact Us Questions and Suggestions Privacy Policy Cookie Policy Terms of Use