General Description
The MAX1470 is a fully integrated low-power CMOS
superheterodyne receiver for use with amplitude-shiftkeyed (ASK) data in the 315MHz band. With few
required external components, and a low-current
power-down mode, it is ideal for cost- and power-sensitive applications in the automotive and consumer markets. The chip consists of a 315MHz low-noise amplifier
(LNA), an image rejection mixer, a fully integrated
315MHz phase-lock-loop (PLL), a 10.7MHz IF limiting
amplifier stage with received-signal-strength indicator
(RSSI) and an ASK demodulator, and analog baseband
data-recovery circuitry.
The MAX1470 is available in a 28-pin TSSOP package.
Applications
Remote Keyless Entry
Garage Door Openers
Remote Controls
Wireless Sensors
Wireless Computer Peripherals
Security Systems
Toys
Video Game Controllers
Medical Systems
Features
♦ Operates from a Single +3.0V to +3.6V Supply
♦ Built-In 53dB RF Image Rejection
♦ -115dBm Receive Sensitivity*
♦ 250µs Startup Time
♦ Low 5.5mA Operating Supply Current
♦ 1.25µA Low-Current Power-Down Mode for
Efficient Power Cycling
♦ 250MHz to 500MHz Operating Band (Image
Rejection Optimized at 315MHz)
♦ Integrated PLL with On-Board Voltage-Controlled
Oscillator (VCO) and Loop Filter
♦ Selectable IF Bandwidth Through External Filter
♦ Complete Receive System from RF to Digital Data
Out
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
19-2135; Rev 1; 8/02
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Functional Diagram
Typical Application Circuit appears at end of data sheet.
Pin Configuration appears at end of data sheet.
*See Note 2, AC Electrical Characteristics.
PART TEMP RANGE PIN-PACKAGE
MAX1470EUI -40°C to +85°C 28 TSSOP
LNAOUT6MIXIN1 MIXIN2
89
3
LNAIN
LNASRC
DV
AV
DGND
AGND
DD
DD
LNA
DATA
SLICER
Q
I
MAX1470
4
DIVIDE
14
BY 64
2,7
PHASE
DETECTOR
13
CRYSTAL
5,10
DRIVER
VCO
LOOP
FILTER
SHUTDOWN
0°
90°
PEAK
DETECTOR
IFIN1MIXOUT IFIN2
RSSI
R
DF2
100kΩ
181712
DATA
FILTER
IF
LIMITING
AMPS
R
DF1
100kΩ
22212619202527281
DFOPPPDOUTDSPDSNDATAOUTPWRDNXTAL1 XTAL2
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, VDD= +3.0V to +3.6V, no RF signal applied, TA= -40°C to +85°C. Typical values are at VDD= +3.3V, T
A
= +25°C, unless otherwise noted.) (Note 1)
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD= +3.3V, TA= +25°C, f
RFIN
= 315MHz, unless oth-
erwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND ......................................................-0.3V to +4.0V
DV
DD
to DGND......................................................-0.3V to +4.0V
All Other Pins Referenced to AGND...........-0.3V to (V
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
28-Pin TSSOP (derate 13mW/°C above +70°C) .........1039mW
Operating Temperature Range
MAX1470EUI ...................................................-40°C to +85°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage V
Supply Current I
Shutdown Supply Current I
PWRDN Voltage Input Low V
PWRDN Voltage Input High V
DATAOUT Voltage Output Low V
DATAOUT Voltage Output High V
DD
DD
SHUTDOWN
IL
IH
OL
OH
PWRDN = V
PWRDN = GND 1.25 µA
I
DATAOUT
I
DATAOUT
= 100µA 0.4 V
= -100µA
3.0 3.6 V
DD
VDD -
0.4
V
DD
0.4
5.5 mA
0.4 V
-
V
V
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GENERAL CHARACTERISTICS
Maximum Startup Time T
Maximum Receiver Input Level RFIN
Minimum Receiver Input Level,
315MHz
Minimum Receiver Input Level,
433.92MHz
Receivers f
LOW-NOISE AMPLIFIER (LNA)
Input Impedance S11
1dB Compression Point P1dB
Input-Referred 3rd-Order
Intercept
LO Signal Feedthrough to
Antenna
Output Impedance S22
RFIN
RFIN
IIP3
Time from PWRDN deasserting to valid data
ON
out
Modulation depth ≥ 60dB 0 dBm
MAX
Average carrier power level (Note 2) -115
MIN
Peak power level (Note 2) -109
Average carrier power level (Note 2) -110
Peak power level (Note 2) -104
Normalized to 50Ω (Note 3) 1 - j4
LNA
LNA
LNA
Normalized to 50Ω
LNA
250 µs
dBm
dBm
250 to 500 MHz
-22 dBm
-18 dBm
-95 dBm
0.12 j4.4
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
_______________________________________________________________________________________ 3
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, all RF inputs and outputs are referenced to 50Ω, VDD= +3.3V, TA= +25°C, f
RFIN
= 315MHz, unless oth-
erwise noted.) (Note 1)
Note 1: Parts are production tested at T
A
= +25°C; Min and Max values are guaranteed by design and characterization.
Note 2: BER = 2E-3, Manchester encoded, data rate = 4kbps, IF bandwidth = 350kHz.
Note 3: Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration con-
nected from the LNASRC.
Note 4: Guaranteed by production test.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Noise Figure NF
Power Gain 16 dB
MIXER
Input Impedance S11
Input-Referred 3rd-Order
Intercept
Output Impedance Z
Image Rejection
Noise Figure NF
Conversion Gain 330Ω IF filter load 13 dB
INTERMEDIATE-FREQUENCY DEMODULATOR BLOCK
Input Impedance ZIN_
Operating Frequency f
RSSI Linearity ±1dB
RSSI Dynamic Range 65 dB
RSSI Level
DATA FILTER
Maximum Bandwidth BW
DATA SLICER
Comparator Bandwidth BW
Maximum Load Capacitance C
CRYSTAL OSCILLATOR
Reference Frequency f
LNA
MIX
IIP3
MIX
OUT_MIX
MIX
IF
IF
DF
CMP
LOAD
REF
Normalized to 50Ω
f
= 315M H z, fRF_
RFIN
= 433.92M H z, fRF_
f
RFIN
P
< -120dBm 1.2
RFIN
> -50dBm 2.0
P
RFIN
= 293.6M H z ( N ote 4) 40 53
IM AGE
= 412.52M H z39
IM AGE
2.0 dB
0.25 j2.4
-18 dBm
330 Ω
16 dB
330 Ω
10.7 MHz
100 kHz
100 kHz
10 pF
4.7547 MHz
dB
V
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VDD= +3.3V, TA= +25°C, unless otherwise noted. Typical Application Circuit.)
4.7
5.1
4.9
5.5
5.3
5.9
5.7
6.1
2.7 3.12.9 3.3 3.5
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
MAX1470 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
TA = +85°C
TA = +25°C
TA = -40°C
10
0.1
-120 -116 -114
1
AVERAGE RF INPUT POWER (dBm)
BIT-ERROR RATE (%)
-118
BIT-ERROR RATE vs. AVERAGE
RF INPUT POWER
MAX1470 toc02
1.0
1.4
1.2
1.8
1.6
2.0
2.2
-140 -80 -60-120 -100 -40 -20
RSSI vs. AVERAGE RF INPUT POWER
MAX1470 toc03
AVERAGE RF INPUT POWER (dBm)
RSSI (V)
IF BANDWIDTH = 350kHz
-116.0
-116.5
-117.0
-117.5
-118.0
-40 20-20 0 40 60 80
RECEIVER SENSITIVITY
vs. TEMPERATURE
MAX1470 toc04
TEMPERATURE (°C)
RECEIVER SENSITIVITY (dBm)
AVERAGE RF INPUT POWER
1% BER
IF BANDWIDTH = 350kHz
45
50
55
60
IMAGE REJECTION vs. TEMPERATURE
MAX1470 toc05
TEMPERATURE (°C)
IMAGE REJECTION (dB)
-40 20 40-20 0 60 80
-10
10
0
30
20
50
40
60
SYSTEM GAIN vs. IF FREQUENCY
MAX1470 toc06
IF FREQUENCY (MHz)
SYSTEM GAIN (dB)
0 10203040
FROM RFIN TO MIXOUT
f
LO
= 304.3MHz
UPPER SIDEBAND
LOWER SIDEBAND
53dB IMAGE
REJECTION
30
25
20
15
10
250 325275 300 350 375
LNA GAIN vs. RF FREQUENCY
MAX1470 toc07
RF FREQUENCY (MHz)
LNA GAIN (dB)
LC TANK
FILTER TUNED
TO 315MHz
4.2
5.2
4.7
6.2
5.7
6.7
7.2
150 300 350200 250 400 450 500
SUPPLY CURRENT
vs. LO FREQUENCY
MAX1470 toc08
LO FREQUENCY (MHz)
SUPPLY CURRENT (mA)
0
20
10
40
30
60
50
70
1 10 100
INPUT IMPEDANCE vs.
INDUCTIVE DEGENERATION
MAX1470 toc09
INDUCTIVE DEGENERATION (nH)
REAL IMPEDANCE (Ω)
-350
-250
-300
-150
-200
-50
-100
0
IMAGINARY IMPEDANCE (Ω)
REAL IMPEDANCE
IMAGINARY IMPEDANCE
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VDD= +3.3V, TA= +25°C, unless otherwise noted. Typical Application Circuit.)
NORMALIZED IF GAIN
vs. IF FREQUENCY
5
0
-5
-10
NORMALIZED IF GAIN (dB)
-15
-20
3dB BANDWIDTH = 11.7MHz
1 10 100
IF FREQUENCY (MHz)
S11 MAGNITUDE-LOG PLOT OF RFIN
0dB
MAX1470 toc10
MAX1470 toc12
60
50
40
IMAGE REJECTION (dB)
30
20
IMAGE REJECTION
vs. RF FREQUENCY
MAX1470 toc11
150 300 350200 250 400 450 500
RF FREQUENCY (MHz)
S11 SMITH PLOT OF RFIN
MAX1470 toc13
315MHz
10dB/
div
50MHz
315MHz,
-29.5dB
1GHz
50MHz
1GHz
MAX1470
Detailed Description
The MAX1470 CMOS superheterodyne receiver and a
few external components provide the complete receive
chain from the antenna to the digital output data.
Depending on signal power and component selection,
data rates as high as 100kbps can be achieved.
The MAX1470 is designed to receive binary ASK data
on a 315MHz carrier. ASK modulation uses a difference
in amplitude of the carrier to represent logic 0 and logic
1 data.
Low-Noise Amplifier
The LNA is a cascode amplifier with off-chip inductive
degeneration that achieves approximately 16dB of
power gain with a 2.0dB noise figure and an IIP3 of
-18dBm. The gain and noise figure is dependent on
both the antenna matching network at the LNA input,
and the LC tank network between the LNA output and
the mixer inputs.
The off-chip inductive degeneration is achieved by connecting an inductor from LNASRC to AGND. This inductor
sets the real part of the input impedance at LNAIN, allowing for a more flexible match for low-input impedance
such as a PC board trace antenna. A nominal value for
this inductor with a 50Ω input impedance is 15nH, but is
affected by PC board trace. See Typical Operating
Characteristics for the relationship between the inductance and input impedance.
The LC tank filter connected to LNAOUT comprises L1
and C9 (see Typical Applications Circuit). L1 and C9 values are selected to resonate at the RF input frequency of
315MHz. The resonant frequency is given by:
315MHz Low-Power, +3V Superheterodyne
Receiver
6 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 XTAL1 1st Crystal Input
2, 7 AV
3 LNAIN Low-Noise Amplifier Input
4 LNASRC
5, 10 AGND Analog Ground
6 LNAOUT Low-Noise Amplifier Output
8 MIXIN1 1st Differential Mixer Input. Must be AC-coupled to driving input.
9 MIXIN2 2nd Differential Mixer Input. Must be AC-coupled to driving input.
11, 15, 16,
23, 24
12 MIXOUT 330Ω Mixer Output
13 DGND Digital Ground
14 DV
17 IFIN1 1st Differential Intermediate Frequency Limiter Amplifier Input
18 IFIN2 2nd Differential Intermediate Frequency Limiter Amplifier Input
19 DSP Positive Data Slicer Input
20 DSN Negative Data Slicer Input
21 OPP Noninverting Op Amp. Input for the Sallen-Key data filter.
22 DF Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter.
25 DATAOUT Digital Baseband Data Output
26 PDOUT Peak Detector Output
27 PWRDN Power-Down Select Input. Drive this pin with a logic low to shut down the IC.
28 XTAL2 2nd Crystal Input
DD
I.C. Internally Connected. Do not make connection to these pins.
DD
Positive Analog Supply Voltage for RF Sections. Decouple to AGND with 0.01µF capacitors.
Low-Noise Amplifier Source. Connect inductor to ground to set LNA input impedance (see Low-
Noise Amplifier section).
Positive Digital Supply Voltage. Decouple to DGND with a 0.01µF capacitor.
where:
L
PARASITICS
and C
PARASITICS
include inductance and
capacitance of the PC board traces, package pins,
mixer input impedance, LNA output impedance, etc.
These parasitics at high frequencies cannot be ignored
and can have a dramatic effect on the tank filter center
frequency. Lab experimentation should be done to optimize the center frequency of the tank.
Mixer
A unique feature of the MAX1470 is the integrated
image rejection of the mixer. This device was designed
to eliminate the need for a costly front-end SAW filter for
many applications. The advantage of not using a SAW
filter is increased sensitivity, simplified antenna matching, less board space, and lower cost.
The mixer cell is a pair of double-balanced mixers that
perform an IQ downconversion of the 315MHz RF input
to the 10.7MHz IF with low-side injection (i.e., fLO= f
RF
- fIF). The image rejection circuit then combines these
signals to achieve ~50dB of image rejection over the
full temperature range. Low-side injection is required
due to the on-chip image-rejection architecture. The IF
output is driven by a source-follower, biased to create a
driving impedance of 330Ω to interface with an off-chip
330Ω ceramic IF filter. The voltage conversion gain driving a 330Ω load is approximately 13dB.
Phase-Lock Loop
The PLL block contains a phase detector, charge
pump/integrated loop filter, VCO, asynchronous 64x
clock divider, and crystal oscillator. This PLL does not
require any external components. The quadrature VCO
is centered at the nominal LO frequency of 304.3MHz.
For an input RF frequency of 315MHz, a reference frequency of 4.7547MHz is needed for a 10.7MHz IF frequency (low-side injection is required). The relationship
between the RF, IF, and reference frequencies is given
by:
f
REF
= (fRF- fIF) / 64
To allow the smallest possible IF bandwidth (for best
sensitivity), the tolerance of the reference must be minimized.
Intermediate Frequency
The IF section presents a differential 330Ω load to provide matching for the off-chip ceramic filter. The internal five AC-coupled limiting amplifiers produce an
overall gain of approximately 65dB, with a bandpass-filter-type response centered near the 10.7MHz IF frequency with a 3dB bandwidth of approximately
11.5MHz. The RSSI circuit demodulates the IF to baseband by producing a DC output proportional to the log
of the IF signal level with a slope of approximately
15mV/dB (see Typical Operating Characteristics).
Applications Information
Crystal Oscillator
The XTAL oscillator in the MAX1470 is designed to present a capacitance of approximately 3pF between
XTAL1 and XTAL2. If a crystal designed to oscillate
with a different load capacitance is used, the crystal is
pulled away from its stated operating frequency, introducing an error in the reference frequency. Crystals
designed to operate with higher differential load capacitance always pull the reference frequency higher. For
example, a 4.7547MHz crystal designed to operate
with a 10pF load capacitance oscillates at 4.7563MHz
with the MAX1470, causing the receiver to be tuned to
315.1MHz rather than 315.0MHz, an error of about
100kHz, or 320ppm.
In actuality, the oscillator pulls every crystal. The crystal’s natural frequency is really below its specified frequency, but when loaded with the specified load
capacitance, the crystal is pulled and oscillates at its
specified frequency. This pulling is already accounted
for in the specification of the load capacitance.
Additional pulling can be calculated if the electrical
parameters of the crystal are known. The frequency
pulling is given by:
where:
f
p
is the amount the crystal frequency is pulled in ppm.
Cmis the motional capacitance of the crystal.
C
case
is the case capacitance.
C
spec
is the specified load capacitance.
C
load
is the actual load capacitance.
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
_______________________________________________________________________________________ 7
ƒ=
2π LC
LLL
TOTAL PARASITICS
CCC
TOTAL PARASITICS
1
×
TOTAL TOTAL
=+
1
=+
9
C
ƒ=
m
p
11
+
CC CC2
case load case spec
−
+
6
10
×
MAX1470
When the crystal is loaded as specified, i.e., C
load
=
C
spec
, the frequency pulling equals zero.
Data Filter
The data filter is implemented as a 2nd-order lowpass
Sallen-Key filter. The pole locations are set by the combination of two on-chip resistors and two external capacitors. Adjusting the value of the external capacitors
changes the corner frequency to optimize for different
data rates. The corner frequency should be set to
approximately 1.5 times the fastest expected data rate
from the transmitter. Keeping the corner frequency near
the data rate rejects any noise at higher frequencies,
resulting in an increase in receiver sensitivity.
The configuration shown in Figure 1 can create a
Butterworth or Bessel response. The Butterworth filter
offers a very flat amplitude response in the passband
and a roll-off rate of 40dB/decade for the two-pole filter.
The Bessel filter has a linear phase response, which
works well for filtering digital data. To calculate the
value of C5 and C6, use the following equations along
with the coefficients in Table 1:
where fCis the desired 3dB corner frequency.
For example, to choose a Butterworth filter response
with a corner frequency of 5kHz:
Choosing standard capacitor values changes C5 to
470pF and C6 to 220pF, as shown in the Typical
Application Circuit.
Data Slicer
The purpose of the data slicer is to take the analog output of the data filter and convert it to a digital signal.
This is achieved by using a comparator and comparing
the analog input to a threshold voltage. The threshold
voltage is set by the voltage on DSN, which is connected to the negative input of the data slicer comparator.
The positive input is connected to the output of the data
filter internally, and also the DSP pin for use with some
data slicer configurations.
The suggested data slicer configuration uses a resistor
(R1) connected between DSN and DSP with a capacitor (C4) from DSN to DGND (Figure 2). This configuration averages the analog output of the filter and sets the
threshold to approximately 50% of that amplitude. With
this configuration, the threshold automatically adjusts
as the analog signal varies, minimizing the possibility
for errors in the digital data. The sizes of R1 and C4
affect how fast the threshold tracks the analog amplitude. Be sure to keep the corner frequency of the RC
circuit lower than the lowest expected data rate.
Note that a long string of zeros or ones can cause the
threshold to drift. This configuration works best if a coding scheme, such as Manchester code, which has an
equal number of zeros and ones, is used.
Peak Detector
The peak detector output (PDOUT), in conjunction with
an external RC filter, creates a DC output voltage equal
to the peak value of the data signal. The resistor provides a path for the capacitor to discharge, allowing the
315MHz Low-Power, +3V Superheterodyne
Receiver
8 _______________________________________________________________________________________
Table 1. Coefficents to Calculate C5 and C6
Figure 1. Sallen-Key Lowpass Data Filter
C
5
=
C
6
=
C
5
=
1 414 100 3 14 5
..
()( )()()
C
6
=
FILTER TYPE a b
Butterworth
(Q = 0.707)
Bessel
(Q = 0.577)
k kHz
4 100 3 14 5
()( )( )( )
Ω
b
ΩΩπ
ak f
100
()()()
kf
4 100
()()()
1 000
.
k kHz
Ω
1 414
.
.
c
a
π
c
≈
225
≈
1.414 1.000
1.3617 0.618
450
pF
pF
MAX1470
R
DF2
19
DSP
21
OPP
C6
100kΩ R
RSSI
DF1
22
DF
C5
100kΩ
peak detector to dynamically follow peak changes of
the data filter output voltage. For faster receiver startup,
the circuit shown in Figure 3 can be used.
433.92MHz Band
The MAX1470 can be configured to receive ASK modulated data with carrier frequency ranging from 250MHz
to 500MHz. Only a small number of components need
to be changed to retune the RF section to the desired
RF frequency.
Table 2 shows a list of changed components and their
values for a 433.92MHz RF; all other components
remain unchanged.
The integrated image rejection of the MAX1470 is
specifically designed to function with a 315MHz input
frequency by attenuating any signal at 293.6MHz. The
benefit of the on-chip image rejection is that an external
SAW filter is not needed, reducing cost and the insertion loss associated with SAW filters. The image rejection cannot be retuned for different RF input
frequencies and therefore is degraded. The image
rejection at 433.92MHz is typically 39dB.
Layout Considerations
A properly designed PC board is an essential part
of any RF/microwave circuit. On high-frequency inputs
and outputs, use controlled-impedance lines and
keep them as short as possible to minimize losses and
radiation. At high frequencies, trace lengths that are
approximately 1/20 the wavelength or longer become
antennas. For example, a 2in trace at 315MHz can act
as an antenna.
Keeping the traces short also reduces parasitic inductance. Generally, 1in of a PC board trace adds about
20nH of parasitic inductance. The parasitic inductance
can have a dramatic effect on the effective inductance.
For example, a 0.5in trace connecting a 100nH inductor adds an extra 10nH of inductance or 10%.
To reduce the parasitic inductance, use wider traces
and a solid ground or power plane below the signal
traces. Using a solid ground plane can reduce the parasitic inductance from approximately 20nH/in to 7nH/in.
Also, use low-inductance connections to ground on all
GND pins, and place decoupling capacitors close to all
VDDconnections.
Chip Information
TRANSISTOR COUNT: 1835
PROCESS: CMOS
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
_______________________________________________________________________________________ 9
Table 2. Changed Component Values for
433.92MHz
Note: These values are affected by PC board layout.
Figure 2. Generating Data Slicer Threshold Figure 3. Using PDOUT for Faster Startup
MAX1470
DATA
FILTER
DATA
SLICER
25
DATA OUT
20
DSN
C4
19
DSP
R1
MAX1470
25
DATA OUT
DATA
SLICER
47nF
20
DSN
25kΩ
19
DSP
250kΩ
DATA
FILTER
26
PDOUT
47nF
COMPONENT VALUE FOR 433MHz RF
C9 1.0pF
L1 15nH
L2 56nH
Y1 6.6128MHz
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
10 ______________________________________________________________________________________
Typical Application Circuit
ANTENNA
(RFIN)
C12
0.01µF
+3.3V
XTAL1
1
Y1
4.7547MHz
XTAL2
28
+3.3V
C10
220pF
L1
27nH
C9
2.2pF
C7
100pF
L2
100nH
C11
100pF
C8
100pF
L3
15nH
C2
0.01µF
10
11
12
2
3
4
5
6
7
8
9
AV
DD
LNAIN
LNASRC
AGND
LNAOUT
AV
DD
MIXIN1
MIXIN2
AGND
I.C.
MIXOUT
MAX1470
PWRDN
PDOUT
DATAOUT
I.C.
I.C.
OPP
DSN
DSP
IFIN2
IFIN1
C6
220pF
SHUTDOWN
DATAOUT
C5
470pF
R1
5kΩ
27
26
25
24
23
22
DF
21
20
19
18
17
C3
1500pF
C4
0.47µF
0.01µF
DGND
13
14
DV
DD
C1
U1
10.7MHz
I.C.
I.C.
16
15
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
______________________________________________________________________________________ 11
Pin Configuration
TOP VIEW
XTAL1
AV
LNAIN
LNASRC
AGND
LNAOUT
AV
MIXIN1
MIXIN2
AGND
I.C.
MIXOUT
DGND
DV
1
2
DD
3
4
5
MAX1470
6
7
DD
8
9
10
11
12
13
14
DD
TSSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XTAL2
PWRDN
PDOUT
DATAOUT
I.C.
I.C.
DF
OPP
DSN
DSP
IFIN2
IFIN1
I.C.
I.C.
MAX1470
315MHz Low-Power, +3V Superheterodyne
Receiver
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
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