MAXIM MAX14550E User Manual

19-4745; Rev 2; 1/10
EVALUATION KIT
AVAILABLE
USB Host Charger Identification Analog Switch
General Description
The MAX14550E is a USB Hi-Speed analog switch with a USB host charger (dedicated charger) identification circuit. The MAX14550E supports both the USB Battery Charging Specification Revision 1.0 and a set resistor bias for AppleM-compliant devices.
The MAX14550E features a high-performance Hi-Speed USB switch with low 4pF (typ) on-capacitance and low 4I (typ) on-resistance. In addition, the MAX14550E features two digital inputs (CB0 and CB1) to switch between pass-through and charger modes. The USB host charger identification circuit allows a host USB port to support USB chargers with shorted D+/D- detection and to provide support for Apple-compliant devices using a resistor bias. When an Apple-compliant device is attached to the port, the MAX14550E provides the voltage from the resistor-divider. The MAX14550E uses the internal or external resistor based on the voltage at RDP. If a USB Revision 1.0-compliant device is attached, the MAX14550E connects a short across DP and DM to allow correct charger detection. The MAX14550E auto­detection circuit can be disabled and either a DP/DM short or resistor network is chosen as the default.
The MAX14550E has enhanced high electrostatic dis­charge (ESD) protection on the DP and DM inputs up to Q15kV Human Body Model (HBM).
The MAX14550E is available in a 10-pin (3mm x 3mm) TDFN package and is specified over the -40NC to +85NC extended temperature range.
Features
S USB 2.0 Hi-Speed Switching
S Low 4.0pF On-Capacitance
S Low 4.0ω On-Resistance
S Ultra-Low 0.1ω On-Resistance Flatness
S +2.8V to +5.5V Supply Range
S Ultra-Low 7µA Supply Current
S Automatic USB Charger Identification Circuit
S Optional External Resistor-Divider with Auto
Selection
S ±15kV High ESD HBM Protection on DP/DM
S 3mm x 3mm, 10-Pin TDFN Package
Applications
Laptops
Netbooks
Cell Phones
Ordering Information
PART TEMP RANGE
MAX14550EETB+
+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
-40NC to +85NC
PIN-
PACKAGE
10 TDFN-EP* AWG
TOP
MARK
MAX14550E
Typical Operating Circuit appears at end of data sheet.
Apple is a registered trademark of Apple, Inc.
_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
USB Host Charger Identification Analog Switch
ABSOLUTE MAXIMUM RATINGS
VCC, DP, DM, TDP, TDM, RDP,
RDM, CB_ to GND ...............................................-0.3V to +6V
Continuous Current Into Any Terminal ........................... Q30mA
Continuous Power Dissipation (TA = +70NC)
10-Pin TDFN (derate 24.4mW/NC above +70NC) .......1951mW
Thermal Resistance (Note 1)
Junction-to-Ambient Thermal Resistance (BJA) ...........41NC/W
Junction-to-Case Thermal Resistance (BJC) ..................9NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
MAX14550E
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VCC = +2.8V to +5.5V, TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Supply Voltage V
Supply Current I
Supply Current Increase Analog Signal Range VDP, V
ANALOG SWITCH
On-Resistance TDP/TDM Switch
On-Resistance Match Between Channels TDP/TDM Switch
R
DR
DI
CC
CC
CC
ONT
ONT
VCC = 3.3V
VCC = 5.5V
0V P V
DM
0V P V
P VIL or VIH P V
CB_
P VCC, I
DP/DM
VDP = VDM = 400mV, IDP or IDM = 10mA 0.1
Operating Temperature Range .......................... -40NC to +85NC
Maximum Junction Temperature .....................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
Soldering Temperature (Reflow) .......................................260NC
2.8 5.5 V
V
= VCB = V
CB0
V
= 0V, VCB = V
CB0
CC
CC
0.7 2
6.5 10
External resistors used, V
= VCB = 0V or
CB0
V
= VCC, VCB = 0V
CB0
7 12
Internal resistors used, V
= VCB = 0V or
CB0
V
= VCC, VCB = 0V
CB0
V
= VCB = V
CB0
V
= 0V, VCB = V
CB0
CC
CC
76 120
2.5 7
8.5 15
External resistors used, V
= VCB = 0V or
CB0
V
= VCC, VCB = 0V
CB0
9 16
Internal resistors used, V
= VCB = 0V or
CB0
V
= VCC, VCB = 0V
CB0
or IDM = 10mA
DP
CB_
P V
CC
0 V
125 180
2
CC
4 6.5
FA
FA
V
I
I
2
USB Host Charger Identification Analog Switch
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.8V to +5.5V, TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
On-Resistance Flatness TDP/ TDM Switch
On-Resistance RDP/RDM Switch
On-Resistance Flatness RDP/ RDM Switch
On-Resistance of DP/DM Short
R
FLATT
R
ONR
R
FLATR
R
SHORT
VDP = VDM, 0V P VDP P VCC, IDP = IDM = 10mA
0.4V P V
RDP/RDM
P VCC, I
RDP
= I
10mA
V
= V
RDP
I
= I
RDP
V
= 0V, VCB = VCC, VDP = VDM,
CB0
RDM
RDM
, 0.4V P V
= 10mA
RDP
P VCC,
0V P VDP P VCC, IDP = IDM = 1mA
RDM
=
0.1
4 7.5
0.1
50 70
I
I
I
I
MAX14550E
TDP/TDM Off-Leakage Current
DP/DM On-Leakage Current
I
TDPOFF
I
TDMOFF
I
DPON
I
DMON
DYNAMIC PERFORMANCE
Turn-On Time t
Turn-Off Time t
TDP/TDM Switch Propagation Delay
Output Skew Between Switches
TDP/TDM Off-Capacitance C
DP/DM On-Capacitance (Connected to TD_ )
t
PLH
ON
OFF
, t
t
SK(O)
OFF
C
ON
-3dB Bandwidth BW
Off-Isolation V
Crosstalk V
ISO
CT
INTERNAL RESISTORS
DP/DM Short Pulldown R
PD
RP1/RP2 Ratio RT RP1 + RP2 Resistance R
RP
RM1/RM2 Ratio RT RM1 + RM2 Resistance R
RM
RP
RM
,
VCC = 5.5V, V VDM = 5.5V to 0V, V
,
VCC = 5.5V, V
= VCC, VCB = 0V, VDP =
CB0
= V
TDP
TDM
= VCB = VCC,
CB0
VDP = VDM = 5.5V to 0V
V
TDP
or V
= 1.5V, RL = 300I,
TDM
CL = 35pF, VIH = VCC, VIL = 0V, Figure 1
V
TDP
or V
= 1.5V, RL = 300I,
TDM
CL = 35pF, VIH = VCC, VIL = 0V, Figure 1
RL = RS = 50I
PHL
Skew between DP and DM when connected to TDP and TDM, RL = RS = 50I, Figure 2
f = 1MHz, V
BIAS
= 0V, V
SIGNAL
(Note 3)
f = 240MHz, V V
SIGNAL
= 500mV
BIAS
= 0V,
P-P
RL = RS = 50I
V
, VDP = 0dBm, RL = RS = 50I,
TDP
f = 250MHz, Figure 3
V
, VDP = 0dBm, RL = RS = 50I,
TDP
f = 250MHz, Figure 3
= 0V to 5.5V
= 500mV
P-P
-250 +250 nA
-250 +250 nA
20 100
2.5 5
Fs
Fs
60 ps
40 ps
2.0 pF
4.0 5.5 pF
1000 MHz
-20 dB
-25 dB
350 500 700
kI
1.485 1.5 1.515 Ratio
93.75 125 156.25
kI
0.854 0.863 0.872 Ratio
69.75 93 116.25
kI
3
USB Host Charger Identification Analog Switch
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.8V to +5.5V, TA = TJ = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25NC, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
COMPARATORS
V
> 0.4V, DM falling 1.9 2.1 2.3 V
DM Comparator Threshold V
DP and RDP Comparator Threshold
MAX14550E
DM Comparator Hysteresis 1 %V
V
DMF
DPR
DP and RDP Comparator Hysteresis
DM Comparator Debounce Time
DP Comparator Debounce Time
t
DM
t
DP
DIGITAL I/O (CB0, CB1)
Input Logic Voltage High V Input Logic Voltage Low V Input Logic Hysteresis V
Input Leakage Current I
IH
IL
HYST
IN
ESD PROTECTION
All Pins Human Body Model
ESD Protection Level (DP and DM Only)
RDP
V
< 0.3V, DM falling 44 45 46 %V
RDP
DP or RDP falling 0.3 0.35 0.4 V
1 %V
VDM from 2.8V to 1.5V 30 100 200
VDP from 0.7V to 0V 30 100 200
1.4 V
0.4 V
100 mV
VCC = 5.5V, 0V P V VIH P V
CB_
P V
CC
Human Body Model
CB_
P VIL or
-250 +250 nA
Q2
Q15
kV
kV
Fs
Fs
CC
DMF
DPR
Note 2: All devices are 100% production tested at TA = +25NC. Specifications over temperature are guaranteed by design. Note 3: Guaranteed by design.
Test Circuits/Timing Diagrams
V
CC
tR < 5ns t
< 5ns
F
t
OFF
0.9 x V
OUT
TD_
V
IN
CB0
LOGIC INPUT
C
INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
V
OUT
R
Figure 1. Switching Time
4
= V
GND
IN (
R
L
CB1
+ R
V
MAX14550E
L
)
ON
V
CC
D_
R
L
V
OUT
C
L
LOGIC INPUT
SWITCH OUTPUT
IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
IH
V
IL
0V
50%
V
OUT
0.9 x V
0UT
t
ON
USB Host Charger Identification Analog Switch
Test Circuits/Timing Diagrams (continued)
MAX14550E
IN+
R
S
R
IN-
S
MAX14550E
TDP
TDM
DP
C
L
DM
C
L
V
CC
RISE TIME DELAY = |t FALL TIME DELAY = |t RISE TIME TO FALL TIME MISMATCH = |t
OUT+
OUT-
INRISE
INFALL
- t
- t
OUTRISE
OUTFALL
|
|
OUTFALL
- t
OUTRISE
|
CB0 CB1
V
CC
t
INFALL
V
CC
V
IN+
0V
V
CC
V
IN-
0V
50%
50%
90%
10%
t
OUTFALL
t
INRISE
10%
t
OUTRISE
90%
V
CC
V
OUT+
0V
V
CC
V
OUT-
0V
Figure 2. Output Signal Skew
t
SK(0)
50%
50%
90%
10%
90%
10%
5
USB Host Charger Identification Analog Switch
TDP/TDM ON-RESISTANCE
Test Circuits/Timing Diagrams (continued)
V
OUT
V
IN
V
OUT
V
IN
0V OR V
CC
CB1
CB0 V
MAX14550E
MAX14550E
V
CC
CC
TDP
DP*
V
IN
V
OUT
MEAS REF
NETWORK
ANALYZER
50I
50I 50I
50I
OFF-ISOLATION = 20log
CROSSTALK = 20log
SWITCH IS ENABLED. MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN TD_ AND "OFF" D_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
*FOR CROSSTALK, THIS PIN IS DM. TDM AND DP ARE OPEN.
Figure 3. Off-Isolation and Crosstalk
Typical Operating Characteristics
(T
= +25°C, unless otherwise noted.)
A
RDP/RDM ON-RESISTANCE
4.5
4.0
3.5
3.0
2.5
(I)
ON
R
2.0
1.5
1.0
0.5
0
0 5.5
VCC = 2.8V
vs. SUPPLY VOLTAGE
TDP/TDM ON-RESISTANCE vs. V
5.0
4.5
4.0
MAX14550E toc01
3.5
3.0
(I)
2.5
ON
VCC = 5.5V
5.04.53.5 4.01.0 1.5 2.0 2.5 3.00.5
V
(V)
TDP
R
2.0
1.5
1.0
0.5
0
0 3.3
TA = +85°C
TA = +25°C
TA = -40°C
V
TDP/TDM
(V)
TDP/TDM
VCC = 3.3V
5.0
4.5
4.0
MAX14550E toc02
3.5
3.0
(I)
2.5
ON
R
2.0
1.5
1.0
0.5
3.02.72.1 2.40.6 0.9 1.2 1.5 1.80.3
0
vs. SUPPLY VOLTAGE
VCC = 2.8V
VCC = 5.5V
V
(V)
RDP
5.55.04.0 4.51.0 1.5 2.0 2.5 3.0 3.50.50 6.0
MAX14550E toc03
6
USB Host Charger Identification Analog Switch
Typical Operating Characteristics (continued)
(T
= +25°C, unless otherwise noted.)
A
MAX14550E
RDP/RDM ON-RESISTANCE vs. V
6
5
V
RDP/RDM
TA = +85°C
TA = +25°C
TA = -40°C
(V)
4
(I)
3
ON
R
2
1
0
0 3.5
SUPPLY CURRENT
vs. LOGIC LEVEL
250
200
150
(µA)
CC
I
100
50
0
0 3.3
INTERNAL RESISTOR-
DIVIDER
EXTERNAL RESISTOR-
DIVIDER
LOGIC LEVEL (V)
RDP/RDM
VCC = 3.3V
3.02.52.01.51.00.5
TDP/DP LEAKAGE CURRENT
vs. TEMPERATURE
MAX14550E toc05
(µA) I
10
9
8
7
6
5
CC
4
3
2
1
0
2.8 5.5
100
90
80
MAX14550E toc04
70
60
50
40
30
LEAKAGE CURRENT (nA)
20
10
0
ON-LEAKAGE
OFF-LEAKAGE
-45 90 TEMPERATURE (°C)
756030 45-15 0 15-30
TURN-ON/TURN-OFF TIME
vs. SUPPLY VOLTAGE
16
14
MAX14550E toc07
12
10
8
6
4
TURN-ON/TURN-OFF TIME (µs)
2
3.02.72.42.11.81.51.20.90.60.3
0
t
ON
t
OFF
2.0 6.0
VCC (V)
5.55.02.5 3.0 3.5 4.0 4.5
1.2
1.1
MAX14550E toc08
1.0
0.9
0.8
0.7
0.6
LOGIC-INPUT THRESHOLD (V)
0.5
0.4
2.8 5.5
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
TA = +85°C
TA = +25°C
TA = -40°C
VCC (V)
LOGIC-INPUT THRESHOLD
vs. SUPPLY VOLTAGE
CB_ RISING
CB_ FALLING
VCC (V)
MAX14550E toc06
V
= V
CB0
CC
V
= 0V
CB1
V
= V
RDP
CC
5.24.94.3 4.63.4 3.7 4.03.1
MAX14550E toc09
5.24.93.1 3.4 3.7 4.34.0 4.6
0
FREQUENCY RESPONSE
-10
-20
-30 OFF-ISOLATION
-40
-50
MAGNITUDE (dB)
-60
-70
-80
1 1000
FREQUENCY (MHz)
ON-LOSS
CROSSTALK
10010
MAX14550E toc10
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
DIFFERENTIAL SIGNAL (V)
-0.3
-0.4
-0.5
0.0
EYE DIAGRAM
TIME (x 10n - 9)s
MAX14550E toc11
2.01.81.4 1.60.4 0.6 0.8 1.0 1.20.2
7
USB Host Charger Identification Analog Switch
Typical Operating Characteristics (continued)
(T
= +25°C, unless otherwise noted.)
A
AUTODETECTION MODE
MAX14550E toc12
DM 500mV/div
DP 500mV/div
DP RISING
VCC = 2.8V, RL = 300I, CL = 35pF
MAX14550E toc13
VCC = 4V, RL = 300I, CL = 35pF
DP RISING
MAX14550E toc14
MAX14550E
INTERNAL RESISTOR-
DIVIDERS ENABLED
100µs/div
Pin Configuration
0V
TOP VIEW
CB0
DM
GND
4µs/div
+
1
2 9
3
4
5 6
MAX14550E
*EP
CB1
10
TDPDP
TDM
8
V
7
CC
RDMRDP
4µs/div
TDFN
(3mm × 3mm)
*CONNECT EP TO GND.
Pin Description
PIN NAME FUNCTION
1 CB0 Switch Control Bit 0. See the Switch Control section. 2 DP USB Connector D+ Connection 3 DM USB Connector D- Connection 4 GND Ground 5 RDP External Resistor Bias Input for D+ and Selection for External Resistors in RDP and RDM 6 RDM External Resistor Bias Input for D­7 V 8 TDM USB Transceiver D- Connection 9 TDP USB Transceiver D+ Connection
10 CB1 Switch Control Bit 1. See the Switch Control section.
EP Exposed Pad. Connect EP to GND. Do not use EP as the main ground connection.
8
Power Supply. Bypass VCC to GND through a 0.1FF capacitor. Place the capacitor as close as possible to the device.
CC
USB Host Charger Identification Analog Switch
Functional Diagram
MAX14550E
RP1
RM1
V
CC
MAX14550E
2.1V
RDP
RDM
0.4V
GND
RP2
RM2
V
CC_SW
V
CC_SW
Detailed Description
The MAX14550E is a combination of a Hi-Speed USB analog switch and a charger host identification detec­tion analog switch, which allows USB hosts to identify the USB port as a charger port when the USB host is in a low-power mode and cannot enumerate USB devices. The MAX14550E features a high-performance, Hi-Speed USB switch with low 4pF on-capacitance and low 4I on­resistance. DP and DM can survive signals between 0V and 6V with any supply voltage.
Resistor-Dividers
The MAX14550E features an internal resistor-divider for biasing or can operate with external resistors. Connect RDP to ground to use the internal resistor-divider (see the Typical Operating Circuit). The user must provide 5V supply voltage to VCC when the internal resistor-divider is used. When the MAX14550E is not operated with the internal resistor-dividers, the device disconnects the internal resistor-dividers’ pullup voltage (V minimize supply current requirements.
CC_SW
) to
TDPTDM
DP
0.4V
R
Q
S
500kI
CONTROL
LOGIC
CBO CB1
ESD
PROTECTION
DM
Connect RDP to a voltage above 0.4V (max) to use external resistors (Figure 4). Internal resistor-dividers are always disconnected from the supply voltage when exter­nal resistor-dividers are detected at RDP (V
RDP
> 0.4V).
Switch Control
Connect CB0 and CB1 to a logic-level high voltage for normal Hi-Speed USB bypass functionality.
Connect CB0 to a logic-level low and CB1 to a logic-level high voltage to select charger mode. Optionally, CB0 and CB1 can be forced to set the detection to a par­ticular state. The USB Implementers Forum (USB-IF) has defined that dedicated chargers have D+ and D- shorted together. In USB charger mode, DP and DM are shorted together for dedicated charging functionality. Connect CB0 to a logic-level high and CB1 to a logic-level low voltage to force the resistor network to be connected to DP and DM.
9
USB Host Charger Identification Analog Switch
3.3V TO 5.0V
USB
0.1µF
TRANSCEIVER
D-
D+
CC
MAX14550E
2.1V
5.0V
75kI
MAX14550E
49.9kI
43.2kI
49.9kI
RDP
RDM
0.4V
RP2
RM2
V
CC_SW
V
CC_SW
RP1
RM1
Figure 4. Operation with External Resistors
Autodetection
The MAX14550E features autodetection mode for dedi­cated chargers and USB masters. CB0 and CB1 must both be set low to activate autodetection mode.
In autodetection mode, the MAX14550E initially connects the resistor network to DP and DM. The MAX14550E monitors the voltage at DM to determine the type of device attached. If the voltage at DM is 2.1V (typ) or higher, the voltage stays as is.
If the voltage at DM is below the 2.1V (typ) threshold, the internal switch disconnects DP from the resistor network and DM. DP and DM are shorted together. The MAX14550E then monitors the voltage at DM to deter­mine when to reconnect the resistor network. If the volt-
TDMV
0.4V
R
Q
S
TDP
500kI
CBO CB1GND
CONTROL
LOGIC
ESD
PROTECTION
DP D+
DM
D-
CB0 AND CB1 00 - AUTO MODE 01 - FORCE SHORT 10 - FORCE RESISTOR 11 - TDP = DP, TDM = DM
USB
CONNECTOR
age at DM > 0.35V (typ), the short remains connected. If the voltage at DM drops below 0.35V (typ), the short is removed and the resistor network is reconnected to DP and DM.
DP and DM feature a 100Fs (typ) debounce time to reject transients.
ESD Test Conditions
ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.
10
USB Host Charger Identification Analog Switch
Table 1. Digital Input States
INTERNAL OR
V
CC
(V)
3.3 RDP < 0.4V X X Not recommended
3.3 RDP > 0.4V
5.0
< 0.4V = INTERNAL RESISTOR > 0.4V = EXTERNAL RESISTOR
RDP
RDP < 0.4V
RDP > 0.4V
CB0 CB1
0 0
0 1 Shorted Not connected
1 0
1 1
0 0
0 1 Shorted Not connected
1 0
1 1
0 0
0 1 Shorted Not connected
1 0
1 1
DP/DM
POSITION
Autodetection
circuit active
Connected to
resistor-divider
Connected to
TDP/TDM
Autodetection
circuit active
Connected to
resistor-divider
Connected to
TDP/TDM
Autodetection
circuit active
Connected to
resistor-divider
Connected to
TDP/TDM
EXTERNAL
RESISTOR
CONNECTED TO
DP/DM
External resistor Auto mode
External resistor
Not connected USB traffic active
Internal resistor Auto mode
Internal resistor
Not connected USB traffic active
External resistor Auto mode
External resistor
Not connected USB traffic active
COMMENT
Auto mode
disabled
Auto mode
disabled
Auto mode
disabled
Auto mode
disabled
Auto mode
disabled
Auto mode
disabled
MAX14550E
11
USB Host Charger Identification Analog Switch
Extended ESD Protection
(Human Body Model)
ESD-protection structures are incorporated on all pins to protect against electrostatic discharges up to Q2kV (Human Body Model) encountered during handling and
up to Q15kV (Human Body Model) without damage. The ESD structures withstand high ESD both in normal opera­tion and when the device is powered down. After an ESD event, the device continues to function without latchup (Figures 5a and 5b).
assembly. DP and DM are further protected against ESD
Table 2. Tested Portable Device
MANUFACTURER/
SPECIFICATION
MAX14550E
Apple
Motorola
RIM BlackBerry®
HTC
USB-IF Standard Shorted D+/D-
China Standard Shorted D+/D- Method not defined Depends on model
DEVICE IDENTIFICATION DETECTION METHOD/COMMENTS
iPod® and some
iPhones®
iPod touch®
and iPhone 3G
All phones with
mini-USB
QUALCOMM®-
based phones
None
Resistor-divider on
D+ and D-
Resistor to GND on
ID line
Some models look for
shorted D+/D-
None
Immediately draws 500mA when 5V is attached to V
USB FS/HS configuration: draws < 500mA D+/D- voltage detection: <1A
USB FS/HS configuration: draws < 500mA. Follows CEA-936-A specification, which is the only known company to use this specification.
USB FS/HS configuration: draws < 500mA. Some models look for shorted D+/D- with a pullup to 2.7V for dedicated charger.
Immediately draws 500mA when 5V is attached to V
Device uses a specific method (voltages and timing well defined)
BUS
BUS
MAX14550E
SUPPORT
iPhone 2G, 3G, and
3GS; iPod classic®;
iPod video; iPod
touch (1st and 2nd
generations);
iPod nano® (3rd,
4th, 5th generation);
and iPod mini
Depends on model
Depends on model
Full support
2009 and newer
LG and Samsung
models with micro-
USB connector
iPod, iPhone, iPod touch, iPod classic, and iPod nano are registered trademarks of Apple, Inc. BlackBerry is a registered trademark/servicemark of Research In Motion Limited. QUALCOMM is a registered trademark of QUALCOMM Incorporated.
12
USB Host Charger Identification Analog Switch
R
D
1500
DISCHARGE
RESISTANCE
STORAGE CAPACITOR
DEVICE UNDER
TEST
AMPERES
IP 100%
90%
36.8%
10%
PEAK-TO-PEAK RINGING
I
r
(NOT DRAWN TO SCALE)
0
0
t
RL
TIME
t
DL
CURRENT WAVEFORM
HIGH-
VOLTAGE
DC
SOURCE
R
C
1M
CHARGE-CURRENT
LIMIT RESISTOR
C
100pF
S
MAX14550E
Figure 5a. Human Body ESD Test Model
Figure 5b. Human Body Current Waveform
Timing Charts
V
BUS
HOST
SW
iPod ATTACH IN S0
USB CONNECTION
CHARGING CURRENT
V
BUS
HOST
SW
S0 S0 S0S3 S3
PT PT PTAT
S3 S3 S3S0 S0 S0
5V
ATTACH
500mA 500mA
5V
PT PT PTATAT AT
100mA
AT
ATTACHDETACH
500mA 1000mA
100mA
iPod ATTACH IN S3
USB CONNECTION
CHARGING CURRENT
NOTE: WHEN USING THIS TIMING, IT IS RECOMMENDED TO SUPPLY V
ATTACH
1000mA 1000mA 1000mA 500mA≤ 500mA
CC
WITH V
BUS
, AND V
SHOULD BE IMMEDIATELY DISCHARGED WHEN V
BUS
100mA
IS TURNED OFF.
BUS
13
USB Host Charger Identification Analog Switch
Timing Charts (continued)
S0 TO S3 TRANSITION
V
BUS
HOST
S0 S0S3 S3
SW
PT PTAT AT
MAX14550E
iPod ATTACH IN S3
USB CONNECTION
CHARGING CURRENT
5V 5V
V
BUS
HOST
5V
ATTACH
1000mA 1000mA≤ 500mA 500mA
4.0V
0.8V 0.8V
> 0.5s
< 3s
S3S0
< 1ms
14
SW
USB Host Charger Identification Analog Switch
Timing Charts (continued)
S3 TO S0 TRANSITION
MAX14550E
V
BUS
HOST
iPod ATTACH IN S3
USB CONNECTION
CHARGING CURRENT
5V 5V
V
BUS
HOST
SW
S0 S0S3 S3
PT PTAT AT
SW
S3
t
FALL TO 4.0V
t
AT TO PT
5V
ATTACH
1000mA 1000mA≤ 500mA 500mA
4.0V
0.8V 0.8V
>0.5s
<3s
S0
t
< t
AT TO PT
FALL TO 4.0V
PTAT
4.0V
NOTE: THIS TIMING IS TO AVOID THE VOLTAGE FROM THE RESISTOR-DIVIDER FROM APPEARING ON DP/DM WHILE V GROUNDED BY 15k.
IS OFF BY SWITCHING DP/DM TO TDP/TDM, WHICH IS
BUS
15
USB Host Charger Identification Analog Switch
Typical Operating Circuit
5.0V
USB
0.1µF
TRANSCEIVER
D-
D+
MAX14550E
RP2
RDP
RM2
RDM
0.4V
GND
V
CC_SW
V
CC_SW
RP1
RM1
CC
MAX14550E
2.1V
TDMV
0.4V
R
Q
S
TDP
500kI
CONTROL
LOGIC
CBO CB1
MICROCONTROLLER
DP D+
ESD
PROTECTION
DM
D-
LOW = AUTO MODE (LAPTOP IN SLEEP/STANDBY)
HIGH = TDP = DP, TDM = DM (LAPTOP AWAKE - USB ACTIVE)
USB
CONNECTOR
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
10 TDFN-EP T1033+1
16
21-0137
USB Host Charger Identification Analog Switch
Revision History
MAX14550E
REVISION
NUMBER
0 8/09 Initial release.
1 11/09
2 1/10 Replaced the timing diagrams in Timing Charts. 13, 14,15
REVISION
DATE
DESCRIPTION
Replaced the Lead Temperature with Soldering Temperature in the Absolute Maximum Ratings section.
Changed the “DP/DM On-Capacitance” specification in the Electrical Characteristics table conditions from f = 1MHz to f = 240MHz and 6.0pF (max) to 5.5pF (max).
Replaced TOC11 (Eye Diagram) in the Typical Operating Characteristics section.
Replaced Table 1 and added Table 2.
Added the Timing Chart.
PAGES
CHANGED
2, 3, 7, 11,
12, 13
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 17
©
2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
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