MAXIM MAX14548E, MAX14548AE User Manual

19-5248; Rev 0; 4/10

EVALUATION KIT

AVAILABLE

100Mbps, 16-Channel LLTs

General Description

The MAX14548E/MAX14548AE 16-channel, bidirectional
level translators (LLTs) provide the level shifting neces­sary for 100Mbps data transfer in multivoltage systems.
Externally applied voltages, VCC and VL, set the logic
levels on either side of the device. Logic signals present
on the VL side of the device appear as a high-voltage
logic signal on the VCC side of the device and vice versa.

The devices feature a programming frequency input (PF)
that adjusts the one-shot accelerator on-time to guaran­tee a bit rate of 100Mbps with a load capacitance < 15pF
and VL > 1.1V (MAX14548E) or VL > 1.4V (MAX14548AE)
when driven low. The MAX14548E can drive capacitive
loads up to 50pF with a guaranteed bit rate of 40Mbps
when VL R 1.1V and PF is driven high. The MAX14548AE
can drive capacitive loads up to 50pF with a guaranteed
bit rate of 40Mbps when VL R 1.1V and PF is driven high.

The device operate at full speed with external drivers
that source as low as 4mA output current. Each I/O chan­nel is pulled up to VCC or VL by an internal 35FA current
source, allowing both devices to be driven by either
push-pull or open-drain drivers.

The devices feature multiple power-saving features
including an enable input (EN) that places the device
into a low-power shutdown mode when driven low and
an automatic shutdown mode that disables the part
when VCC is less than VL. The MAX14548AE output driv­er is designed to operate at full speed (100Mbps) with
VL > 1.4V, which reduces the dynamic supply current vs.
the MAX14548E. The state of I/O V
high-impedance state during shutdown.

The devices operate with VCC voltages from +1.7V to
+3.6V and VL voltages from +1.1V to +3.6V, making
them ideal for data transfer between low-voltage ASICs/
PLDs and higher voltage systems. The devices are avail­able in a 40-bump WLP (2.16mm x 3.46mm) package
with 0.4mm ball pitch, and operate over the extended

-40NC to +85NC temperature range.

and I/O VL_are in

CC_

Features

S Bidirectional Level Translation

S 100Mbps Guaranteed Data Rate

S +1.7V to +3.6V Supply Voltage Range for V

S +1.1V to +3.6V Supply Voltage Range for V

(VCC > VL)

S -40NC to +85NC Extended Operating Temperature

Range

CC

L

Applications

CMOS Logic-Level Translation

Low-Voltage ASIC Level Translation

Smart Card Readers

Portable Communication Devices

Cell Phones

GPS

Telecommunications Equipment

Typical Operating Circuit appears at end of data sheet.

MAX14548E/MAX14548AE

Ordering Information/Selector Guide

PART

MAX14548EEWL+ 40 WLP 100 40 —
MAX14548AEEWL+ 40 WLP 100 40 Yes (VL > 1.1V)

Note: All devices operate over the -40°C to +85°C operating temperature range.

+Denotes a lead(Pb)-free/RoHS-compliant package.

_______________________________________________________________ Maxim Integrated Products 1

PIN-

PACKAGE

BIT RATE (PF = LOW)

LOAD CAPACITANCE < 15pF

(Mbps)

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

BIT RATE (PF = HIGH)

LOAD CAPACITANCE < 50pF

(Mbps)

LOW DYNAMIC

SUPPLY

CURRENT

100Mbps, 16-Channel LLTs

ABSOLUTE MAXIMUM RATINGS

(All voltages referenced to GND.)

VCC, VL, EN, PF....................................................... -0.3V to +4V

I/O V

................................................... -0.3V to (VCC + 0.3V)

CC_

I/O VL_ ......................................................... -0.3V to (VL + 0.3V)

Short-Circuit Duration I/O VL_,
I/O V

to GND ....................................................Continuous

CC_

Continuous Power Dissipation (TA = +70NC)

40-Bump WLP (derate 17.2mW/NC above +70NC) ....1379mW

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-

layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(VCC = +1.7V to +3.6V, VL = +1.1V to +3.6V, VCC > VL, EN = VL, C
noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

POWER SUPPLIES

VL Supply Range V

MAX14548E/MAX14548AE

VCC Supply Range V
Supply Current from V
Supply Current from V

CC

L

VCC Shutdown Supply
Current

VL Shutdown Mode Supply
Current

Dynamic Supply Current I

I/O V

, I/O VL_ Three-State

CC_

Leakage Current

EN, PF Input Leakage Current I
VL Shutdown Threshold V

VL - VCC Shutdown Threshold
High

VL - VCC Shutdown Threshold
Low

I/O VL_ Pullup Current I
I/O V

I/O VL_ to I/O V

Pullup Current I

CC_

DC

CC_

Resistance

L

CC

I

QVCC

I

QVL

I

SHDN-VCC

I

SHDN-VL

D

I

LEAK

LEAK_EN_PF

TH_VL

V

TH_H

V

TH_L

VL_PU_

VCC_PU_

R

IOVL_IOVCC

I/O V

CC_

I/O V

CC_

TA = +25NC, EN = GND, unconnected
I/O pins

TA = +25NC, EN = GND, unconnected
I/O pins

TA = +25NC, EN = VL, VCC = GND,
unconnected I/O pins

One I/O switching at
25MHz; all other I/O
connected to VCC or
VL; C

LOAD

TA = +25NC, EN = GND

TA = +25NC

VCC rising (VL = 3.6V) (Note 4) 0.05 0.3 0.65 V

VCC falling (VL = 3.6V) (Note 4) 0.2 0.52 0.85 V

I/O VL_ = GND, I/O V
I/O V

CC_

(Note 5) 3

Junction-to-Ambient Thermal Resistance (BJA)

(Note 1) ........................................................................58NC/W

Operating Temperature Range .......................... -40NC to +85NC

Storage Temperature Range ............................ -65NC to +150NC

Junction Temperature .....................................................+150NC

Soldering Temperature (reflow) ......................................+260NC

= 1FF, CVL = 1FF, TA = -40NC to +85NC, unless otherwise

VCC

1.1 3.6 V

1.7 3.6 V
= VCC, I/O VL_ = V
= VCC, I/O VL_ = V

L

L

40
20

0.1 1

0.1 1

0.1 2

MAX14548E 2.9

= 0pF

MAX14548AE 2.6

0.1 6

0.3 V

= GND 10 125

CC_

= GND, I/O VL_ = GND 15 90

1

FA
FA

FA

FA

mA

FA

FA

FA
FA

kI

2

100Mbps, 16-Channel LLTs

ELECTRICAL CHARACTERISTICS (continued)

(VCC = +1.7V to +3.6V, VL = +1.1V to +3.6V, VCC > VL, EN = VL, C
noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

ESD PROTECTION

Human Body

I/O V

CC_

, I/O V

L_

Model,
C

VCC

C

= 1FF

VL

= 1FF,

All Other Pins

LOGIC LEVELS

I/O VL_ Input-Voltage High
Threshold

I/O VL_ Input-Voltage Low
Threshold

I/O V

Input-Voltage High

CC_

Threshold

I/O V

Input-Voltage Low

CC_

Threshold

EN, PF Input-Voltage High
Threshold

EN, PF Input-Voltage Low
Threshold

I/O VL_ Output-Voltage High V

I/O VL_ Output-Voltage Low,
Drop to GND

I/O V

I/O V

Output-Voltage High V

CC_

Output-Voltage Low,

CC_

Drop to GND

V

V

V

V

V

V

IHL

ILL

IHC

ILC

V

IH

V

IL

OHL

OLL

OHC

OLC

(Note 6)

(Note 6) 0.15 V

(Note 6)

(Note 6) 0.2 V

1.1V < VL < 1.3V

VL = 1.8V

1.1V < VL < 1.3V 0.4
VL = 1.8V 0.4

I/O VL_ source current = 10FA

I/O VL_ sink current = 20FA,
I/O V

I/O V

I/O V
I/O V

< 0.05V

CC_

source current = 10FA

CC_

sink current = 20FA,

CC_

< 0.05V

L_

RISE/FALL TIME ACCELERATOR STAGE

PF = low

Accelerator Pulse Duration

PF = high

VL Output Accelerator Source
Impedance

VCC Output Accelerator
Source Impedance

VL Output Accelerator Sink
Impedance

VCC Output Accelerator Sink
Impedance

VL = 1.62V 7
VL = 3.2V 4.43
VCC = 2.2V 14.2
VCC = 3.6V 11.2
VL = 1.62V 15.3
VL = 3.2V 15.3
VCC = 2.2V 20.3
VCC = 3.6V 19.5

= 1FF, CVL = 1FF, TA = -40NC to +85NC, unless otherwise

VCC

Unpowered
device

Powered device

On rising edge 2.65
On falling edge 2.5
On rising edge 4
On falling edge 3.7

VL -

0.2

VCC -

0.4

VL -

0.25

VL -

0.4

4/5 x

V

4/5 x
V

CC

MAX14548E/MAX14548AE

Q12

kV

Q5

Q2

L

1/3 x

V

L

1/3 x

V

CC

kV

V

V

V

V

V

V

V

V

ns

ns

I

I

I

I

3

100Mbps, 16-Channel LLTs

HIGH-SPEED TIMING CHARACTERISTICS—MAX14548E

(VCC = +1.7V to +3.6V, VL = +1.1V to +3.6V, VCC > VL, EN = VL, PF = low, C
TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

I/O V
I/O V
I/O VL_ Rise Time t
I/O VL_ Fall Time t

Propagation Delay
(Driving I/O VL_)

Propagation Delay
(Driving I/O V

Channel-to-Channel Skew t

Propagation Delay from
I/O VL_ to I/O V

Propagation Delay from
I/O V

Maximum Data Rate

MAX14548E/MAX14548AE

HIGH-SPEED TIMING CHARACTERISTICS—MAX14548AE

Rise Time t

CC_

Fall Time t

CC_

)

CC_

After EN

CC_

to I/O VL_ After EN

CC_

RVCC

FVCC

RVL

FVL

t

PVL-VCC

t

PVCC-VL

SKEW

t

EN-VCC

t

EN-VL

Input rise time < 2ns, Figure 1 2 ns
Input fall time < 2ns, Figure 1 2 ns
Input rise time < 2ns, Figure 2 2 ns
Input fall time < 2ns, Figure 2 2 ns

Input rise time < 2ns, Figure 1 2.75 ns

Input rise time < 2ns, Figure 2 2.26 ns

Input rise time/fall time < 2ns 0.2 ns

R

= 1MI, Figure 3

LOAD

R

= 1MI, Figure 3

LOAD

Push-pull operation 100
Open-drain operation 0.3

(VCC = +1.7V to +3.6V, VL = +1.4V to +3.6V, VCC > VL, EN = VL, PF = low, C
TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

I/O V
I/O V
I/O VL_ Rise Time t
I/O VL_ Fall Time t

Propagation Delay
(Driving I/O VL_)

Propagation Delay
(Driving I/O V

Channel-to-Channel Skew t

Propagation Delay from
I/O VL_ to I/O V

Propagation Delay from
I/O V

Maximum Data Rate

Rise Time t

CC_

Fall Time t

CC_

)

CC_

After EN

CC_

to I/O VL_ After EN

CC_

RVCC

FVCC

RVL

FVL

t

PVL-VCC

t

PVCC-VL

SKEW

t

EN-VCC

t

EN-VL

Input rise time < 2ns, Figure 1 2 ns
Input fall time < 2ns, Figure 1 2 ns
Input rise time < 2ns, Figure 2 2 ns
Input rise time < 2ns, Figure 2 2 ns

Input rise time < 2ns, Figure 1 2.75 ns

Input rise time < 2ns, Figure 2 2.26 ns

Input rise time/fall time < 2ns 0.2 ns

R

= 1MI, Figure 3

LOAD

R

= 1MI, Figure 3

LOAD

Push-pull operation 100
Open-drain operation 0.3

= 1FF, CVL = 1FF, C

VCC

= 1FF, CVL = 1FF, C

VCC

IOVL

27

0.05

IOVL

27

0.05

P 15pF, C

P 15pF, C

IOVCC

IOVCC

P 15pF,

Fs

Fs

Mbps

P 15pF,

Fs

Fs

Mbps

4

100Mbps, 16-Channel LLTs

LOW-SPEED TIMING CHARACTERISTICS—MAX14548E

(VCC = +1.7V to +3.6V, VL = +1.1V to +3.6V, VCC > VL, EN = VL, PF = high, C
TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

I/O V
I/O V
I/O VL_ Rise Time t
I/O VL_ Fall Time t

Propagation Delay
(Driving I/O VL_)

Propagation Delay
(Driving I/O V

Channel-to-Channel Skew t

Propagation Delay from
I/O V

Propagation Delay from
I/O V

Maximum Data Rate

Rise Time t

CC_

Fall Time t

CC_

)

CC_

to I/O V

L_

to I/O VL_ After EN

CC_

CC_

After EN

RVCC

FVCC

RVL

FVL

t

PVL-VCC

t

PVCC-VL

SKEW

t

EN-VCC

t

EN-VL

Input rise time < 6ns, Figure 1 6 ns
Input fall time < 6ns, Figure 1 6 ns
Input rise time < 6ns, Figure 2 6 ns
Input rise time < 6ns, Figure 2 6 ns

Input rise time < 6ns, Figure 1 4 ns

Input rise time < 6ns, Figure 2 3.37 ns

Input rise time/fall time < 6ns 0.2 0.5 ns

R

= 1MI, Figure 3

LOAD

R

= 1MI, Figure 3

LOAD

Push-pull operation 40
Open-drain operation 0.3

LOW-SPEED TIMING CHARACTERISTICS—MAX14548AE

(VCC = +1.7V to +3.6V, VL = +1.1V to +3.6V, VCC > VL, EN = VL, PF = high, C
TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +2.8V, VL = +1.8V and TA = +25NC.) (Notes 2, 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

I/O V
I/O V
I/O VL_ Rise Time t
I/O VL_ Fall Time t

Propagation Delay
(Driving I/O VL_)

Propagation Delay
(Driving I/O V

Channel-to-Channel Skew t

Propagation Delay from
I/O VL_ to I/O V

Propagation Delay from
I/O V

Maximum Data Rate

Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by

Note 3: VL must be less than or equal to VCC during normal operation. However, VL can be greater than VCC during startup and

Note 4: When VCC is below VL by more than the VL - VCC shutdown threshold, the device turns off its pullup generators and

Note 5: Guaranteed by design.
Note 6: Input thresholds are referenced to the boost circuit.

Rise Time t

CC_

Fall Time t

CC_

)

CC_

After EN

CC_

to I/O VL_ After EN

CC_

design and not production tested.

shutdown conditions.

I/O V

CC_

and I/O V

enter their respective shutdown states.

L_

RVCC

FVCC

RVL

FVL

t

PVL-VCC

t

PVCC-VL

SKEW

t

EN-VCC

t

EN-VL

Input rise time < 6ns, Figure 1 6 ns
Input fall time < 6ns, Figure 1 6 ns
Input rise time < 6ns, Figure 2 6 ns
Input rise time < 6ns, Figure 2 6 ns

Input rise time < 6ns, Figure 1 4 ns

Input rise time < 6ns, Figure 2 3.37 ns

Input rise time/fall time < 6ns 0.2 ns

R

= 1MI, Figure 3

LOAD

R

= 1MI, Figure 3

LOAD

Push-pull operation 40
Open-drain operation 0.3

= 1FF, CVL = 1FF, C

VCC

= 1FF, CVL = 1FF, C

VCC

IOVL

27

0.06

IOVL

27

0.06

P 50pF, C

P 50pF, C

IOVCC

IOVCC

P 50pF,

Fs

Fs

Mbps

P 50pF,

Fs

Fs

Mbps

MAX14548E/MAX14548AE

5

100Mbps, 16-Channel LLTs

V

L

V

EN

L

V

CC

V

CC

MAX14548E

MAX14548AE

I/O V

V

L

L_

V

CC

I/O V

CC_

C

IOVCC

NOTE: THE INPUT RISE/FALL TIMES ARE < 2ns FOR HIGH SPEED AND < 6ns FOR LOW SPEED.

Figure 1. Push-Pull Driving I/O VL_ Test Circuit and Timing

V

MAX14548E/MAX14548AE

L

V

EN

L

V

CC

MAX14548E

MAX14548AE

C

IOVCC

I/O V

V

L

L_

V

CC

I/O V

CC_

V

CC

I/O V

CC_

10%

50%

50%

10%

I/O V

t

PLH

t

RVCC

90%

L_

t

PVL-VCC

t

RVL

50%

50%

= t

I/O V

90%

PLH

CC_

OR t

PHL

50%

t

50%

90%

50%

PLH

t

FVCC

t

90%

FVL

50%

10%

I/O V

10%

L_

NOTE: THE INPUT RISE/FALL TIMES ARE < 2ns FOR HIGH SPEED AND < 6ns FOR LOW SPEED.

Figure 2. Push-Pull Driving I/O V

6

Test Circuit and Timing

CC_

t

PLH

t

PVCC-VL = tPLH OR tPHL

t

PLH